forked from OSchip/llvm-project
687 lines
24 KiB
C++
687 lines
24 KiB
C++
//===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This defines functionality used to emit comments about X86 instructions to
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// an output stream for -fverbose-asm.
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//
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//===----------------------------------------------------------------------===//
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#include "X86InstComments.h"
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#include "MCTargetDesc/X86MCTargetDesc.h"
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#include "Utils/X86ShuffleDecode.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/CodeGen/MachineValueType.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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// Top Level Entrypoint
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//===----------------------------------------------------------------------===//
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/// EmitAnyX86InstComments - This function decodes x86 instructions and prints
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/// newline terminated strings to the specified string if desired. This
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/// information is shown in disassembly dumps when verbose assembly is enabled.
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bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
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const char *(*getRegName)(unsigned)) {
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// If this is a shuffle operation, the switch should fill in this state.
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SmallVector<int, 8> ShuffleMask;
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const char *DestName = nullptr, *Src1Name = nullptr, *Src2Name = nullptr;
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switch (MI->getOpcode()) {
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default:
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// Not an instruction for which we can decode comments.
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return false;
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case X86::BLENDPDrri:
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case X86::VBLENDPDrri:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::BLENDPDrmi:
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case X86::VBLENDPDrmi:
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodeBLENDMask(MVT::v2f64,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::VBLENDPDYrri:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VBLENDPDYrmi:
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodeBLENDMask(MVT::v4f64,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::BLENDPSrri:
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case X86::VBLENDPSrri:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::BLENDPSrmi:
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case X86::VBLENDPSrmi:
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodeBLENDMask(MVT::v4f32,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::VBLENDPSYrri:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VBLENDPSYrmi:
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodeBLENDMask(MVT::v8f32,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::PBLENDWrri:
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case X86::VPBLENDWrri:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::PBLENDWrmi:
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case X86::VPBLENDWrmi:
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodeBLENDMask(MVT::v8i16,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::VPBLENDWYrri:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VPBLENDWYrmi:
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodeBLENDMask(MVT::v16i16,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::VPBLENDDrri:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VPBLENDDrmi:
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodeBLENDMask(MVT::v4i32,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::VPBLENDDYrri:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VPBLENDDYrmi:
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodeBLENDMask(MVT::v8i32,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::INSERTPSrr:
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case X86::VINSERTPSrr:
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DestName = getRegName(MI->getOperand(0).getReg());
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Src1Name = getRegName(MI->getOperand(1).getReg());
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Src2Name = getRegName(MI->getOperand(2).getReg());
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if(MI->getOperand(3).isImm())
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DecodeINSERTPSMask(MI->getOperand(3).getImm(), ShuffleMask);
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break;
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case X86::MOVLHPSrr:
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case X86::VMOVLHPSrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeMOVLHPSMask(2, ShuffleMask);
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break;
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case X86::MOVHLPSrr:
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case X86::VMOVHLPSrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeMOVHLPSMask(2, ShuffleMask);
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break;
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case X86::MOVSLDUPrr:
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case X86::VMOVSLDUPrr:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::MOVSLDUPrm:
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case X86::VMOVSLDUPrm:
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeMOVSLDUPMask(MVT::v4f32, ShuffleMask);
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break;
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case X86::VMOVSHDUPYrr:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::VMOVSHDUPYrm:
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeMOVSHDUPMask(MVT::v8f32, ShuffleMask);
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break;
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case X86::VMOVSLDUPYrr:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::VMOVSLDUPYrm:
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeMOVSLDUPMask(MVT::v8f32, ShuffleMask);
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break;
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case X86::MOVSHDUPrr:
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case X86::VMOVSHDUPrr:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::MOVSHDUPrm:
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case X86::VMOVSHDUPrm:
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeMOVSHDUPMask(MVT::v4f32, ShuffleMask);
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break;
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case X86::PALIGNR128rr:
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case X86::VPALIGNR128rr:
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Src1Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::PALIGNR128rm:
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case X86::VPALIGNR128rm:
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Src2Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodePALIGNRMask(MVT::v16i8,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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break;
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case X86::VPALIGNR256rr:
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Src1Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VPALIGNR256rm:
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Src2Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodePALIGNRMask(MVT::v32i8,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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break;
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case X86::PSHUFDri:
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case X86::VPSHUFDri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::PSHUFDmi:
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case X86::VPSHUFDmi:
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DestName = getRegName(MI->getOperand(0).getReg());
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodePSHUFMask(MVT::v4i32,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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break;
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case X86::VPSHUFDYri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::VPSHUFDYmi:
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DestName = getRegName(MI->getOperand(0).getReg());
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodePSHUFMask(MVT::v8i32,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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break;
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case X86::PSHUFHWri:
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case X86::VPSHUFHWri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::PSHUFHWmi:
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case X86::VPSHUFHWmi:
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DestName = getRegName(MI->getOperand(0).getReg());
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodePSHUFHWMask(MVT::v8i16,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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break;
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case X86::VPSHUFHWYri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::VPSHUFHWYmi:
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DestName = getRegName(MI->getOperand(0).getReg());
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodePSHUFHWMask(MVT::v16i16,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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break;
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case X86::PSHUFLWri:
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case X86::VPSHUFLWri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::PSHUFLWmi:
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case X86::VPSHUFLWmi:
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DestName = getRegName(MI->getOperand(0).getReg());
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodePSHUFLWMask(MVT::v8i16,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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break;
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case X86::VPSHUFLWYri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::VPSHUFLWYmi:
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DestName = getRegName(MI->getOperand(0).getReg());
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if(MI->getOperand(MI->getNumOperands()-1).isImm())
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DecodePSHUFLWMask(MVT::v16i16,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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break;
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case X86::PUNPCKHBWrr:
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case X86::VPUNPCKHBWrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::PUNPCKHBWrm:
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case X86::VPUNPCKHBWrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKHMask(MVT::v16i8, ShuffleMask);
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break;
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case X86::VPUNPCKHBWYrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VPUNPCKHBWYrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKHMask(MVT::v32i8, ShuffleMask);
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break;
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case X86::PUNPCKHWDrr:
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case X86::VPUNPCKHWDrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::PUNPCKHWDrm:
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case X86::VPUNPCKHWDrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKHMask(MVT::v8i16, ShuffleMask);
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break;
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case X86::VPUNPCKHWDYrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VPUNPCKHWDYrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKHMask(MVT::v16i16, ShuffleMask);
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break;
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case X86::PUNPCKHDQrr:
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case X86::VPUNPCKHDQrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::PUNPCKHDQrm:
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case X86::VPUNPCKHDQrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKHMask(MVT::v4i32, ShuffleMask);
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break;
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case X86::VPUNPCKHDQYrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VPUNPCKHDQYrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKHMask(MVT::v8i32, ShuffleMask);
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break;
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case X86::PUNPCKHQDQrr:
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case X86::VPUNPCKHQDQrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::PUNPCKHQDQrm:
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case X86::VPUNPCKHQDQrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKHMask(MVT::v2i64, ShuffleMask);
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break;
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case X86::VPUNPCKHQDQYrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VPUNPCKHQDQYrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKHMask(MVT::v4i64, ShuffleMask);
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break;
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case X86::PUNPCKLBWrr:
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case X86::VPUNPCKLBWrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::PUNPCKLBWrm:
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case X86::VPUNPCKLBWrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKLMask(MVT::v16i8, ShuffleMask);
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break;
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case X86::VPUNPCKLBWYrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VPUNPCKLBWYrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKLMask(MVT::v32i8, ShuffleMask);
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break;
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case X86::PUNPCKLWDrr:
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case X86::VPUNPCKLWDrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::PUNPCKLWDrm:
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case X86::VPUNPCKLWDrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKLMask(MVT::v8i16, ShuffleMask);
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break;
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case X86::VPUNPCKLWDYrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VPUNPCKLWDYrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKLMask(MVT::v16i16, ShuffleMask);
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break;
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case X86::PUNPCKLDQrr:
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case X86::VPUNPCKLDQrr:
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Src2Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::PUNPCKLDQrm:
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case X86::VPUNPCKLDQrm:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodeUNPCKLMask(MVT::v4i32, ShuffleMask);
|
|
break;
|
|
case X86::VPUNPCKLDQYrr:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VPUNPCKLDQYrm:
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
DecodeUNPCKLMask(MVT::v8i32, ShuffleMask);
|
|
break;
|
|
case X86::PUNPCKLQDQrr:
|
|
case X86::VPUNPCKLQDQrr:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::PUNPCKLQDQrm:
|
|
case X86::VPUNPCKLQDQrm:
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
DecodeUNPCKLMask(MVT::v2i64, ShuffleMask);
|
|
break;
|
|
case X86::VPUNPCKLQDQYrr:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VPUNPCKLQDQYrm:
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
DecodeUNPCKLMask(MVT::v4i64, ShuffleMask);
|
|
break;
|
|
|
|
case X86::SHUFPDrri:
|
|
case X86::VSHUFPDrri:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::SHUFPDrmi:
|
|
case X86::VSHUFPDrmi:
|
|
if(MI->getOperand(MI->getNumOperands()-1).isImm())
|
|
DecodeSHUFPMask(MVT::v2f64,
|
|
MI->getOperand(MI->getNumOperands()-1).getImm(),
|
|
ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::VSHUFPDYrri:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VSHUFPDYrmi:
|
|
if(MI->getOperand(MI->getNumOperands()-1).isImm())
|
|
DecodeSHUFPMask(MVT::v4f64,
|
|
MI->getOperand(MI->getNumOperands()-1).getImm(),
|
|
ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
|
|
case X86::SHUFPSrri:
|
|
case X86::VSHUFPSrri:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::SHUFPSrmi:
|
|
case X86::VSHUFPSrmi:
|
|
if(MI->getOperand(MI->getNumOperands()-1).isImm())
|
|
DecodeSHUFPMask(MVT::v4f32,
|
|
MI->getOperand(MI->getNumOperands()-1).getImm(),
|
|
ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::VSHUFPSYrri:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VSHUFPSYrmi:
|
|
if(MI->getOperand(MI->getNumOperands()-1).isImm())
|
|
DecodeSHUFPMask(MVT::v8f32,
|
|
MI->getOperand(MI->getNumOperands()-1).getImm(),
|
|
ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
|
|
case X86::UNPCKLPDrr:
|
|
case X86::VUNPCKLPDrr:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::UNPCKLPDrm:
|
|
case X86::VUNPCKLPDrm:
|
|
DecodeUNPCKLMask(MVT::v2f64, ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::VUNPCKLPDYrr:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VUNPCKLPDYrm:
|
|
DecodeUNPCKLMask(MVT::v4f64, ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::UNPCKLPSrr:
|
|
case X86::VUNPCKLPSrr:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::UNPCKLPSrm:
|
|
case X86::VUNPCKLPSrm:
|
|
DecodeUNPCKLMask(MVT::v4f32, ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::VUNPCKLPSYrr:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VUNPCKLPSYrm:
|
|
DecodeUNPCKLMask(MVT::v8f32, ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::UNPCKHPDrr:
|
|
case X86::VUNPCKHPDrr:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::UNPCKHPDrm:
|
|
case X86::VUNPCKHPDrm:
|
|
DecodeUNPCKHMask(MVT::v2f64, ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::VUNPCKHPDYrr:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VUNPCKHPDYrm:
|
|
DecodeUNPCKHMask(MVT::v4f64, ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::UNPCKHPSrr:
|
|
case X86::VUNPCKHPSrr:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::UNPCKHPSrm:
|
|
case X86::VUNPCKHPSrm:
|
|
DecodeUNPCKHMask(MVT::v4f32, ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::VUNPCKHPSYrr:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VUNPCKHPSYrm:
|
|
DecodeUNPCKHMask(MVT::v8f32, ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::VPERMILPSri:
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VPERMILPSmi:
|
|
if(MI->getOperand(MI->getNumOperands()-1).isImm())
|
|
DecodePSHUFMask(MVT::v4f32,
|
|
MI->getOperand(MI->getNumOperands()-1).getImm(),
|
|
ShuffleMask);
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::VPERMILPSYri:
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VPERMILPSYmi:
|
|
if(MI->getOperand(MI->getNumOperands()-1).isImm())
|
|
DecodePSHUFMask(MVT::v8f32,
|
|
MI->getOperand(MI->getNumOperands()-1).getImm(),
|
|
ShuffleMask);
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::VPERMILPDri:
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VPERMILPDmi:
|
|
if(MI->getOperand(MI->getNumOperands()-1).isImm())
|
|
DecodePSHUFMask(MVT::v2f64,
|
|
MI->getOperand(MI->getNumOperands()-1).getImm(),
|
|
ShuffleMask);
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::VPERMILPDYri:
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VPERMILPDYmi:
|
|
if(MI->getOperand(MI->getNumOperands()-1).isImm())
|
|
DecodePSHUFMask(MVT::v4f64,
|
|
MI->getOperand(MI->getNumOperands()-1).getImm(),
|
|
ShuffleMask);
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::VPERM2F128rr:
|
|
case X86::VPERM2I128rr:
|
|
Src2Name = getRegName(MI->getOperand(2).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VPERM2F128rm:
|
|
case X86::VPERM2I128rm:
|
|
// For instruction comments purpose, assume the 256-bit vector is v4i64.
|
|
if(MI->getOperand(MI->getNumOperands()-1).isImm())
|
|
DecodeVPERM2X128Mask(MVT::v4i64,
|
|
MI->getOperand(MI->getNumOperands()-1).getImm(),
|
|
ShuffleMask);
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
case X86::VPERMQYri:
|
|
case X86::VPERMPDYri:
|
|
Src1Name = getRegName(MI->getOperand(1).getReg());
|
|
// FALL THROUGH.
|
|
case X86::VPERMQYmi:
|
|
case X86::VPERMPDYmi:
|
|
if(MI->getOperand(MI->getNumOperands()-1).isImm())
|
|
DecodeVPERMMask(MI->getOperand(MI->getNumOperands()-1).getImm(),
|
|
ShuffleMask);
|
|
DestName = getRegName(MI->getOperand(0).getReg());
|
|
break;
|
|
}
|
|
|
|
// The only comments we decode are shuffles, so give up if we were unable to
|
|
// decode a shuffle mask.
|
|
if (ShuffleMask.empty())
|
|
return false;
|
|
|
|
if (!DestName) DestName = Src1Name;
|
|
OS << (DestName ? DestName : "mem") << " = ";
|
|
|
|
// If the two sources are the same, canonicalize the input elements to be
|
|
// from the first src so that we get larger element spans.
|
|
if (Src1Name == Src2Name) {
|
|
for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
|
|
if ((int)ShuffleMask[i] >= 0 && // Not sentinel.
|
|
ShuffleMask[i] >= (int)e) // From second mask.
|
|
ShuffleMask[i] -= e;
|
|
}
|
|
}
|
|
|
|
// The shuffle mask specifies which elements of the src1/src2 fill in the
|
|
// destination, with a few sentinel values. Loop through and print them
|
|
// out.
|
|
for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
|
|
if (i != 0)
|
|
OS << ',';
|
|
if (ShuffleMask[i] == SM_SentinelZero) {
|
|
OS << "zero";
|
|
continue;
|
|
}
|
|
|
|
// Otherwise, it must come from src1 or src2. Print the span of elements
|
|
// that comes from this src.
|
|
bool isSrc1 = ShuffleMask[i] < (int)ShuffleMask.size();
|
|
const char *SrcName = isSrc1 ? Src1Name : Src2Name;
|
|
OS << (SrcName ? SrcName : "mem") << '[';
|
|
bool IsFirst = true;
|
|
while (i != e && (int)ShuffleMask[i] != SM_SentinelZero &&
|
|
(ShuffleMask[i] < (int)ShuffleMask.size()) == isSrc1) {
|
|
if (!IsFirst)
|
|
OS << ',';
|
|
else
|
|
IsFirst = false;
|
|
if (ShuffleMask[i] == SM_SentinelUndef)
|
|
OS << "u";
|
|
else
|
|
OS << ShuffleMask[i] % ShuffleMask.size();
|
|
++i;
|
|
}
|
|
OS << ']';
|
|
--i; // For loop increments element #.
|
|
}
|
|
//MI->print(OS, 0);
|
|
OS << "\n";
|
|
|
|
// We successfully added a comment to this instruction.
|
|
return true;
|
|
}
|