Craig Topper c20b46da2f [X86] Change register&memory TEST instructions from MRMSrcMem to MRMDstMem ... Summary: Intel documentation shows the memory operand as the first operand. But we currently treat it as the second operand. Conceptually the order doesn't matter since it doesn't write memory. We have aliases to parse with the operands in either order and the isel matching is commutable. For the register&register form order does matter for the assembly parser. PR22995 was previously filed and fixed by changing the register&register form from MRMSrcReg to MRMDestReg to match gas. Ideally the memory form should match by using MRMDestMem. I believe this supercedes D38025 which was trying to switch the register&register form back to pre-PR22995. Reviewers: aymanmus, RKSimon, zvi Reviewed By: aymanmus Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D38120 llvm-svn: 314639		2017-10-01 23:53:53 +00:00
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AArch64	MIR: Serialize CaleeSavedInfo Restored flag	2017-09-28 18:52:14 +00:00
AMDGPU	[AMDGPU] Set fast-math flags on functions given the options	2017-09-29 23:40:19 +00:00
ARC	[ARC] Add ARC backend.	2017-08-24 15:40:33 +00:00
ARM	ARM: Fix cases where CSI Restored bit is not cleared	2017-09-28 23:12:06 +00:00
AVR	[AVR] Fix the build after setting alignment to 1 in r314179	2017-09-26 02:07:54 +00:00
BPF	bpf: add new insns for bswap_to_le and negation	2017-09-28 02:46:11 +00:00
Generic	[MIParser] Ensure getHexUint doesn't produce APInts with a bitwidth of 0	2017-09-01 22:17:14 +00:00
Hexagon	Reverted r313993.	2017-09-27 23:09:14 +00:00
Inputs	…
Lanai	…
MIR	MIR: Serialize CaleeSavedInfo Restored flag	2017-09-28 18:52:14 +00:00
MSP430	…
Mips	[mips] Reordering callseq* nodes to be linear	2017-09-29 11:05:02 +00:00
NVPTX	[NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.	2017-09-26 17:07:23 +00:00
Nios2	…
PowerPC	[PowerPC] eliminate partially redundant compare instruction	2017-09-28 08:38:19 +00:00
SPARC	Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding""	2017-09-04 15:47:00 +00:00
SystemZ	[SystemZ] implement shouldCoalesce()	2017-09-29 14:31:39 +00:00
Thumb	ARM: Fix cases where CSI Restored bit is not cleared	2017-09-28 23:12:06 +00:00
Thumb2	[ARM] Call setBooleanContents(ZeroOrOneBooleanContent)	2017-08-22 11:02:37 +00:00
WebAssembly	[WebAssembly] Add sign extend instructions from atomics proposal	2017-09-13 00:29:06 +00:00
WinEH	…
X86	[X86] Change register&memory TEST instructions from MRMSrcMem to MRMDstMem	2017-10-01 23:53:53 +00:00
XCore	Delete Default and JITDefault code models	2017-08-03 02:16:21 +00:00