Simon Pilgrim 6095410e09 [X86][SSE] Share AVX1/AVX2 shuffle tests with AVX512 where possible ... llvm-svn: 253379		2015-11-17 21:19:45 +00:00
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AArch64	[AArch64] Promote f16 SELECT_CC CC operands when op is legal.	2015-11-17 16:45:40 +00:00
AMDGPU	Use TargetRegisterInfo for printing MachineOperand register comments	2015-11-17 16:01:28 +00:00
ARM	[ARM] Don't pessimize i32 vselect.	2015-11-17 17:25:15 +00:00
BPF	Use TargetRegisterInfo for printing MachineOperand register comments	2015-11-17 16:01:28 +00:00
CPP	Fix CPP Backend for GEP API changes for opaque pointer types	2015-09-08 18:42:29 +00:00
Generic	Revert "[ARM] Remove XFAIL on test/CodeGen/Generic/MachineBranchProb.ll"	2015-10-29 22:34:59 +00:00
Hexagon	[Hexagon] Fixing compound register printing and reenabling more tests.	2015-11-10 00:51:56 +00:00
Inputs	DI: Reverse direction of subprogram -> function edge.	2015-11-05 22:03:56 +00:00
MIR	MachineVerifier: Add missing linebreak	2015-11-09 23:59:29 +00:00
MSP430	…
Mips	Use TargetRegisterInfo for printing MachineOperand register comments	2015-11-17 16:01:28 +00:00
NVPTX	[NVPTX] Let NVPTX backend detect integer min and max patterns.	2015-08-26 23:22:02 +00:00
PowerPC	Find available scratch register to use in function prologue and epilogue as part of shrink wrapping.	2015-11-16 20:22:15 +00:00
SPARC	Drop assert that a call with struct return goes to a function with sret	2015-10-21 20:05:01 +00:00
SystemZ	[SystemZ] Make the CCRegs regclass non-allocatable.	2015-10-29 16:13:55 +00:00
Thumb	[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.	2015-10-05 14:49:54 +00:00
Thumb2	Revert "[ARM] Enable shrink-wrapping by default."	2015-11-12 13:34:50 +00:00
WebAssembly	[WebAssembly] Fix printing of global operands	2015-11-17 00:20:44 +00:00
WinEH	[WinEH] Find root frame correctly in CLR funclets	2015-11-13 00:39:23 +00:00
X86	[X86][SSE] Share AVX1/AVX2 shuffle tests with AVX512 where possible	2015-11-17 21:19:45 +00:00
XCore	DI: Reverse direction of subprogram -> function edge.	2015-11-05 22:03:56 +00:00