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			360 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			360 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			C
		
	
	
	
| // RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv5-unknown-freebsd -std=c11 | FileCheck %s
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| 
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| // Test that we are generating atomicrmw instructions, rather than
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| // compare-exchange loops for common atomic ops.  This makes a big difference
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| // on RISC platforms, where the compare-exchange loop becomes a ll/sc pair for
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| // the load and then another ll/sc in the loop, expanding to about 30
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| // instructions when it should be only 4.  It has a smaller, but still
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| // noticeable, impact on platforms like x86 and RISC-V, where there are atomic
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| // RMW instructions.
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| //
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| // We currently emit cmpxchg loops for most operations on _Bools, because
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| // they're sufficiently rare that it's not worth making sure that the semantics
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| // are correct.
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| 
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| typedef int __attribute__((vector_size(16))) vector;
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| 
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| _Atomic(_Bool) b;
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| _Atomic(int) i;
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| _Atomic(long long) l;
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| _Atomic(short) s;
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| _Atomic(char*) p;
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| _Atomic(float) f;
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| _Atomic(vector) v;
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| 
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| // CHECK: testinc
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| void testinc(void)
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| {
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|   // Special case for suffix bool++, sets to true and returns the old value.
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|   // CHECK: atomicrmw xchg i8* @b, i8 1 seq_cst
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|   b++;
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|   // CHECK: atomicrmw add i32* @i, i32 1 seq_cst
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|   i++;
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|   // CHECK: atomicrmw add i64* @l, i64 1 seq_cst
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|   l++;
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|   // CHECK: atomicrmw add i16* @s, i16 1 seq_cst
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|   s++;
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|   // Prefix increment
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|   // Special case for bool: set to true and return true
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|   // CHECK: store atomic i8 1, i8* @b seq_cst, align 1
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|   ++b;
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|   // Currently, we have no variant of atomicrmw that returns the new value, so
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|   // we have to generate an atomic add, which returns the old value, and then a
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|   // non-atomic add.
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|   // CHECK: atomicrmw add i32* @i, i32 1 seq_cst
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|   // CHECK: add i32 
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|   ++i;
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|   // CHECK: atomicrmw add i64* @l, i64 1 seq_cst
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|   // CHECK: add i64
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|   ++l;
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|   // CHECK: atomicrmw add i16* @s, i16 1 seq_cst
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|   // CHECK: add i16
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|   ++s;
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| }
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| // CHECK: testdec
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| void testdec(void)
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| {
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|   // CHECK: cmpxchg i8* @b
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|   b--;
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|   // CHECK: atomicrmw sub i32* @i, i32 1 seq_cst
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|   i--;
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|   // CHECK: atomicrmw sub i64* @l, i64 1 seq_cst
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|   l--;
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|   // CHECK: atomicrmw sub i16* @s, i16 1 seq_cst
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|   s--;
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|   // CHECK: cmpxchg i8* @b
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|   --b;
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|   // CHECK: atomicrmw sub i32* @i, i32 1 seq_cst
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|   // CHECK: sub i32
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|   --i;
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|   // CHECK: atomicrmw sub i64* @l, i64 1 seq_cst
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|   // CHECK: sub i64
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|   --l;
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|   // CHECK: atomicrmw sub i16* @s, i16 1 seq_cst
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|   // CHECK: sub i16
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|   --s;
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| }
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| // CHECK: testaddeq
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| void testaddeq(void)
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| {
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|   // CHECK: cmpxchg i8* @b
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|   // CHECK: atomicrmw add i32* @i, i32 42 seq_cst
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|   // CHECK: atomicrmw add i64* @l, i64 42 seq_cst
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|   // CHECK: atomicrmw add i16* @s, i16 42 seq_cst
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|   b += 42;
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|   i += 42;
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|   l += 42;
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|   s += 42;
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| }
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| // CHECK: testsubeq
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| void testsubeq(void)
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| {
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|   // CHECK: cmpxchg i8* @b
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|   // CHECK: atomicrmw sub i32* @i, i32 42 seq_cst
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|   // CHECK: atomicrmw sub i64* @l, i64 42 seq_cst
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|   // CHECK: atomicrmw sub i16* @s, i16 42 seq_cst
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|   b -= 42;
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|   i -= 42;
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|   l -= 42;
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|   s -= 42;
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| }
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| // CHECK: testxoreq
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| void testxoreq(void)
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| {
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|   // CHECK: cmpxchg i8* @b
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|   // CHECK: atomicrmw xor i32* @i, i32 42 seq_cst
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|   // CHECK: atomicrmw xor i64* @l, i64 42 seq_cst
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|   // CHECK: atomicrmw xor i16* @s, i16 42 seq_cst
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|   b ^= 42;
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|   i ^= 42;
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|   l ^= 42;
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|   s ^= 42;
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| }
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| // CHECK: testoreq
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| void testoreq(void)
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| {
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|   // CHECK: cmpxchg i8* @b
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|   // CHECK: atomicrmw or i32* @i, i32 42 seq_cst
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|   // CHECK: atomicrmw or i64* @l, i64 42 seq_cst
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|   // CHECK: atomicrmw or i16* @s, i16 42 seq_cst
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|   b |= 42;
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|   i |= 42;
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|   l |= 42;
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|   s |= 42;
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| }
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| // CHECK: testandeq
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| void testandeq(void)
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| {
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|   // CHECK: cmpxchg i8* @b
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|   // CHECK: atomicrmw and i32* @i, i32 42 seq_cst
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|   // CHECK: atomicrmw and i64* @l, i64 42 seq_cst
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|   // CHECK: atomicrmw and i16* @s, i16 42 seq_cst
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|   b &= 42;
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|   i &= 42;
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|   l &= 42;
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|   s &= 42;
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| }
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| 
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| // CHECK: define arm_aapcscc void @testFloat(float*
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| void testFloat(_Atomic(float) *fp) {
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| // CHECK:      [[FP:%.*]] = alloca float*
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| // CHECK-NEXT: [[X:%.*]] = alloca float
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| // CHECK-NEXT: [[F:%.*]] = alloca float
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| // CHECK-NEXT: [[TMP0:%.*]] = alloca float
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| // CHECK-NEXT: [[TMP1:%.*]] = alloca float
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| // CHECK-NEXT: store float* {{%.*}}, float** [[FP]]
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| 
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| // CHECK-NEXT: [[T0:%.*]] = load float** [[FP]]
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| // CHECK-NEXT: store float 1.000000e+00, float* [[T0]], align 4
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|   __c11_atomic_init(fp, 1.0f);
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| 
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| // CHECK-NEXT: store float 2.000000e+00, float* [[X]], align 4
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|   _Atomic(float) x = 2.0f;
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| 
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| // CHECK-NEXT: [[T0:%.*]] = load float** [[FP]]
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| // CHECK-NEXT: [[T1:%.*]] = bitcast float* [[T0]] to i8*
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| // CHECK-NEXT: [[T2:%.*]] = bitcast float* [[TMP0]] to i8*
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| // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 4, i8* [[T1]], i8* [[T2]], i32 5)
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| // CHECK-NEXT: [[T3:%.*]] = load float* [[TMP0]], align 4
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| // CHECK-NEXT: store float [[T3]], float* [[F]]
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|   float f = *fp;
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| 
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| // CHECK-NEXT: [[T0:%.*]] = load float* [[F]], align 4
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| // CHECK-NEXT: [[T1:%.*]] = load float** [[FP]], align 4
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| // CHECK-NEXT: store float [[T0]], float* [[TMP1]], align 4
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| // CHECK-NEXT: [[T2:%.*]] = bitcast float* [[T1]] to i8*
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| // CHECK-NEXT: [[T3:%.*]] = bitcast float* [[TMP1]] to i8*
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| // CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 4, i8* [[T2]], i8* [[T3]], i32 5)
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|   *fp = f;
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| 
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| // CHECK-NEXT: ret void
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| }
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| 
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| // CHECK: define arm_aapcscc void @testComplexFloat([[CF:{ float, float }]]*
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| void testComplexFloat(_Atomic(_Complex float) *fp) {
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| // CHECK:      [[FP:%.*]] = alloca [[CF]]*, align 4
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| // CHECK-NEXT: [[X:%.*]] = alloca [[CF]], align 8
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| // CHECK-NEXT: [[F:%.*]] = alloca [[CF]], align 4
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| // CHECK-NEXT: [[TMP0:%.*]] = alloca [[CF]], align 8
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| // CHECK-NEXT: [[TMP1:%.*]] = alloca [[CF]], align 8
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| // CHECK-NEXT: store [[CF]]*
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| 
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| // CHECK-NEXT: [[P:%.*]] = load [[CF]]** [[FP]]
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]]* [[P]], i32 0, i32 0
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| // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[CF]]* [[P]], i32 0, i32 1
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| // CHECK-NEXT: store float 1.000000e+00, float* [[T0]]
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| // CHECK-NEXT: store float 0.000000e+00, float* [[T1]]
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|   __c11_atomic_init(fp, 1.0f);
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| 
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]]* [[X]], i32 0, i32 0
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| // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[CF]]* [[X]], i32 0, i32 1
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| // CHECK-NEXT: store float 2.000000e+00, float* [[T0]]
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| // CHECK-NEXT: store float 0.000000e+00, float* [[T1]]
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|   _Atomic(_Complex float) x = 2.0f;
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| 
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| // CHECK-NEXT: [[T0:%.*]] = load [[CF]]** [[FP]]
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| // CHECK-NEXT: [[T1:%.*]] = bitcast [[CF]]* [[T0]] to i8*
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| // CHECK-NEXT: [[T2:%.*]] = bitcast [[CF]]* [[TMP0]] to i8*
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| // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5)
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]]* [[TMP0]], i32 0, i32 0
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| // CHECK-NEXT: [[R:%.*]] = load float* [[T0]]
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]]* [[TMP0]], i32 0, i32 1
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| // CHECK-NEXT: [[I:%.*]] = load float* [[T0]]
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]]* [[F]], i32 0, i32 0
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| // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[CF]]* [[F]], i32 0, i32 1
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| // CHECK-NEXT: store float [[R]], float* [[T0]]
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| // CHECK-NEXT: store float [[I]], float* [[T1]]
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|   _Complex float f = *fp;
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| 
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]]* [[F]], i32 0, i32 0
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| // CHECK-NEXT: [[R:%.*]] = load float* [[T0]]
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]]* [[F]], i32 0, i32 1
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| // CHECK-NEXT: [[I:%.*]] = load float* [[T0]]
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| // CHECK-NEXT: [[DEST:%.*]] = load [[CF]]** [[FP]], align 4
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]]* [[TMP1]], i32 0, i32 0
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| // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[CF]]* [[TMP1]], i32 0, i32 1
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| // CHECK-NEXT: store float [[R]], float* [[T0]]
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| // CHECK-NEXT: store float [[I]], float* [[T1]]
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| // CHECK-NEXT: [[T0:%.*]] = bitcast [[CF]]* [[DEST]] to i8*
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| // CHECK-NEXT: [[T1:%.*]] = bitcast [[CF]]* [[TMP1]] to i8*
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| // CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T0]], i8* [[T1]], i32 5)
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|   *fp = f;
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| 
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| // CHECK-NEXT: ret void
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| }
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| 
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| typedef struct { short x, y, z, w; } S;
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| // CHECK: define arm_aapcscc void @testStruct([[S:.*]]*
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| void testStruct(_Atomic(S) *fp) {
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| // CHECK:      [[FP:%.*]] = alloca [[S]]*, align 4
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| // CHECK-NEXT: [[X:%.*]] = alloca [[S]], align 8
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| // CHECK-NEXT: [[F:%.*]] = alloca [[S:%.*]], align 2
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| // CHECK-NEXT: [[TMP0:%.*]] = alloca [[S]], align 8
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| // CHECK-NEXT: store [[S]]*
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| 
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| // CHECK-NEXT: [[P:%.*]] = load [[S]]** [[FP]]
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]]* [[P]], i32 0, i32 0
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| // CHECK-NEXT: store i16 1, i16* [[T0]], align 2
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]]* [[P]], i32 0, i32 1
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| // CHECK-NEXT: store i16 2, i16* [[T0]], align 2
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]]* [[P]], i32 0, i32 2
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| // CHECK-NEXT: store i16 3, i16* [[T0]], align 2
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]]* [[P]], i32 0, i32 3
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| // CHECK-NEXT: store i16 4, i16* [[T0]], align 2
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|   __c11_atomic_init(fp, (S){1,2,3,4});
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| 
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]]* [[X]], i32 0, i32 0
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| // CHECK-NEXT: store i16 1, i16* [[T0]], align 2
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]]* [[X]], i32 0, i32 1
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| // CHECK-NEXT: store i16 2, i16* [[T0]], align 2
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]]* [[X]], i32 0, i32 2
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| // CHECK-NEXT: store i16 3, i16* [[T0]], align 2
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]]* [[X]], i32 0, i32 3
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| // CHECK-NEXT: store i16 4, i16* [[T0]], align 2
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|   _Atomic(S) x = (S){1,2,3,4};
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| 
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| // CHECK-NEXT: [[T0:%.*]] = load [[S]]** [[FP]]
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| // CHECK-NEXT: [[T1:%.*]] = bitcast [[S]]* [[T0]] to i8*
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| // CHECK-NEXT: [[T2:%.*]] = bitcast [[S]]* [[F]] to i8*
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| // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5)
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|   S f = *fp;
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| 
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| // CHECK-NEXT: [[T0:%.*]] = load [[S]]** [[FP]]
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| // CHECK-NEXT: [[T1:%.*]] = bitcast [[S]]* [[TMP0]] to i8*
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| // CHECK-NEXT: [[T2:%.*]] = bitcast [[S]]* [[F]] to i8*
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| // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[T1]], i8* [[T2]], i32 8, i32 2, i1 false)
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| // CHECK-NEXT: [[T3:%.*]] = bitcast [[S]]* [[T0]] to i8*
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| // CHECK-NEXT: [[T4:%.*]] = bitcast [[S]]* [[TMP0]] to i8*
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| // CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T3]], i8* [[T4]], i32 5)
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|   *fp = f;
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| 
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| // CHECK-NEXT: ret void
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| }
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| 
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| typedef struct { short x, y, z; } PS;
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| // CHECK: define arm_aapcscc void @testPromotedStruct([[APS:.*]]*
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| void testPromotedStruct(_Atomic(PS) *fp) {
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| // CHECK:      [[FP:%.*]] = alloca [[APS]]*, align 4
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| // CHECK-NEXT: [[X:%.*]] = alloca [[APS]], align 8
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| // CHECK-NEXT: [[F:%.*]] = alloca [[PS:%.*]], align 2
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| // CHECK-NEXT: [[TMP0:%.*]] = alloca [[APS]], align 8
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| // CHECK-NEXT: [[TMP1:%.*]] = alloca [[APS]], align 8
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| // CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
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| // CHECK-NEXT: [[TMP2:%.*]] = alloca %struct.PS, align 2
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| // CHECK-NEXT: [[TMP3:%.*]] = alloca [[APS]], align 8
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| // CHECK-NEXT: store [[APS]]*
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| 
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| // CHECK-NEXT: [[P:%.*]] = load [[APS]]** [[FP]]
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| // CHECK-NEXT: [[T0:%.*]] = bitcast [[APS]]* [[P]] to i8*
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| // CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[T0]], i8 0, i64 8, i32 8, i1 false)
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]]* [[P]], i32 0, i32 0
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| // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]]* [[T0]], i32 0, i32 0
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| // CHECK-NEXT: store i16 1, i16* [[T1]], align 2
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| // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]]* [[T0]], i32 0, i32 1
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| // CHECK-NEXT: store i16 2, i16* [[T1]], align 2
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| // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]]* [[T0]], i32 0, i32 2
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| // CHECK-NEXT: store i16 3, i16* [[T1]], align 2
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|   __c11_atomic_init(fp, (PS){1,2,3});
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| 
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| // CHECK-NEXT: [[T0:%.*]] = bitcast [[APS]]* [[X]] to i8*
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| // CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* [[T0]], i8 0, i32 8, i32 8, i1 false)
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]]* [[X]], i32 0, i32 0
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| // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]]* [[T0]], i32 0, i32 0
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| // CHECK-NEXT: store i16 1, i16* [[T1]], align 2
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| // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]]* [[T0]], i32 0, i32 1
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| // CHECK-NEXT: store i16 2, i16* [[T1]], align 2
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| // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]]* [[T0]], i32 0, i32 2
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| // CHECK-NEXT: store i16 3, i16* [[T1]], align 2
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|   _Atomic(PS) x = (PS){1,2,3};
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| 
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| // CHECK-NEXT: [[T0:%.*]] = load [[APS]]** [[FP]]
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| // CHECK-NEXT: [[T1:%.*]] = bitcast [[APS]]* [[T0]] to i8*
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| // CHECK-NEXT: [[T2:%.*]] = bitcast [[APS]]* [[TMP0]] to i8*
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| // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5)
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]]* [[TMP0]], i32 0, i32 0
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| // CHECK-NEXT: [[T1:%.*]] = bitcast [[PS]]* [[F]] to i8*
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| // CHECK-NEXT: [[T2:%.*]] = bitcast [[PS]]* [[T0]] to i8*
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| // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[T1]], i8* [[T2]], i32 6, i32 2, i1 false)
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|   PS f = *fp;
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| 
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| // CHECK-NEXT: [[T0:%.*]] = load [[APS]]** [[FP]]
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| // CHECK-NEXT: [[T1:%.*]] = bitcast { %struct.PS, [2 x i8] }* [[TMP1]] to i8*
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| // CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* [[T1]], i8 0, i32 8, i32 8, i1 false)
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| // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[APS]]* [[TMP1]], i32 0, i32 0
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| // CHECK-NEXT: [[T2:%.*]] = bitcast [[PS]]* [[T1]] to i8*
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| // CHECK-NEXT: [[T3:%.*]] = bitcast [[PS]]* [[F]] to i8*
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| // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[T2]], i8* [[T3]], i32 6, i32 2, i1 false)
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| // CHECK-NEXT: [[T4:%.*]] = bitcast [[APS]]* [[T0]] to i8*
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| // CHECK-NEXT: [[T5:%.*]] = bitcast [[APS]]* [[TMP1]] to i8*
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| // CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T4]], i8* [[T5]], i32 5)
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|   *fp = f;
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| 
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| // CHECK-NEXT: [[T0:%.*]] = load [[APS]]** [[FP]], align 4
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| // CHECK-NEXT: [[T1:%.*]] = bitcast [[APS]]* [[T0]] to i8*
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| // CHECK-NEXT: [[T2:%.*]] = bitcast [[APS]]* [[TMP3]] to i8*
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| // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5)
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]]* [[TMP3]], i32 0, i32 0
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| // CHECK-NEXT: [[T1:%.*]] = bitcast %struct.PS* [[TMP2]] to i8*
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| // CHECK-NEXT: [[T2:%.*]] = bitcast %struct.PS* [[T0]] to i8*
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| // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[T1]], i8* [[T2]], i32 6, i32 2, i1 false)
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| // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds %struct.PS* [[TMP2]], i32 0, i32 0
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| // CHECK-NEXT: [[T1:%.*]] = load i16* [[T0]], align 2
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| // CHECK-NEXT: [[T2:%.*]] = sext i16 [[T1]] to i32
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| // CHECK-NEXT: store i32 [[T2]], i32* [[A]], align 4
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|   int a = ((PS)*fp).x;
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| 
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| // CHECK-NEXT: ret void
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| }
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| 
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| // CHECK: define arm_aapcscc void @testPromotedStructOps([[APS:.*]]*
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| 
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| // FIXME: none of these look right, but we can leave the "test" here
 | |
| // to make sure they at least don't crash.
 | |
| void testPromotedStructOps(_Atomic(PS) *p) {
 | |
|   PS a = __c11_atomic_load(p, 5);
 | |
|   __c11_atomic_store(p, a, 5);
 | |
|   PS b = __c11_atomic_exchange(p, a, 5);
 | |
|   _Bool v = __c11_atomic_compare_exchange_strong(p, &b, a, 5, 5);
 | |
|   v = __c11_atomic_compare_exchange_weak(p, &b, a, 5, 5);
 | |
| }
 |