Jakob Stoklund Olesen caed1c9370 Add pseudo-registers for pairs, triples, and quads of D registers. ... NEON loads and stores accept single and double spaced pairs, triples, and quads of D registers. This patch adds new register classes to accurately model those constraints: Dn, Dn+1 Dn, Dn+2 ---------------------- DPair DPairSpc DTriple DTripleSpc DQuad DQuadSpc Also extend the existing QQ and QQQQ register classes to contains all Q pairs and quads instead of just the aligned ones. These new register classes will make it possible to accurately model constraints on NEON loads and stores, and we can get rid of all the NEON pseudo-instructions. The late scheduler will be able to accurately model instruction dependencies from the explicit operands. This more than doubles the number of ARM registers, but the backend passes are quite good at handling this. The llc -O0 compile time only regresses by 1.5%. Future work on register mask operands will recover this regression. llvm-svn: 149640		2012-02-02 22:45:32 +00:00
clang	Further enhance comment for property in continuation class.	2012-02-02 22:37:48 +00:00
compiler-rt	AddressSanitizer: Add macro for definition/declaration of interceptors	2012-02-02 10:39:40 +00:00
debuginfo-tests	Revert previous patch as the corresponding clang patch was reverted.	2012-01-26 07:01:33 +00:00
libclc	Update repository paths.	2012-01-08 22:31:18 +00:00
libcxx	Added some more symbols to the v2 rexport list.	2012-02-02 22:01:34 +00:00
libcxxabi	corrected namespace in test	2012-02-02 22:00:52 +00:00
lld	Cleanup system_error extensions.	2012-01-31 21:47:13 +00:00
lldb	Should have used the convenience function:	2012-02-02 22:11:13 +00:00
llvm	Add pseudo-registers for pairs, triples, and quads of D registers.	2012-02-02 22:45:32 +00:00
polly	ScopInfo: Simplify some isl code	2012-02-01 14:23:36 +00:00