forked from OSchip/llvm-project
30 lines
990 B
ArmAsm
30 lines
990 B
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
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// ------------------------------------------------------------------------- //
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// Invalid scalar registers
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whilegt p15.b, xzr, sp
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: whilegt p15.b, xzr, sp
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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whilegt p15.b, xzr, w0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: whilegt p15.b, xzr, w0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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whilegt p15.b, w0, x0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: whilegt p15.b, w0, x0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Invalid predicate
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whilegt p15, w0, w0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
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// CHECK-NEXT: whilegt p15, w0, w0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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