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llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r3
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Simon Atanasyan 56e4ea2bff [mips] Fix decoding of microMIPS JALX instruction 
microMIPS jump and link exchange instruction stores a target in a
26-bits field. Despite other microMIPS JAL instructions these bits
are target address shifted right 2 bits [1]. The patch fixes the
JALX instruction decoding and uses 2-bit shift.

[1] MIPS Architecture for Programmers Volume II-B: The microMIPS32 Instruction Set

Differential Revision: https://reviews.llvm.org/D67320

llvm-svn: 371428
 		2019-09-09 17:28:45 +00:00
..
invalid.txt
…
valid-el.txt [mips] Fix decoding of microMIPS JALX instruction 2019-09-09 17:28:45 +00:00
valid-fp64-el.txt
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valid-fp64.txt
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valid.txt [mips] Fix decoding of microMIPS JALX instruction 2019-09-09 17:28:45 +00:00