forked from OSchip/llvm-project
94 lines
3.4 KiB
C++
94 lines
3.4 KiB
C++
//===-- PPCTargetTransformInfo.h - PPC specific TTI -------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file a TargetTransformInfo::Concept conforming object specific to the
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/// PPC target machine. It uses the target's detailed information to
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/// provide more precise answers to certain TTI queries, while letting the
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/// target independent and default TTI implementations handle the rest.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
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#define LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
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#include "PPC.h"
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#include "PPCTargetMachine.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/BasicTTIImpl.h"
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#include "llvm/Target/TargetLowering.h"
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namespace llvm {
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class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> {
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typedef BasicTTIImplBase<PPCTTIImpl> BaseT;
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typedef TargetTransformInfo TTI;
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friend BaseT;
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const PPCSubtarget *ST;
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const PPCTargetLowering *TLI;
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const PPCSubtarget *getST() const { return ST; }
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const PPCTargetLowering *getTLI() const { return TLI; }
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public:
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explicit PPCTTIImpl(const PPCTargetMachine *TM, const Function &F)
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: BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
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TLI(ST->getTargetLowering()) {}
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/// \name Scalar TTI Implementations
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/// @{
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using BaseT::getIntImmCost;
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int getIntImmCost(const APInt &Imm, Type *Ty);
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int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
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int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
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Type *Ty);
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TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
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void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP);
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/// @}
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/// \name Vector TTI Implementations
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/// @{
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bool enableAggressiveInterleaving(bool LoopHasReductions);
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bool enableInterleavedAccessVectorization();
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unsigned getNumberOfRegisters(bool Vector);
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unsigned getRegisterBitWidth(bool Vector);
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unsigned getCacheLineSize();
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unsigned getPrefetchDistance();
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unsigned getMaxInterleaveFactor(unsigned VF);
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int getArithmeticInstrCost(
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unsigned Opcode, Type *Ty,
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TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
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TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
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TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
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TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
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ArrayRef<const Value *> Args = ArrayRef<const Value *>());
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int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp);
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int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
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int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
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int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
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int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
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unsigned AddressSpace);
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int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
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unsigned Factor,
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ArrayRef<unsigned> Indices,
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unsigned Alignment,
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unsigned AddressSpace);
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/// @}
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};
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} // end namespace llvm
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#endif
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