forked from OSchip/llvm-project
116 lines
4.0 KiB
LLVM
116 lines
4.0 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
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; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK
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; This test checks that uses and defs of the AR register happen in the same
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; instruction clause.
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; R600-CHECK-LABEL: @mova_same_clause
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; R600-CHECK: MOVA_INT
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; R600-CHECK-NOT: ALU clause
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; R600-CHECK: 0 + AR.x
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; R600-CHECK: MOVA_INT
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; R600-CHECK-NOT: ALU clause
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; R600-CHECK: 0 + AR.x
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; SI-CHECK-LABEL: @mova_same_clause
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; SI-CHECK: V_READFIRSTLANE
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; SI-CHECK: V_MOVRELD
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; SI-CHECK: S_CBRANCH
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; SI-CHECK: V_READFIRSTLANE
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; SI-CHECK: V_MOVRELD
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; SI-CHECK: S_CBRANCH
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define void @mova_same_clause(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* nocapture %in) {
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entry:
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%stack = alloca [5 x i32], align 4
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%0 = load i32 addrspace(1)* %in, align 4
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%arrayidx1 = getelementptr inbounds [5 x i32]* %stack, i32 0, i32 %0
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store i32 4, i32* %arrayidx1, align 4
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%arrayidx2 = getelementptr inbounds i32 addrspace(1)* %in, i32 1
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%1 = load i32 addrspace(1)* %arrayidx2, align 4
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%arrayidx3 = getelementptr inbounds [5 x i32]* %stack, i32 0, i32 %1
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store i32 5, i32* %arrayidx3, align 4
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%arrayidx10 = getelementptr inbounds [5 x i32]* %stack, i32 0, i32 0
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%2 = load i32* %arrayidx10, align 4
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store i32 %2, i32 addrspace(1)* %out, align 4
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%arrayidx12 = getelementptr inbounds [5 x i32]* %stack, i32 0, i32 1
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%3 = load i32* %arrayidx12
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%arrayidx13 = getelementptr inbounds i32 addrspace(1)* %out, i32 1
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store i32 %3, i32 addrspace(1)* %arrayidx13
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ret void
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}
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; This test checks that the stack offset is calculated correctly for structs.
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; All register loads/stores should be optimized away, so there shouldn't be
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; any MOVA instructions.
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;
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; XXX: This generated code has unnecessary MOVs, we should be able to optimize
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; this.
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; R600-CHECK-LABEL: @multiple_structs
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; R600-CHECK-NOT: MOVA_INT
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; SI-CHECK-LABEL: @multiple_structs
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; SI-CHECK-NOT: V_MOVREL
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%struct.point = type { i32, i32 }
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define void @multiple_structs(i32 addrspace(1)* %out) {
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entry:
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%a = alloca %struct.point
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%b = alloca %struct.point
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%a.x.ptr = getelementptr %struct.point* %a, i32 0, i32 0
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%a.y.ptr = getelementptr %struct.point* %a, i32 0, i32 1
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%b.x.ptr = getelementptr %struct.point* %b, i32 0, i32 0
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%b.y.ptr = getelementptr %struct.point* %b, i32 0, i32 1
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store i32 0, i32* %a.x.ptr
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store i32 1, i32* %a.y.ptr
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store i32 2, i32* %b.x.ptr
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store i32 3, i32* %b.y.ptr
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%a.indirect.ptr = getelementptr %struct.point* %a, i32 0, i32 0
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%b.indirect.ptr = getelementptr %struct.point* %b, i32 0, i32 0
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%a.indirect = load i32* %a.indirect.ptr
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%b.indirect = load i32* %b.indirect.ptr
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%0 = add i32 %a.indirect, %b.indirect
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; Test direct access of a private array inside a loop. The private array
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; loads and stores should be lowered to copies, so there shouldn't be any
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; MOVA instructions.
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; R600-CHECK-LABLE: @direct_loop
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; R600-CHECK-NOT: MOVA_INT
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; SI-CHECK-LABEL: @direct_loop
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; SI-CHECK-NOT: V_MOVREL
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define void @direct_loop(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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entry:
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%prv_array_const = alloca [2 x i32]
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%prv_array = alloca [2 x i32]
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%a = load i32 addrspace(1)* %in
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%b_src_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%b = load i32 addrspace(1)* %b_src_ptr
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%a_dst_ptr = getelementptr [2 x i32]* %prv_array_const, i32 0, i32 0
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store i32 %a, i32* %a_dst_ptr
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%b_dst_ptr = getelementptr [2 x i32]* %prv_array_const, i32 0, i32 1
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store i32 %b, i32* %b_dst_ptr
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br label %for.body
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for.body:
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%inc = phi i32 [0, %entry], [%count, %for.body]
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%x_ptr = getelementptr [2 x i32]* %prv_array_const, i32 0, i32 0
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%x = load i32* %x_ptr
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%y_ptr = getelementptr [2 x i32]* %prv_array, i32 0, i32 0
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%y = load i32* %y_ptr
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%xy = add i32 %x, %y
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store i32 %xy, i32* %y_ptr
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%count = add i32 %inc, 1
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%done = icmp eq i32 %count, 4095
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br i1 %done, label %for.end, label %for.body
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for.end:
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%value_ptr = getelementptr [2 x i32]* %prv_array, i32 0, i32 0
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%value = load i32* %value_ptr
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store i32 %value, i32 addrspace(1)* %out
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ret void
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}
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