forked from OSchip/llvm-project
115 lines
3.3 KiB
Makefile
115 lines
3.3 KiB
Makefile
# Generic Makefile Utilities
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###
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# Utility functions
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# Function: streq LHS RHS
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#
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# Return "true" if LHS == RHS, otherwise "".
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#
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# LHS == RHS <=> (LHS subst RHS is empty) and (RHS subst LHS is empty)
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streq = $(if $(1),$(if $(subst $(1),,$(2))$(subst $(2),,$(1)),,true),$(if $(2),,true))
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# Function: strneq LHS RHS
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#
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# Return "true" if LHS != RHS, otherwise "".
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strneq = $(if $(call streq,$(1),$(2)),,true)
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# Function: contains list item
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#
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# Return "true" if 'list' contains the value 'item'.
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contains = $(if $(strip $(foreach i,$(1),$(if $(call streq,$(2),$(i)),T,))),true,)
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# Function: is_subset a b
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# Return "true" if 'a' is a subset of 'b'.
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is_subset = $(if $(strip $(set_difference $(1),$(2))),,true)
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# Function: set_difference a b
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# Return a - b.
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set_difference = $(foreach i,$(1),$(if $(call contains,$(2),$(i)),,$(i)))
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# Function: Set variable value
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#
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# Set the given make variable to the given value.
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Set = $(eval $(1) := $(2))
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# Function: Append variable value
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#
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# Append the given value to the given make variable.
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Append = $(eval $(1) += $(2))
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# Function: IsDefined variable
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#
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# Check whether the given variable is defined.
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IsDefined = $(call strneq,undefined,$(flavor $(1)))
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# Function: IsUndefined variable
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#
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# Check whether the given variable is undefined.
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IsUndefined = $(call streq,undefined,$(flavor $(1)))
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# Function: VarOrDefault variable default-value
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#
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# Get the value of the given make variable, or the default-value if the variable
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# is undefined.
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VarOrDefault = $(if $(call IsDefined,$(1)),$($(1)),$(2))
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# Function: CheckValue variable
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#
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# Print the name, definition, and value of a variable, for testing make
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# utilities.
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#
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# Example:
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# foo = $(call streq,a,a)
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# $(call CheckValue,foo)
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# Example Output:
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# CHECKVALUE: foo: $(call streq,,) - true
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CheckValue = $(info CHECKVALUE: $(1): $(value $(1)) - $($(1)))
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# Function: CopyVariable src dst
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#
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# Copy the value of the variable 'src' to 'dst', taking care to not define 'dst'
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# if 'src' is undefined. The destination variable must be undefined.
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CopyVariable = \
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$(call AssertValue,$(call IsUndefined,$(2)),destination is already defined)\
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$(if $(call IsUndefined,$(1)),,\
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$(call Set,$(2),$($(1))))
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# Function: Assert value message
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#
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# Check that a value is true, or give an error including the given message
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Assert = $(if $(1),,\
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$(error Assertion failed: $(2)))
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# Function: AssertEqual variable expected-value
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#
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# Check that the value of a variable is 'expected-value'.
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AssertEqual = \
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$(if $(call streq,$($(1)),$(2)),,\
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$(error Assertion failed: $(1): $(value $(1)) - $($(1)) != $(2)))
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# Function: CheckCommandLineOverrides list
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#
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# Check that all command line variables are in the given list. This routine is
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# useful for validating that users aren't trying to override something which
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# will not work.
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CheckCommandLineOverrides = \
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$(foreach arg,$(MAKEOVERRIDES),\
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$(call Set,varname,$(firstword $(subst =, ,$(arg)))) \
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$(if $(call contains,$(1),$(varname)),,\
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$(error "Invalid command line override: $(1) $(varname) (not supported)")))
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###
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# Clean up make behavior
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# Cancel all suffix rules. We don't want no stinking suffix rules.
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.SUFFIXES:
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###
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# Debugging
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# General debugging rule, use 'make print-XXX' to print the definition, value
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# and origin of XXX.
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make-print-%:
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$(error PRINT: $(value $*) = "$($*)" (from $(origin $*)))
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