forked from OSchip/llvm-project
448 lines
17 KiB
C++
448 lines
17 KiB
C++
//===-- Instruction.cpp - Implement the Instruction class -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the Instruction class for the VMCore library.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Instruction.h"
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#include "llvm/Type.h"
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#include "llvm/Instructions.h"
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#include "llvm/Constants.h"
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#include "llvm/Module.h"
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#include "llvm/Support/CallSite.h"
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#include "llvm/Support/LeakDetector.h"
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using namespace llvm;
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Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
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Instruction *InsertBefore)
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: User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(0) {
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// Make sure that we get added to a basicblock
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LeakDetector::addGarbageObject(this);
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// If requested, insert this instruction into a basic block...
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if (InsertBefore) {
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assert(InsertBefore->getParent() &&
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"Instruction to insert before is not in a basic block!");
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InsertBefore->getParent()->getInstList().insert(InsertBefore, this);
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}
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}
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Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
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BasicBlock *InsertAtEnd)
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: User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(0) {
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// Make sure that we get added to a basicblock
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LeakDetector::addGarbageObject(this);
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// append this instruction into the basic block
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assert(InsertAtEnd && "Basic block to append to may not be NULL!");
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InsertAtEnd->getInstList().push_back(this);
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}
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// Out of line virtual method, so the vtable, etc has a home.
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Instruction::~Instruction() {
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assert(Parent == 0 && "Instruction still linked in the program!");
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if (hasMetadataHashEntry())
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clearMetadataHashEntries();
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}
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void Instruction::setParent(BasicBlock *P) {
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if (getParent()) {
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if (!P) LeakDetector::addGarbageObject(this);
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} else {
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if (P) LeakDetector::removeGarbageObject(this);
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}
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Parent = P;
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}
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void Instruction::removeFromParent() {
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getParent()->getInstList().remove(this);
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}
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void Instruction::eraseFromParent() {
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getParent()->getInstList().erase(this);
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}
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/// insertBefore - Insert an unlinked instructions into a basic block
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/// immediately before the specified instruction.
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void Instruction::insertBefore(Instruction *InsertPos) {
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InsertPos->getParent()->getInstList().insert(InsertPos, this);
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}
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/// insertAfter - Insert an unlinked instructions into a basic block
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/// immediately after the specified instruction.
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void Instruction::insertAfter(Instruction *InsertPos) {
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InsertPos->getParent()->getInstList().insertAfter(InsertPos, this);
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}
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/// moveBefore - Unlink this instruction from its current basic block and
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/// insert it into the basic block that MovePos lives in, right before
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/// MovePos.
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void Instruction::moveBefore(Instruction *MovePos) {
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MovePos->getParent()->getInstList().splice(MovePos,getParent()->getInstList(),
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this);
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}
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const char *Instruction::getOpcodeName(unsigned OpCode) {
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switch (OpCode) {
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// Terminators
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case Ret: return "ret";
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case Br: return "br";
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case Switch: return "switch";
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case IndirectBr: return "indirectbr";
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case Invoke: return "invoke";
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case Resume: return "resume";
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case Unreachable: return "unreachable";
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// Standard binary operators...
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case Add: return "add";
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case FAdd: return "fadd";
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case Sub: return "sub";
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case FSub: return "fsub";
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case Mul: return "mul";
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case FMul: return "fmul";
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case UDiv: return "udiv";
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case SDiv: return "sdiv";
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case FDiv: return "fdiv";
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case URem: return "urem";
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case SRem: return "srem";
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case FRem: return "frem";
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// Logical operators...
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case And: return "and";
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case Or : return "or";
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case Xor: return "xor";
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// Memory instructions...
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case Alloca: return "alloca";
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case Load: return "load";
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case Store: return "store";
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case AtomicCmpXchg: return "cmpxchg";
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case AtomicRMW: return "atomicrmw";
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case Fence: return "fence";
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case GetElementPtr: return "getelementptr";
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// Convert instructions...
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case Trunc: return "trunc";
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case ZExt: return "zext";
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case SExt: return "sext";
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case FPTrunc: return "fptrunc";
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case FPExt: return "fpext";
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case FPToUI: return "fptoui";
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case FPToSI: return "fptosi";
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case UIToFP: return "uitofp";
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case SIToFP: return "sitofp";
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case IntToPtr: return "inttoptr";
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case PtrToInt: return "ptrtoint";
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case BitCast: return "bitcast";
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// Other instructions...
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case ICmp: return "icmp";
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case FCmp: return "fcmp";
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case PHI: return "phi";
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case Select: return "select";
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case Call: return "call";
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case Shl: return "shl";
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case LShr: return "lshr";
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case AShr: return "ashr";
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case VAArg: return "va_arg";
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case ExtractElement: return "extractelement";
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case InsertElement: return "insertelement";
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case ShuffleVector: return "shufflevector";
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case ExtractValue: return "extractvalue";
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case InsertValue: return "insertvalue";
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case LandingPad: return "landingpad";
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default: return "<Invalid operator> ";
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}
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}
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/// isIdenticalTo - Return true if the specified instruction is exactly
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/// identical to the current one. This means that all operands match and any
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/// extra information (e.g. load is volatile) agree.
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bool Instruction::isIdenticalTo(const Instruction *I) const {
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return isIdenticalToWhenDefined(I) &&
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SubclassOptionalData == I->SubclassOptionalData;
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}
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/// isIdenticalToWhenDefined - This is like isIdenticalTo, except that it
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/// ignores the SubclassOptionalData flags, which specify conditions
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/// under which the instruction's result is undefined.
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bool Instruction::isIdenticalToWhenDefined(const Instruction *I) const {
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if (getOpcode() != I->getOpcode() ||
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getNumOperands() != I->getNumOperands() ||
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getType() != I->getType())
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return false;
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// We have two instructions of identical opcode and #operands. Check to see
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// if all operands are the same.
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for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
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if (getOperand(i) != I->getOperand(i))
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return false;
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// Check special state that is a part of some instructions.
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if (const LoadInst *LI = dyn_cast<LoadInst>(this))
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return LI->isVolatile() == cast<LoadInst>(I)->isVolatile() &&
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LI->getAlignment() == cast<LoadInst>(I)->getAlignment() &&
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LI->getOrdering() == cast<LoadInst>(I)->getOrdering() &&
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LI->getSynchScope() == cast<LoadInst>(I)->getSynchScope();
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if (const StoreInst *SI = dyn_cast<StoreInst>(this))
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return SI->isVolatile() == cast<StoreInst>(I)->isVolatile() &&
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SI->getAlignment() == cast<StoreInst>(I)->getAlignment() &&
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SI->getOrdering() == cast<StoreInst>(I)->getOrdering() &&
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SI->getSynchScope() == cast<StoreInst>(I)->getSynchScope();
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if (const CmpInst *CI = dyn_cast<CmpInst>(this))
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return CI->getPredicate() == cast<CmpInst>(I)->getPredicate();
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if (const CallInst *CI = dyn_cast<CallInst>(this))
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return CI->isTailCall() == cast<CallInst>(I)->isTailCall() &&
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CI->getCallingConv() == cast<CallInst>(I)->getCallingConv() &&
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CI->getAttributes() == cast<CallInst>(I)->getAttributes();
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if (const InvokeInst *CI = dyn_cast<InvokeInst>(this))
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return CI->getCallingConv() == cast<InvokeInst>(I)->getCallingConv() &&
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CI->getAttributes() == cast<InvokeInst>(I)->getAttributes();
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if (const InsertValueInst *IVI = dyn_cast<InsertValueInst>(this))
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return IVI->getIndices() == cast<InsertValueInst>(I)->getIndices();
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if (const ExtractValueInst *EVI = dyn_cast<ExtractValueInst>(this))
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return EVI->getIndices() == cast<ExtractValueInst>(I)->getIndices();
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if (const FenceInst *FI = dyn_cast<FenceInst>(this))
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return FI->getOrdering() == cast<FenceInst>(FI)->getOrdering() &&
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FI->getSynchScope() == cast<FenceInst>(FI)->getSynchScope();
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if (const AtomicCmpXchgInst *CXI = dyn_cast<AtomicCmpXchgInst>(this))
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return CXI->isVolatile() == cast<AtomicCmpXchgInst>(I)->isVolatile() &&
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CXI->getOrdering() == cast<AtomicCmpXchgInst>(I)->getOrdering() &&
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CXI->getSynchScope() == cast<AtomicCmpXchgInst>(I)->getSynchScope();
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if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(this))
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return RMWI->getOperation() == cast<AtomicRMWInst>(I)->getOperation() &&
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RMWI->isVolatile() == cast<AtomicRMWInst>(I)->isVolatile() &&
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RMWI->getOrdering() == cast<AtomicRMWInst>(I)->getOrdering() &&
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RMWI->getSynchScope() == cast<AtomicRMWInst>(I)->getSynchScope();
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if (const PHINode *thisPHI = dyn_cast<PHINode>(this)) {
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const PHINode *otherPHI = cast<PHINode>(I);
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for (unsigned i = 0, e = thisPHI->getNumOperands(); i != e; ++i) {
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if (thisPHI->getIncomingBlock(i) != otherPHI->getIncomingBlock(i))
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return false;
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}
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return true;
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}
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return true;
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}
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// isSameOperationAs
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// This should be kept in sync with isEquivalentOperation in
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// lib/Transforms/IPO/MergeFunctions.cpp.
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bool Instruction::isSameOperationAs(const Instruction *I,
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unsigned flags) const {
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bool IgnoreAlignment = flags & CompareIgnoringAlignment;
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bool UseScalarTypes = flags & CompareUsingScalarTypes;
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if (getOpcode() != I->getOpcode() ||
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getNumOperands() != I->getNumOperands() ||
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(UseScalarTypes ?
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getType()->getScalarType() != I->getType()->getScalarType() :
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getType() != I->getType()))
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return false;
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// We have two instructions of identical opcode and #operands. Check to see
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// if all operands are the same type
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for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
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if (UseScalarTypes ?
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getOperand(i)->getType()->getScalarType() !=
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I->getOperand(i)->getType()->getScalarType() :
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getOperand(i)->getType() != I->getOperand(i)->getType())
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return false;
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// Check special state that is a part of some instructions.
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if (const LoadInst *LI = dyn_cast<LoadInst>(this))
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return LI->isVolatile() == cast<LoadInst>(I)->isVolatile() &&
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(LI->getAlignment() == cast<LoadInst>(I)->getAlignment() ||
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IgnoreAlignment) &&
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LI->getOrdering() == cast<LoadInst>(I)->getOrdering() &&
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LI->getSynchScope() == cast<LoadInst>(I)->getSynchScope();
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if (const StoreInst *SI = dyn_cast<StoreInst>(this))
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return SI->isVolatile() == cast<StoreInst>(I)->isVolatile() &&
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(SI->getAlignment() == cast<StoreInst>(I)->getAlignment() ||
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IgnoreAlignment) &&
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SI->getOrdering() == cast<StoreInst>(I)->getOrdering() &&
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SI->getSynchScope() == cast<StoreInst>(I)->getSynchScope();
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if (const CmpInst *CI = dyn_cast<CmpInst>(this))
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return CI->getPredicate() == cast<CmpInst>(I)->getPredicate();
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if (const CallInst *CI = dyn_cast<CallInst>(this))
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return CI->isTailCall() == cast<CallInst>(I)->isTailCall() &&
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CI->getCallingConv() == cast<CallInst>(I)->getCallingConv() &&
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CI->getAttributes() == cast<CallInst>(I)->getAttributes();
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if (const InvokeInst *CI = dyn_cast<InvokeInst>(this))
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return CI->getCallingConv() == cast<InvokeInst>(I)->getCallingConv() &&
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CI->getAttributes() ==
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cast<InvokeInst>(I)->getAttributes();
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if (const InsertValueInst *IVI = dyn_cast<InsertValueInst>(this))
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return IVI->getIndices() == cast<InsertValueInst>(I)->getIndices();
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if (const ExtractValueInst *EVI = dyn_cast<ExtractValueInst>(this))
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return EVI->getIndices() == cast<ExtractValueInst>(I)->getIndices();
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if (const FenceInst *FI = dyn_cast<FenceInst>(this))
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return FI->getOrdering() == cast<FenceInst>(I)->getOrdering() &&
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FI->getSynchScope() == cast<FenceInst>(I)->getSynchScope();
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if (const AtomicCmpXchgInst *CXI = dyn_cast<AtomicCmpXchgInst>(this))
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return CXI->isVolatile() == cast<AtomicCmpXchgInst>(I)->isVolatile() &&
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CXI->getOrdering() == cast<AtomicCmpXchgInst>(I)->getOrdering() &&
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CXI->getSynchScope() == cast<AtomicCmpXchgInst>(I)->getSynchScope();
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if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(this))
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return RMWI->getOperation() == cast<AtomicRMWInst>(I)->getOperation() &&
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RMWI->isVolatile() == cast<AtomicRMWInst>(I)->isVolatile() &&
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RMWI->getOrdering() == cast<AtomicRMWInst>(I)->getOrdering() &&
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RMWI->getSynchScope() == cast<AtomicRMWInst>(I)->getSynchScope();
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return true;
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}
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/// isUsedOutsideOfBlock - Return true if there are any uses of I outside of the
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/// specified block. Note that PHI nodes are considered to evaluate their
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/// operands in the corresponding predecessor block.
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bool Instruction::isUsedOutsideOfBlock(const BasicBlock *BB) const {
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for (const_use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
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// PHI nodes uses values in the corresponding predecessor block. For other
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// instructions, just check to see whether the parent of the use matches up.
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const User *U = *UI;
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const PHINode *PN = dyn_cast<PHINode>(U);
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if (PN == 0) {
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if (cast<Instruction>(U)->getParent() != BB)
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return true;
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continue;
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}
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if (PN->getIncomingBlock(UI) != BB)
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return true;
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}
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return false;
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}
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/// mayReadFromMemory - Return true if this instruction may read memory.
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///
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bool Instruction::mayReadFromMemory() const {
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switch (getOpcode()) {
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default: return false;
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case Instruction::VAArg:
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case Instruction::Load:
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case Instruction::Fence: // FIXME: refine definition of mayReadFromMemory
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case Instruction::AtomicCmpXchg:
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case Instruction::AtomicRMW:
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return true;
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case Instruction::Call:
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return !cast<CallInst>(this)->doesNotAccessMemory();
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case Instruction::Invoke:
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return !cast<InvokeInst>(this)->doesNotAccessMemory();
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case Instruction::Store:
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return !cast<StoreInst>(this)->isUnordered();
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}
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}
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/// mayWriteToMemory - Return true if this instruction may modify memory.
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///
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bool Instruction::mayWriteToMemory() const {
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switch (getOpcode()) {
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default: return false;
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case Instruction::Fence: // FIXME: refine definition of mayWriteToMemory
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case Instruction::Store:
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case Instruction::VAArg:
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case Instruction::AtomicCmpXchg:
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case Instruction::AtomicRMW:
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return true;
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case Instruction::Call:
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return !cast<CallInst>(this)->onlyReadsMemory();
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case Instruction::Invoke:
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return !cast<InvokeInst>(this)->onlyReadsMemory();
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case Instruction::Load:
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return !cast<LoadInst>(this)->isUnordered();
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}
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}
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/// mayThrow - Return true if this instruction may throw an exception.
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///
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bool Instruction::mayThrow() const {
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if (const CallInst *CI = dyn_cast<CallInst>(this))
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return !CI->doesNotThrow();
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return isa<ResumeInst>(this);
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}
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/// isAssociative - Return true if the instruction is associative:
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///
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/// Associative operators satisfy: x op (y op z) === (x op y) op z
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///
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/// In LLVM, the Add, Mul, And, Or, and Xor operators are associative.
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///
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bool Instruction::isAssociative(unsigned Opcode) {
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return Opcode == And || Opcode == Or || Opcode == Xor ||
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Opcode == Add || Opcode == Mul;
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}
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/// isCommutative - Return true if the instruction is commutative:
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///
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/// Commutative operators satisfy: (x op y) === (y op x)
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///
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/// In LLVM, these are the associative operators, plus SetEQ and SetNE, when
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/// applied to any type.
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///
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bool Instruction::isCommutative(unsigned op) {
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switch (op) {
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case Add:
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case FAdd:
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case Mul:
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case FMul:
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case And:
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case Or:
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case Xor:
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return true;
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default:
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return false;
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}
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}
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/// isIdempotent - Return true if the instruction is idempotent:
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///
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/// Idempotent operators satisfy: x op x === x
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///
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/// In LLVM, the And and Or operators are idempotent.
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///
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bool Instruction::isIdempotent(unsigned Opcode) {
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return Opcode == And || Opcode == Or;
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}
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/// isNilpotent - Return true if the instruction is nilpotent:
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///
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/// Nilpotent operators satisfy: x op x === Id,
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///
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/// where Id is the identity for the operator, i.e. a constant such that
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/// x op Id === x and Id op x === x for all x.
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///
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/// In LLVM, the Xor operator is nilpotent.
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///
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bool Instruction::isNilpotent(unsigned Opcode) {
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return Opcode == Xor;
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}
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Instruction *Instruction::clone() const {
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Instruction *New = clone_impl();
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New->SubclassOptionalData = SubclassOptionalData;
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if (!hasMetadata())
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return New;
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// Otherwise, enumerate and copy over metadata from the old instruction to the
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// new one.
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SmallVector<std::pair<unsigned, MDNode*>, 4> TheMDs;
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getAllMetadataOtherThanDebugLoc(TheMDs);
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for (unsigned i = 0, e = TheMDs.size(); i != e; ++i)
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New->setMetadata(TheMDs[i].first, TheMDs[i].second);
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New->setDebugLoc(getDebugLoc());
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return New;
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}
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