forked from OSchip/llvm-project
134 lines
4.4 KiB
C++
134 lines
4.4 KiB
C++
//===-- R600AsmPrinter.cpp - R600 Assebly printer ------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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///
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/// The R600AsmPrinter is used to print both assembly string and also binary
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/// code. When passed an MCAsmStreamer it prints assembly and when passed
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/// an MCObjectStreamer it outputs binary code.
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//
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//===----------------------------------------------------------------------===//
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#include "R600AsmPrinter.h"
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#include "AMDGPUSubtarget.h"
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#include "R600Defines.h"
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#include "R600MachineFunctionInfo.h"
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#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
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#include "llvm/BinaryFormat/ELF.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCSectionELF.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/Target/TargetLoweringObjectFile.h"
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using namespace llvm;
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AsmPrinter *
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llvm::createR600AsmPrinterPass(TargetMachine &TM,
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std::unique_ptr<MCStreamer> &&Streamer) {
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return new R600AsmPrinter(TM, std::move(Streamer));
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}
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R600AsmPrinter::R600AsmPrinter(TargetMachine &TM,
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std::unique_ptr<MCStreamer> Streamer)
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: AsmPrinter(TM, std::move(Streamer)) { }
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StringRef R600AsmPrinter::getPassName() const {
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return "R600 Assembly Printer";
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}
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void R600AsmPrinter::EmitProgramInfoR600(const MachineFunction &MF) {
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unsigned MaxGPR = 0;
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bool killPixel = false;
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const R600Subtarget &STM = MF.getSubtarget<R600Subtarget>();
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const R600RegisterInfo *RI = STM.getRegisterInfo();
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const R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
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for (const MachineBasicBlock &MBB : MF) {
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for (const MachineInstr &MI : MBB) {
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if (MI.getOpcode() == R600::KILLGT)
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killPixel = true;
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unsigned numOperands = MI.getNumOperands();
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for (unsigned op_idx = 0; op_idx < numOperands; op_idx++) {
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const MachineOperand &MO = MI.getOperand(op_idx);
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if (!MO.isReg())
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continue;
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unsigned HWReg = RI->getHWRegIndex(MO.getReg());
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// Register with value > 127 aren't GPR
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if (HWReg > 127)
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continue;
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MaxGPR = std::max(MaxGPR, HWReg);
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}
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}
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}
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unsigned RsrcReg;
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if (STM.getGeneration() >= AMDGPUSubtarget::EVERGREEN) {
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// Evergreen / Northern Islands
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switch (MF.getFunction().getCallingConv()) {
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default: LLVM_FALLTHROUGH;
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case CallingConv::AMDGPU_CS: RsrcReg = R_0288D4_SQ_PGM_RESOURCES_LS; break;
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case CallingConv::AMDGPU_GS: RsrcReg = R_028878_SQ_PGM_RESOURCES_GS; break;
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case CallingConv::AMDGPU_PS: RsrcReg = R_028844_SQ_PGM_RESOURCES_PS; break;
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case CallingConv::AMDGPU_VS: RsrcReg = R_028860_SQ_PGM_RESOURCES_VS; break;
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}
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} else {
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// R600 / R700
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switch (MF.getFunction().getCallingConv()) {
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default: LLVM_FALLTHROUGH;
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case CallingConv::AMDGPU_GS: LLVM_FALLTHROUGH;
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case CallingConv::AMDGPU_CS: LLVM_FALLTHROUGH;
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case CallingConv::AMDGPU_VS: RsrcReg = R_028868_SQ_PGM_RESOURCES_VS; break;
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case CallingConv::AMDGPU_PS: RsrcReg = R_028850_SQ_PGM_RESOURCES_PS; break;
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}
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}
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OutStreamer->EmitIntValue(RsrcReg, 4);
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OutStreamer->EmitIntValue(S_NUM_GPRS(MaxGPR + 1) |
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S_STACK_SIZE(MFI->CFStackSize), 4);
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OutStreamer->EmitIntValue(R_02880C_DB_SHADER_CONTROL, 4);
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OutStreamer->EmitIntValue(S_02880C_KILL_ENABLE(killPixel), 4);
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if (AMDGPU::isCompute(MF.getFunction().getCallingConv())) {
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OutStreamer->EmitIntValue(R_0288E8_SQ_LDS_ALLOC, 4);
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OutStreamer->EmitIntValue(alignTo(MFI->getLDSSize(), 4) >> 2, 4);
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}
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}
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bool R600AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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// Functions needs to be cacheline (256B) aligned.
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MF.ensureAlignment(8);
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SetupMachineFunction(MF);
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MCContext &Context = getObjFileLowering().getContext();
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MCSectionELF *ConfigSection =
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Context.getELFSection(".AMDGPU.config", ELF::SHT_PROGBITS, 0);
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OutStreamer->SwitchSection(ConfigSection);
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EmitProgramInfoR600(MF);
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EmitFunctionBody();
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if (isVerbose()) {
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MCSectionELF *CommentSection =
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Context.getELFSection(".AMDGPU.csdata", ELF::SHT_PROGBITS, 0);
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OutStreamer->SwitchSection(CommentSection);
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R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
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OutStreamer->emitRawComment(
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Twine("SQ_PGM_RESOURCES:STACK_SIZE = " + Twine(MFI->CFStackSize)));
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}
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return false;
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}
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