yunlong
/
IC_FPGA_projects
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

modify README

This commit is contained in:
yunlongLi 2024-10-31 00:15:29 +08:00
parent 0cca85eb0d
commit 18b71cc6ff
1 changed files with 3 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
README.md
View File

@ -1,3 +1,5 @@
# IC_FPGA_projects # IC_FPGA_projects
This repository is used to introduce to some projects or modules bases on the mainly lanuage--verilog. This repository is used to introduce to some projects or modules bases on the mainly lanuage--verilog.
# 1 # 1 slove the every time git push need to input the username and password.
git config --global credential.helper store
//then git push again,and next will not need to input the username and password.