Commit Graph

6297 Commits

Author SHA1 Message Date
Ties Stuij 983f63f7f0 [AArch64][ARM] add Armv8.9-a/Armv9.4-a identifier support
For both ARM and AArch64 add support for specifying -march=armv8.9a/armv9.4a to
clang. Add backend plumbing like target parser and predicate support.

For a summary of Amv8.9/Armv9.4 features, see:
https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-2022

For detailed information, consult the Arm Architecture Reference Manual for
A-profile architecture:
https://developer.arm.com/documentation/ddi0487/latest/

People who contributed to this patch:
- Keith Walker
- Ties Stuij

Reviewed By: tmatheson

Differential Revision: https://reviews.llvm.org/D138010
2022-11-16 10:20:14 +00:00
Serge Pavlov 1f67dc8b7c [Driver] Enable nested configuration files
Users may partition parameters specified by configuration file and put
different groups into separate files. These files are inserted into the
main file using constructs `@file`. Relative file names in it are
resolved relative to the including configuration file and this is not
convenient in some cases. A configuration file, which resides in system
directory, may need to include a file with user-defined parameters and
still provide default definitions if such file is absent.

To solve such problems, the option `--config=` is allowed inside
configuration files. Like `@file` it results in insertion of
command-line arguments but the algorithm of file search is different and
allows overriding system definitions with user ones.

Differential Revision: https://reviews.llvm.org/D136354
2022-11-16 13:32:27 +07:00
Reed 88eb3c62f2 Add FP8 E4M3 support to APFloat.
NVIDIA, ARM, and Intel recently introduced two new FP8 formats, as described in the paper: https://arxiv.org/abs/2209.05433. The first of the two FP8 dtypes, E5M2, was added in https://reviews.llvm.org/D133823. This change adds the second of the two: E4M3.

There is an RFC for adding the FP8 dtypes here: https://discourse.llvm.org/t/rfc-add-apfloat-and-mlir-type-support-for-fp8-e5m2/65279. I spoke with the RFC's author, Stella, and she gave me the go ahead to implement the E4M3 type. The name of the E4M3 type in APFloat is Float8E4M3FN, as discussed in the RFC. The "FN" means only Finite and NaN values are supported.

Unlike E5M2, E4M3 has different behavior from IEEE types in regards to Inf and NaN values. There are no Inf values, and NaN is represented when the exponent and mantissa bits are all 1s. To represent these differences in APFloat, I added an enum field, fltNonfiniteBehavior, to the fltSemantics struct. The possible enum values are IEEE754 and NanOnly. Only Float8E4M3FN has the NanOnly behavior.

After this change is submitted, I plan on adding the Float8E4M3FN type to MLIR, in the same way as E5M2 was added in https://reviews.llvm.org/D133823.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D137760
2022-11-15 20:26:42 +01:00
Tomas Matheson 1ebfe9b264 [TargetParser] Split AArch64TargetParser from ARMTargetParser
AArch64TargetParser reuses data structures and some data from ARMTargetParser,
which causes more problems than it solves. This change separates them.

Code which is common to ARM and AArch64 is moved to ARMTargetParserCommon
which both ARMTargetParser and AArch64TargetParser use.

Some of the information in AArch64TargetParser.def was unused or nonsensical
(CPU_ATTR, ARCH_ATTR, ARCH_FPU) because it reused data strutures from
ARMTargetParser where some of these make sense. These are removed.

Differential Revision: https://reviews.llvm.org/D137924
2022-11-15 08:59:54 +00:00
Jonas Devlieghere 17737437ed
[dsymutil] Fix assertion in the Reproducer/FileCollector when TMPDIR is empty
Fix a assertion in dsymutil coming from the Reproducer/FileCollector.
When TMPDIR is empty, the root becomes a relative path, triggering an
assertion when adding a relative path to the VFS mapping. This patch
fixes the issue by resolving the relative path and also moves the
assertion up to make it easier to diagnose these issues in the future.

rdar://102170986

Differential revision: https://reviews.llvm.org/D137959
2022-11-14 19:11:34 -08:00
Jonas Devlieghere fd824bdc5e
Revert "[dsymutil] Fix assertion in the Reproducer/FileCollector when TMPDIR is empty"
This reverts commit 68efb4772c because the
test fails on some of the buildbots.
2022-11-14 13:03:47 -08:00
Jonas Devlieghere 68efb4772c
[dsymutil] Fix assertion in the Reproducer/FileCollector when TMPDIR is empty
Fix a assertion in dsymutil coming from the Reproducer/FileCollector.
When TMPDIR is empty, the root becomes a relative path, triggering an
assertion when adding a relative path to the VFS mapping. This patch
fixes the issue by resolving the relative path and also moves the
assertion up to make it easier to diagnose these issues in the future.

rdar://102170986

Differential revision: https://reviews.llvm.org/D137959
2022-11-14 12:34:16 -08:00
Yabin Cui 22339e52da [Support] Use thread safe version of getpwuid and getpwnam.
OpenGroup specification doesn't require getpwuid and getpwnam
to be thread-safe. And musl libc has a not thread-safe implementation.
When building clang with musl, this can make clang-scan-deps crash.

Reviewed By: pirama

Differential Revision: https://reviews.llvm.org/D137864
2022-11-14 17:48:44 +00:00
Philip Reames 780c539844 [RISCV] Implement assembler support for XVentanaCondOps
This change provides an implementation of the XVentanaCondOps vendor extension. This extension is defined in version 1.0.0 of the VTx-family custom instructions specification (https://github.com/ventanamicro/ventana-custom-extensions/releases/download/v1.0.0/ventana-custom-extensions-v1.0.0.pdf) by Ventana Micro Systems.

In addition to the technical contribution, this change is intended to be a test case for our vendor extension policy.

Once this lands, I plan to use this extension to prototype selection lowering to conditional moves. There's an RVI proposal in flight, and the expectation is that lowering to these and the new RVI instructions is likely to be substantially similar.

Differential Revision: https://reviews.llvm.org/D137350
2022-11-14 09:01:54 -08:00
Ying Yi ca875cb4fe [ThinLTO] a ThinLTO warning is added if cache_size_bytes or cache_size_files is too small for the current link job. The warning recommends the user to consider adjusting --thinlto-cache-policy.
A specific case for ThinLTO cache pruning is that the current build is huge, and the cache wasn't big enough to hold the intermediate object files of that build. So in doing that build, a file would be cached, and later in that same build it would be evicted. This was significantly decreasing the effectiveness of the cache. By giving this warning, the user could identify the required cache size/files and improve ThinLTO link speed.

Differential Revision: https://reviews.llvm.org/D135590
2022-11-14 12:27:29 +00:00
River Riddle 46fab76788 [MemoryBuffer] Allow optionally specifying desired buffer alignment
Underlying data may have requirements/expectations/etc. about
the run-time alignment. WritableMemoryBuffer currently uses
a 16 byte alignment, which works for many situations but not all.
Allowing a desired alignment makes it easier to reuse WritableMemoryBuffer
in situations of special alignment, and also removes a problem when
opening files with special alignment constraints. Large files generally
get mmaped, which has ~page alignment, but small files go through
WritableMemoryBuffer which has the much smaller alignment guarantee.

Differential Revision: https://reviews.llvm.org/D137820
2022-11-12 14:38:45 -08:00
Weining Lu 6890b9b71e Add missing changes for "[Clang][LoongArch] Handle -march/-m{single,double,soft}-float/-mfpu options"
Some changes in D136146 were lost by an accidentally sumbit. So recover
them.
2022-11-11 09:06:53 +08:00
Simon Pilgrim 261b3f71c0 [X86] Add missing Zen3 model subtypes
This patch adds support for detecting all current Zen/Zen3+ submodels

Based off a mixture of https://github.com/torvalds/linux/blob/master/drivers/hwmon/k10temp.c#L436 and InstLatx64 https://github.com/InstLatx64/InstLatx64/tree/master/AuthenticAMD CPUID dumps and confirmed by @GGanesh

Differential Revision: https://reviews.llvm.org/D137695
2022-11-10 10:36:09 +00:00
Weining Lu 135a9272a4 [Clang][LoongArch] Handle -march/-m{single,double,soft}-float/-mfpu options
This patch adds options -march, -msingle-float, -mdouble-float,
-msoft-float and -mfpu for LoongArch.

Clang options `msingle_float` and `mdouble_float` are moved from
`m_mips_Features_Group` to `m_Group` because now more than targets use
them.

Reference:
https://github.com/loongson/LoongArch-Documentation/blob/main/docs/LoongArch-toolchain-conventions-EN.adoc

TODO: add -mtune.

Differential Revision: https://reviews.llvm.org/D136146
2022-11-10 17:27:28 +08:00
WANG Xuerui d480271729 [ADT][Triple] Add environment kinds for LoongArch GNU multiarch tuples
The canonical multiarch tuples for LoongArch are defined in [the
LoongArch toolchain conventions][1] document. As the musl port is still
WIP, only the GNU triples are added for now.

The spec mentions `loongarch64-linux-gnuf64`, which is functionally the
same as the existing `loongarch64-linux-gnu` triple, only with the
floating-point ABI part explicitly spelled out. Both forms are
supported, but normalization of one into another is not implemented in
this patch, to give the ecosystem some time to experiment and discuss.

[1]: https://loongson.github.io/LoongArch-Documentation/LoongArch-toolchain-conventions-EN.html

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D135751
2022-11-10 15:05:04 +08:00
Tomas Matheson 103bbddde6 [ARM] Move Triple::getARMCPUForArch into ARMTargetParser
This is very backend specific so either belongs in Toolchains/ARM or in
ARMTargetParser. Since it is used in lldb, ARMTargetParser made more sense.

This is part of an effort to move information about ARM/AArch64 architecture
versions, extensions and CPUs into their respective TargetParsers.

Differential Revision: https://reviews.llvm.org/D137564
2022-11-09 11:52:35 +00:00
Victor Campos 9d1ff787e5 [AArch64] Add support for the Cortex-X3 CPU
Cortex-X3 is an Armv9-A AArch64 CPU.

This patch introduces support for Cortex-X3.

Technical Reference Manual: https://developer.arm.com/documentation/101593/latest

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D136589
2022-11-09 11:33:48 +00:00
Freddy Ye 84a18a260e [X86] Support -march=sierraforest, grandridge, graniterapids.
Reviewed By: skan, pengfei, MaskRay

Differential Revision: https://reviews.llvm.org/D137153
2022-11-09 16:56:03 +08:00
Nathan James 6aa050a690 Reland "[llvm][NFC] Use c++17 style variable type traits"
This reverts commit 632a389f96.

This relands commit
1834a310d0.

Differential Revision: https://reviews.llvm.org/D137493
2022-11-08 14:15:15 +00:00
Nathan James 632a389f96 Revert "[llvm][NFC] Use c++17 style variable type traits"
This reverts commit 1834a310d0.
2022-11-08 13:11:41 +00:00
Nathan James 1834a310d0
[llvm][NFC] Use c++17 style variable type traits
This was done as a test for D137302 and it makes sense to push these changes

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D137493
2022-11-08 12:22:52 +00:00
Fangrui Song 6c927f2a86 Canonicalize PowerPC detection macros to __powerpc__ 2022-11-06 17:29:45 -08:00
Freddy Ye a806fc2767 [X86] Support -march=raptorlake, meteorlake
Reviewed By: pengfei, skan, MaskRay

Differential Revision: https://reviews.llvm.org/D135937
2022-11-04 09:32:17 +08:00
Sam James fa981b5413 Set LLVM_ATOMIC_LIB variable for convenient linking against libatomic
* Set LLVM_ATOMIC_LIB to keep track of when we need to link against libatomic.
* Add detection of mold linker which is required for this.
* Use --as-needed when linking against libatomic as a bonus. On some platforms,
  libatomic may be required only sometimes.

Bug: https://bugs.gentoo.org/832675
Thanks-to: Arfrever Frehtes Taifersar Arahesis <Arfrever@Apache.Org>
Tested-by: erhard_f@mailbox.org <erhard_f@mailbox.org>

Differential Revision: https://reviews.llvm.org/D136280
2022-11-03 21:07:43 +01:00
Simi Pallipurath fa8aeab606 [AArch64] Add support for the Cortex-A715 CPU
Cortex-A715 is an Armv9-A AArch64 CPU.

This patch introduces support for Cortex-A715.

Technical Reference Manual: https://developer.arm.com/documentation/101590/latest.

Reviewed By: vhscampos

Differential Revision: https://reviews.llvm.org/D136957
2022-11-03 09:28:46 +00:00
Serge Pavlov fdab9f1203 [Clang] Check for response file existence prior to check for recursion
As now errors in file operation are handled, check for file existence
must be done prior to check for recursion, otherwise reported errors are
misleading.

Differential Revision: https://reviews.llvm.org/D136090
2022-11-03 14:49:58 +07:00
Félix Cloutier cf239c2f17 [NFC] Make format() more amenable to format attributes
This change modifies the implementation of the format() function
so that vendor forks committed to building with compilers that
support __attribute__((format)) on non-variadic functions can
check the format() function with it.

rdar://84571523
2022-11-02 13:56:51 -07:00
Freddy Ye aee2a35ac4 [X86] Add AVX-NE-CONVERT instructions.
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D135930
2022-10-31 23:39:38 +08:00
Serge Pavlov fd3d7a9f8c Handle errors in expansion of response files
Previously an error raised during an expansion of response files (including
configuration files) was ignored and only the fact of its presence was
reported to the user with generic error messages. This made it difficult to
analyze problems. For example, if a configuration file tried to read an
inexistent file, the error message said that 'configuration file cannot
be found', which is wrong and misleading.

This change enhances handling errors in the expansion so that users
could get more informative error messages.

Differential Revision: https://reviews.llvm.org/D136090
2022-10-31 15:36:41 +07:00
Nicolai Hähnle 0629cce293 ManagedStatic: remove from DebugCounter
[Re-submit after earlier revert due to a test failure. Commit dce78646f0
("clang-tblgen build: avoid duplicate inclusion of libLLVMSupport")
is believe to address the root cause of the test failure.]

Follow the pattern used in MLIR for the cl::opt instances.

v2:
- make DebugCounter::isCountingEnabled public so that the
  DebugCounterOwner doesn't have to be a nested class. This simplifies
  later changes

v3:
- remove the indirection via DebugCounterOwner::instance()

Differential Revision: https://reviews.llvm.org/D129116
2022-10-30 20:47:12 +01:00
Serge Pavlov c1728a40aa Revert "Handle errors in expansion of response files"
This reverts commit 17eb198de9.
Reverted for investigation, because ClangDriverTests failed on some builders.
2022-10-30 02:03:12 +07:00
Serge Pavlov 17eb198de9 Handle errors in expansion of response files
Previously an error raised during an expansion of response files (including
configuration files) was ignored and only the fact of its presence was
reported to the user with generic error messages. This made it difficult to
analyze problems. For example, if a configuration file tried to read an
inexistent file, the error message said that 'configuration file cannot
be found', which is wrong and misleading.

This change enhances handling errors in the expansion so that users
could get more informative error messages.

Differential Revision: https://reviews.llvm.org/D136090
2022-10-29 22:01:47 +07:00
Freddy Ye 23f02693ec [X86] Add AVX-VNNI-INT8 instructions.
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: pengfei, skan

Differential Revision: https://reviews.llvm.org/D135938
2022-10-28 10:39:54 +08:00
Freddy Ye 0e720e6ada [X86] Add AVX-IFMA instructions.
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: pengfei, skan

Differential Revision: https://reviews.llvm.org/D135932
2022-10-28 09:42:30 +08:00
Kito Cheng ae116f43ff [RISCV] Drop single letter b extension support
It splited into several zb* extensions, and `b` is dropped after
0.93, so it time to retired that as other non-ratified zb* extensions.

Currntly clang can accept that with warning:

$ clang -target riscv64-elf ~/hello.c -S  -march=rv64gcb
'+b' is not a recognized feature for this target (ignoring feature)
'+b' is not a recognized feature for this target (ignoring feature)
'+b' is not a recognized feature for this target (ignoring feature)

Reviewed By: asb, luismarques

Differential Revision: https://reviews.llvm.org/D136812
2022-10-27 23:53:32 +08:00
Phoebe Wang b51b90d6e2 [X86][1/2] SUPPORT RAO-INT
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Initial authored by Liu Chen (@LiuChen3)

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D135951
2022-10-27 17:20:07 +08:00
Tatsuyuki Ishi 826f385348 [Support] Use find() for faster StringRef::count (NFC)
While profiling InclusionRewriter, it was found that counting lines was
so slow that it took up 20% of the processing time. Surely, calling
memcmp() of size 1 on every substring in the window isn't a good idea.

Use StringRef::find() instead; in the case of N=1 it will forward to
memcmp which is much more optimal. For 2<=N<256 it will run the same
memcmp loop as we have now, which is still suboptimal but at least does
not regress anything.

Differential Revision: https://reviews.llvm.org/D133658
2022-10-27 10:22:25 +02:00
Félix Cloutier bca75abc01 Revert "[NFC] Make format() more amenable to format attributes"
This reverts commit fb1e90ef07.
2022-10-26 12:53:14 -07:00
Félix Cloutier fb1e90ef07 [NFC] Make format() more amenable to format attributes
This change modifies the implementation of the format() function
so that vendor forks committed to building with compilers that
support __attribute__((format)) on non-variadic functions can
check the format() function with it.

Reviewed By: ahatanak
Differential Revision: https://reviews.llvm.org/D132413
rdar://84571523
2022-10-26 12:10:42 -07:00
Piyou Chen 7d7940fd77 [RISCV] add svinval extension
1. Add the svinval extension support
2. Add the svinval Predicates for its instruction

Note: the svinval instructions defined in https://reviews.llvm.org/D117654

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D136571
2022-10-26 09:45:30 -07:00
Sjoerd Meijer 9bd273047d [Clang][AArch64] Add TargetParser support for defining CPU aliases
This adds AArch64 TargetParser support to define CPU aliases, and
ports the definition of Grace over to that. This is following up
on D136425.

Differential Revision: https://reviews.llvm.org/D136611
2022-10-25 15:08:15 +05:30
David Green 9c48b7f0e7 [AArch64][ARM] Alter v8.1a neon intrinsics to be target-based, not preprocessor based
As a continuation of D132034, this switches the QRDMX v8.1a neon
intrinsics over from preprocessor defines to be target-gated. As there
is no "rdma" or "qrdmx" target feature, they use the "v8.1a"
architecture feature directly.

This works well for AArch64, but something needs to be done for Arm at
the same time, as they both use the same header and tablegen emitter.
This patch opts for adding "v8.1a" and all dependant target features to
the Arm TargetParser, similar to what was recently done for AArch64 but
through initFeatureMap when the Architecture is parsed. I attempted to
make the code similar to the AArch64 backend.

Otherwise this is similar to the changes made in D132034.

Differential Revision: https://reviews.llvm.org/D135615
2022-10-25 09:02:52 +01:00
Freddy Ye fdac4c4e92 [X86] Add CMPCCXADD instructions.
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: pengfei, skan

Differential Revision: https://reviews.llvm.org/D135933
2022-10-25 14:33:39 +08:00
Piyou Chen f8b8426861 [RISCV] Add Svnapot extension
Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D136570
2022-10-24 01:27:04 -07:00
Simon Pilgrim e35d50b7f2 [ADT] APInt.cpp - remove <cstring> duplicate. NFC.
This is already included in APInt.h
2022-10-23 12:44:20 +01:00
Phoebe Wang 363047bef1 [X86] Fix a missing `-` from AMX-FP16 feature string
Fixes #58545
2022-10-22 23:08:07 +08:00
Xiang1 Zhang 661881d436 [X86] Add AMX-FP16 instructions.
Differential Revision: https://reviews.llvm.org/D135941
2022-10-22 08:05:22 +08:00
Phoebe Wang 0487f4b401 [X86] Remove redundant static from constexpr. NFC 2022-10-20 09:29:22 +08:00
Phoebe Wang 62ca79102c [X86][1/2] Support PREFETCHI instructions
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D136040
2022-10-20 08:46:01 +08:00
Serge Pavlov 0dec5e164f Keep configuration file search directories in ExpansionContext. NFC
Class ExpansionContext encapsulates options for search and expansion of
response files, including configuration files. With this change the
directories which are searched for configuration files are also stored
in ExpansionContext.

Differential Revision: https://reviews.llvm.org/D135439
2022-10-19 17:20:14 +07:00
Kazu Hirata 1b97645e56 [ADT] Introduce StringRef::{starts,ends}_width{,_insensitive}
This patch introduces:

  StringRef::starts_with
  StringRef::starts_with_insensitive
  StringRef::ends_with
  StringRef::ends_with_insensitive

to be more compatible with std::string and std::string_view.

I'm planning to deprecate the existing functions in favor of the new
ones.

Differential Revision: https://reviews.llvm.org/D136030
2022-10-15 15:06:37 -07:00
Tatsuyuki Ishi 5699692dfc [Support] Add fast path for StringRef::find with needle of length 2.
InclusionRewriter on Windows (CRLF line endings) will exercise this in a
hot path. Calling memcmp repeatedly would be highly suboptimal for that
use case, so give it a specialized path.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D133660
2022-10-09 00:58:07 +00:00
Freddy Ye 566c277c64 [X86] Remove AVX512VP2INTERSECT from Sapphire Rapids.
For more details, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D135509
2022-10-08 14:54:03 +08:00
Alina Sbirlea 0fbeca0ee6 [SmallVector] Reallocate if assigned memory is right after the current vector, created with capacity 0
Potential solution for
https://github.com/llvm/llvm-project/issues/57324.

Differential Revision: https://reviews.llvm.org/D132512
2022-10-06 15:37:43 -07:00
Tyker 1654b22ac0 [ADT] Add support for more formats in APFixedPoint
Prior to this patch FixedPointSemantics and APFixedPoint only support semantics where
the Scale larger or equal to zero and the Width is larger or equal to the Scale.
This patch removes both those requirements while staying API compatible.
2022-10-06 17:55:31 +02:00
Stella Laurenzo e28b15b572 Add APFloat and MLIR type support for fp8 (e5m2).
(Re-Apply with fixes to clang MicrosoftMangle.cpp)

This is a first step towards high level representation for fp8 types
that have been built in to hardware with near term roadmaps. Like the
BFLOAT16 type, the family of fp8 types are inspired by IEEE-754 binary
floating point formats but, due to the size limits, have been tweaked in
various ways in order to maximally use the range/precision in various
scenarios. The list of variants is small/finite and bounded by real
hardware.

This patch introduces the E5M2 FP8 format as proposed by Nvidia, ARM,
and Intel in the paper: https://arxiv.org/pdf/2209.05433.pdf

As the more conformant of the two implemented datatypes, we are plumbing
it through LLVM's APFloat type and MLIR's type system first as a
template. It will be followed by the range optimized E4M3 FP8 format
described in the paper. Since that format deviates further from the
IEEE-754 norms, it may require more debate and implementation
complexity.

Given that we see two parts of the FP8 implementation space represented
by these cases, we are recommending naming of:

* `F8M<N>` : For FP8 types that can be conceived of as following the
  same rules as FP16 but with a smaller number of mantissa/exponent
  bits. Including the number of mantissa bits in the type name is enough
  to fully specify the type. This naming scheme is used to represent
  the E5M2 type described in the paper.
* `F8M<N>F` : For FP8 types such as E4M3 which only support finite
  values.

The first of these (this patch) seems fairly non-controversial. The
second is previewed here to illustrate options for extending to the
other known variant (but can be discussed in detail in the patch
which implements it).

Many conversations about these types focus on the Machine-Learning
ecosystem where they are used to represent mixed-datatype computations
at a high level. At that level (which is why we also expose them in
MLIR), it is important to retain the actual type definition so that when
lowering to actual kernels or target specific code, the correct
promotions, casts and rescalings can be done as needed. We expect that
most LLVM backends will only experience these types as opaque `I8`
values that are applicable to some instructions.

MLIR does not make it particularly easy to add new floating point types
(i.e. the FloatType hierarchy is not open). Given the need to fully
model FloatTypes and make them interop with tooling, such types will
always be "heavy-weight" and it is not expected that a highly open type
system will be particularly helpful. There are also a bounded number of
floating point types in use for current and upcoming hardware, and we
can just implement them like this (perhaps looking for some cosmetic
ways to reduce the number of places that need to change). Creating a
more generic mechanism for extending floating point types seems like it
wouldn't be worth it and we should just deal with defining them one by
one on an as-needed basis when real hardware implements a new scheme.
Hopefully, with some additional production use and complete software
stacks, hardware makers will converge on a set of such types that is not
terribly divergent at the level that the compiler cares about.

(I cleaned up some old formatting and sorted some items for this case:
If we converge on landing this in some form, I will NFC commit format
only changes as a separate commit)

Differential Revision: https://reviews.llvm.org/D133823
2022-10-04 17:18:17 -07:00
Michael Holman 513f89dc8d Add functionality to load dynamic libraries temporarily
Previously, it was possible to load dynamic libraries which would be unloaded on llvm_shutdown(), but recently ManagedStatic removal changed this so that loaded libraries really can't ever be unloaded. This functionality was very useful, and so to add it back in a more explicit way, I've added new getLibrary() and closeLibrary() methods to allow callers to use the very convenient platform independent abstraction that LLVM has for dynamic libraries.

As a specific use case, the onnx-mlir project was using this functionality with an API that allows instancing LLVM so you can compile a shared library, and then load that library, and eventually close the instance (and library) and compile something else. This change to llvm_shutdown causes libraries to leak and also locks the libraries for the entire duration of the program which prevents reusing library names.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D134763
2022-10-03 16:20:22 -07:00
Vitaly Buka e68c7a9917 Revert "Add APFloat and MLIR type support for fp8 (e5m2)."
Breaks bots https://lab.llvm.org/buildbot/#/builders/37/builds/17086

This reverts commit 2dc68b5398.
2022-10-02 21:22:44 -07:00
Stella Laurenzo 2dc68b5398 Add APFloat and MLIR type support for fp8 (e5m2).
This is a first step towards high level representation for fp8 types
that have been built in to hardware with near term roadmaps. Like the
BFLOAT16 type, the family of fp8 types are inspired by IEEE-754 binary
floating point formats but, due to the size limits, have been tweaked in
various ways in order to maximally use the range/precision in various
scenarios. The list of variants is small/finite and bounded by real
hardware.

This patch introduces the E5M2 FP8 format as proposed by Nvidia, ARM,
and Intel in the paper: https://arxiv.org/pdf/2209.05433.pdf

As the more conformant of the two implemented datatypes, we are plumbing
it through LLVM's APFloat type and MLIR's type system first as a
template. It will be followed by the range optimized E4M3 FP8 format
described in the paper. Since that format deviates further from the
IEEE-754 norms, it may require more debate and implementation
complexity.

Given that we see two parts of the FP8 implementation space represented
by these cases, we are recommending naming of:

* `F8M<N>` : For FP8 types that can be conceived of as following the
  same rules as FP16 but with a smaller number of mantissa/exponent
  bits. Including the number of mantissa bits in the type name is enough
  to fully specify the type. This naming scheme is used to represent
  the E5M2 type described in the paper.
* `F8M<N>F` : For FP8 types such as E4M3 which only support finite
  values.

The first of these (this patch) seems fairly non-controversial. The
second is previewed here to illustrate options for extending to the
other known variant (but can be discussed in detail in the patch
which implements it).

Many conversations about these types focus on the Machine-Learning
ecosystem where they are used to represent mixed-datatype computations
at a high level. At that level (which is why we also expose them in
MLIR), it is important to retain the actual type definition so that when
lowering to actual kernels or target specific code, the correct
promotions, casts and rescalings can be done as needed. We expect that
most LLVM backends will only experience these types as opaque `I8`
values that are applicable to some instructions.

MLIR does not make it particularly easy to add new floating point types
(i.e. the FloatType hierarchy is not open). Given the need to fully
model FloatTypes and make them interop with tooling, such types will
always be "heavy-weight" and it is not expected that a highly open type
system will be particularly helpful. There are also a bounded number of
floating point types in use for current and upcoming hardware, and we
can just implement them like this (perhaps looking for some cosmetic
ways to reduce the number of places that need to change). Creating a
more generic mechanism for extending floating point types seems like it
wouldn't be worth it and we should just deal with defining them one by
one on an as-needed basis when real hardware implements a new scheme.
Hopefully, with some additional production use and complete software
stacks, hardware makers will converge on a set of such types that is not
terribly divergent at the level that the compiler cares about.

(I cleaned up some old formatting and sorted some items for this case:
If we converge on landing this in some form, I will NFC commit format
only changes as a separate commit)

Differential Revision: https://reviews.llvm.org/D133823
2022-10-02 17:17:08 -07:00
Rahul Joshi 04a5ca862b Include <cmath> in FileUtilities.cpp for std:abs(double) 2022-09-29 15:33:49 -07:00
Serge Pavlov b934be2c05 [Support] Class for response file expansion (NFC)
Functions that implement expansion of response and config files depend
on many options, which are passes as arguments. Extending the expansion
requires new options, it in turn causes changing calls in various places
making them even more bulky.

This change introduces a class ExpansionContext, which represents set of
options that control the expansion. Its methods implements expansion of
responce files including config files. It makes extending the expansion
easier.

No functional changes.

Differential Revision: https://reviews.llvm.org/D132379
2022-09-29 19:15:01 +07:00
chenglin.bi 0346f78a6f [ARM64EC] Add arm64ec for getArchName
Followup D125412, return the correct arch name for Arm64EC

Reviewed By: efriedma, mstorsjo

Differential Revision: https://reviews.llvm.org/D134787
2022-09-29 09:05:17 +08:00
serge-sans-paille 16544cbe64 [iwyu] Move <cmath> out of llvm/Support/MathExtras.h
Interestingly, MathExtras.h doesn't use <cmath> declaration, so move it out of
that header and include it when needed.

No functional change intended, but there's no longer a transitive include
fromMathExtras.h to cmath.
2022-09-28 20:49:01 +02:00
Serge Pavlov 5ddde5f80a Revert "[Support] Class for response file expansion (NFC)"
This reverts commit 6e491c48d6.
There are missed changes in flang.
2022-09-28 13:33:28 +07:00
Serge Pavlov 6e491c48d6 [Support] Class for response file expansion (NFC)
Functions that implement expansion of response and config files depend
on many options, which are passes as arguments. Extending the expansion
requires new options, it in turn causes changing calls in various places
making them even more bulky.

This change introduces a class ExpansionContext, which represents set of
options that control the expansion. Its methods implements expansion of
responce files including config files. It makes extending the expansion
easier.

No functional changes.

Differential Revision: https://reviews.llvm.org/D132379
2022-09-28 11:47:59 +07:00
Daniel Kiss 712de9d171 [AArch64] Add all predecessor archs in target info
A given function is compatible with all previous arch versions.
To avoid compering values of the attribute this logic adds all predecessor
architecture values.

Reviewed By: dmgreen, DavidSpickett

Differential Revision: https://reviews.llvm.org/D134353
2022-09-27 10:23:21 +02:00
David Sherwood fbb119412f [AArch64] Add Neoverse V2 CPU support
Adds support for the Neoverse V2 CPU to the AArch64 backend.

Differential Revision: https://reviews.llvm.org/D134352
2022-09-27 07:56:08 +00:00
Daniel Kiss 7e1a873872 [Arm][AArch64] Make getArchFeatures to use TargetParser.def
Prefixing the the SubArch with plus sign makes the ArchFeature name.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D134349
2022-09-23 10:25:37 +02:00
Craig Topper 52708be182 [RISCV] Remove support for the unratified Zbe, Zbf, and Zbm extensions.
These extensions do not appear to be on their way to ratification.
2022-09-22 13:04:41 -07:00
Corentin Jabot c932cef32a Update Unicode to 15.0
Unicode 15.0 adds 4,489 characters, for a total of 149,186 characters.
These additions include 2 new scripts along with 20 new emoji characters,
and 4,193 CJK ideographs.

This changes modify most existing tables including
 - XID_Start/XID_Continue in Clang
 - The character name database (used by \N{} in Clang)
 - The list of formattable/printable codepoints
 - The case folding algorithm (which we had not updated since Unicode 9)
 - The list of nonspacing/enclosing marks used by the column width
   computation algorithm. The rest of the column width algorithm
   is not updated.

Reviewed By: tahonermann

Differential Revision: https://reviews.llvm.org/D133807
2022-09-22 05:03:01 +02:00
Philip Reames eda2af575f [RISCV][MC] Add support for experimental Zawrs extension
This implements experimental support for the Zawrs extension as specified here: https://github.com/riscv/riscv-zawrs/releases/download/V1.0-rc3/Zawrs.pdf. Despite the 1.0 version name, this has not been ratified and there was a major change to proposed specification between rc2 and rc3.  Once this is ratified, it'll move out of experimental status.

This change adds assembly support, but does not include C language or IR intrinsics. We can decide if we want them, and handle that in a separate patch.

Differential Revision: https://reviews.llvm.org/D133443
2022-09-20 10:15:11 -07:00
Fangrui Song 0b140d0910 [Object] Add zstd decompression support to Decompressor
llvm::object::Decompressor is used by many DWARF consumers like llvm-dwarfdump,
llvm-dwp, llvm-symbolizer. Add tests to them. The lldb test can be left to
D133530.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D134116
2022-09-19 11:41:16 -07:00
Fangrui Song 367997d0d6 [Support] Rename llvm::compression::{zlib,zstd}::uncompress to more appropriate decompress
This improves consistency with other places (e.g. llvm::compression::decompress,
llvm::object::Decompressor::decompress, llvm-objcopy).
Note: when zstd::uncompress was added, we noticed that the API `ZSTD_decompress`
is fine while the zlib API `uncompress` is a misnomer.
2022-09-17 12:35:17 -07:00
mbs 7061a3f3f8 [support] Prepare TimeProfiler for cross-thread support
This NFC prepares the TimeProfiler to support the construction
and completion of time profiling 'entries' across threads.

Add ClockType alias so we can change the clock in one place.
(trivial) Use c++ usings instead of typedefs
Rename Entry to TimeTraceProfilerEntry since this type will eventually become public.
Add an intro comment.
Add some smoke unit tests.

Reviewed By: russell.gallop, rriddle, lattner, jloser

Differential Revision: https://reviews.llvm.org/D133153
2022-09-16 10:20:18 -06:00
Martin Storsjö e280940bfb [Support] Access threadIndex via a wrapper function
On Unix platforms, this wrapper function is inline, so it should
expand to the same direct access to the thread local variable. On
Windows, it's a non-inline function within Parallel.cpp, allowing
making the thread_local variable static.

Windows Native TLS doesn't support direct access to thread local
variables in a different DLL, and GCC/binutils on Windows occasionally
has problems with non-static thread local variables too.

This fixes mingw dylib builds with native TLS after
e6aebff674.

At the same time, move the whole thread local variable within
    #if LLVM_ENABLE_THREADS
to fix builds without threading support.

Differential Revision: https://reviews.llvm.org/D133759
2022-09-14 09:19:27 +03:00
Fangrui Song e6aebff674 [ELF] Parallelize relocation scanning
* Change `Symbol::flags` to a `std::atomic<uint16_t>`
* Add `llvm::parallel::threadIndex` as a thread-local non-negative integer
* Add `relocsVec` to part.relaDyn and part.relrDyn so that relative relocations can be added without a mutex
* Arbitrarily change -z nocombreloc to move relative relocations to the end. Disable parallelism for deterministic output.

MIPS and PPC64 use global states for relocation scanning. Keep serial scanning.

Speed-up with mimalloc and --threads=8 on an Intel Skylake machine:

* clang (Release): 1.27x as fast
* clang (Debug): 1.06x as fast
* chrome (default): 1.05x as fast
* scylladb (default): 1.04x as fast

Speed-up with glibc malloc and --threads=16 on a ThunderX2 (AArch64):

* clang (Release): 1.31x as fast
* scylladb (default): 1.06x as fast

Reviewed By: andrewng

Differential Revision: https://reviews.llvm.org/D133003
2022-09-12 12:56:35 -07:00
Joe Loser 62b8a61d6c [llvm] Remove includes of `llvm/Support/STLArrayExtras.h`
`llvm` and downstream internal callers no longer use `array_lengthof`, so drop
the include everywhere.

Differential Revision: https://reviews.llvm.org/D133600
2022-09-09 17:44:00 -06:00
Serge Pavlov 7b9fae05b4 [Clang] Use virtual FS in processing config files
Clang has support of virtual file system for the purpose of testing, but
treatment of config files did not use it. This change enables VFS in it
as well.

Differential Revision: https://reviews.llvm.org/D132867
2022-09-09 18:24:45 +07:00
Serge Pavlov 55e1441f7b Revert "[Clang] Use virtual FS in processing config files"
This reverts commit 9424497e43.
Some buildbots failed, reverted for investigation.
2022-09-09 16:43:15 +07:00
Serge Pavlov 9424497e43 [Clang] Use virtual FS in processing config files
Clang has support of virtual file system for the purpose of testing, but
treatment of config files did not use it. This change enables VFS in it
as well.

Differential Revision: https://reviews.llvm.org/D132867
2022-09-09 16:28:51 +07:00
raghavmedicherla 5d3cf8267f Revert "Support: Add mapped_file_region::sync(), equivalent to msync"
This reverts commit 142f51fc2f.

This shouldn't be committed, it got committed accidentally.
2022-09-08 12:49:52 -04:00
Joe Loser 5e96cea1db [llvm] Use std::size instead of llvm::array_lengthof
LLVM contains a helpful function for getting the size of a C-style
array: `llvm::array_lengthof`. This is useful prior to C++17, but not as
helpful for C++17 or later: `std::size` already has support for C-style
arrays.

Change call sites to use `std::size` instead.

Differential Revision: https://reviews.llvm.org/D133429
2022-09-08 09:01:53 -06:00
David Spickett e428baf001 [LLVM][ARM] Remove options for armv2, 2A, 3 and 3M
Fixes #57486

These pre v4 architectures are not specifically supported
by codegen. As demonstrated in the linked issue.

GCC has not supported 3M since GCC 9 and presumably
2 and 2A earlier than that. So we are aligned in that sense.

(see https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2abd6e34fcf3bd9f9ffafcaa47cdc3ed443f9add)

This removes the options and associated testing.

The Pre_v4 build attribute remains mainly because its absence
would be more confusing. It will not be used other than to
complete the list of build attributes as shown in the ABI.

https://github.com/ARM-software/abi-aa/blob/main/addenda32/addenda32.rst#3352the-target-related-attributes

Reviewed By: nickdesaulniers, peter.smith, rengolin

Differential Revision: https://reviews.llvm.org/D133109
2022-09-08 09:49:48 +00:00
Fangrui Song a41977dd0f [Support] Add llvm::compression::{getReasonIfUnsupported,compress,decompress}
as high-level API on top of `llvm::compression::{zlib,zstd}::*`:

* getReasonIfUnsupported: return nullptr if the specified format is
  supported, or (if unsupported) a string like `LLVM was not built with LLVM_ENABLE_ZLIB ...`
* compress: dispatch to zlib::uncompress or zstd::uncompress
* decompress: dispatch to zlib::uncompress or zstd::uncompress

Move `llvm::DebugCompressionType` from MC to Support to avoid Support->MC cyclic
dependency. There are 40+ uses in llvm-project.

Add another enum class `llvm::compression::Format` to represent supported
compression formats, which may be a superset of ELF compression formats.

See D130458 (llvm-objcopy --{,de}compress-debug-sections for zstd) for a use
case.

Link: https://discourse.llvm.org/t/rfc-zstandard-as-a-second-compression-method-to-llvm/63399
("[RFC] Zstandard as a second compression method to LLVM")

---

Note: this patch alone will cause -Wswitch to llvm/lib/ObjCopy/ELF/ELFObject.cpp

Reviewed By: ckissane, dblaikie

Differential Revision: https://reviews.llvm.org/D130506
2022-09-08 00:58:55 -07:00
Nikita Popov 0444b40ed3 Revert "[Support] Add llvm::compression::{getReasonIfUnsupported,compress,decompress}"
This reverts commit 19dc3cff0f.
This reverts commit 5b19a1f8e8.
This reverts commit 9397648ac8.
This reverts commit 10842b4475.

Breaks the GCC build, as reported here:
https://reviews.llvm.org/D130506#3776415
2022-09-08 09:33:12 +02:00
Fangrui Song 19dc3cff0f [Support] Add llvm::compression::{getReasonIfUnsupported,compress,decompress}
as high-level API on top of `llvm::compression::{zlib,zstd}::*`:

* getReasonIfUnsupported: return nullptr if the specified format is
  supported, or (if unsupported) a string like `LLVM was not built with LLVM_ENABLE_ZLIB ...`
* compress: dispatch to zlib::uncompress or zstd::uncompress
* decompress: dispatch to zlib::uncompress or zstd::uncompress

Move `llvm::DebugCompressionType` from MC to Support to avoid Support->MC cyclic
dependency. There are 40+ uses in llvm-project.

Add another enum class `llvm::compression::Format` to represent supported
compression formats, which may be a superset of ELF compression formats.

See D130458 (llvm-objcopy --{,de}compress-debug-sections for zstd) for a use
case.

Link: https://discourse.llvm.org/t/rfc-zstandard-as-a-second-compression-method-to-llvm/63399
("[RFC] Zstandard as a second compression method to LLVM")

Differential Revision: https://reviews.llvm.org/D130506
2022-09-07 23:53:14 -07:00
Philip Reames a4a29438f4 [RISCV][MC] Add minimal support for Ztso extension
This is a minimalist implementation which simply adds the extension (in the experimental namespace since its not ratified), and wires up the setting of the required ELF header flag. Future changes will include codegen changes to exploit the stronger memory model.

This is intended to implement v0.1 of the proposed specification which can be found in Chapter 25 of https://github.com/riscv/riscv-isa-manual/releases/download/draft-20220723-10eea63/riscv-spec.pdf.

Differential Revision: https://reviews.llvm.org/D133239
2022-09-07 09:30:57 -07:00
raghavmedicherla 142f51fc2f Support: Add mapped_file_region::sync(), equivalent to msync
Add mapped_file_region::sync(), equivalent to POSIX msync,
synchronizing written content to disk without unmapping the region.
Asserts if the mode is not mapped_file_region::readwrite.

Note that I don't have access to a Windows machine, so I can't
easily run those unit tests.

Change by dexonsmith

Differential Revision: https://reviews.llvm.org/D95494
2022-09-06 16:46:37 -04:00
Eli Friedman 63335afb4e [ARM64EC 2/?] Add target triple, and allow targeting it.
Part of patchset to add initial support for ARM64EC.

Per discussion on review, using the triple arm64ec-pc-windows-msvc. The
parsing works the same way as Apple's alternate Arm ABI "arm64e".

Differential Revision: https://reviews.llvm.org/D125412
2022-09-05 12:27:10 -07:00
Kazu Hirata 32aa35b504 Drop empty string literals from static_assert (NFC)
Identified with modernize-unary-static-assert.
2022-09-03 11:17:47 -07:00
Kazu Hirata 89f1433225 Use llvm::lower_bound (NFC) 2022-09-03 11:17:37 -07:00
Cole fc1da043f4 use LLVM_USE_STATIC_ZSTD
removes LLVM_PREFER_STATIC_ZSTD in favor of using a LLVM_USE_STATIC_ZSTD

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D133222
2022-09-02 21:00:38 +00:00
Freddy Ye 66f332bc1a [X86] Add missing key feature for core2
Reviewed By: erichkeane

Differential Revision: https://reviews.llvm.org/D133094
2022-09-02 16:06:07 +08:00
Cole Kissane c0b4f248df tweak zstd behavior in cmake and llvm config for better testing
add LLVM_PREFER_STATIC_ZSTD (default TRUE) cmake config flag
(compression test seems to fail for shared zstd on windows, note that zstd multithread is by default disabled in the static build so it may be a hidden variable)
propagate variable zstd_DIR in LLVMConfig.cmake.in
fix llvm-config CMakeLists.txt behavior for absolute libs windows
get zstd lib name

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D132870
2022-09-01 07:49:43 -07:00
Greg Clayton ea9ac3519c An upcoming patch to LLDB will require the ability to decode base64. This patch adds support for decoding base64 and adds tests.
Resubmission of https://reviews.llvm.org/D126254 with where decodeBase64Byte is no longer a lambda but a static function. Some compilers have different errors or warnings with respect to what needs to be captured and what doesn't (see comments in https://reviews.llvm.org/D126254 for details).

Differential Revision: https://reviews.llvm.org/D128560
2022-08-30 15:52:08 -07:00
Kazu Hirata 6ed2cb4ad5 Revert "[llvm] Use llvm::is_contained (NFC)"
This reverts commit ebf574f59a.

This patch seems to cause build failures on Windows.
2022-08-28 18:52:49 -07:00
Kazu Hirata ebf574f59a [llvm] Use llvm::is_contained (NFC) 2022-08-28 17:35:03 -07:00
Kazu Hirata 472e1a065d [Support] Use std::clamp (NFC)
We can safely use std::clamp here because the call to
report_size_overflow a few lines above guarantees MinSize <= MaxSize.
2022-08-27 21:21:08 -07:00
Nicolai Hähnle 5e812e9580 Revert "ManagedStatic: remove from DebugCounter"
This reverts commit b5b6ef1500.
2022-08-26 11:02:58 +02:00
Nicolai Hähnle b5b6ef1500 ManagedStatic: remove from DebugCounter
Follow the pattern used in MLIR for the cl::opt instances.

v2:
- make DebugCounter::isCountingEnabled public so that the
  DebugCounterOwner doesn't have to be a nested class. This simplifies
  later changes

v3:
- remove the indirection via DebugCounterOwner::instance()

Differential Revision: https://reviews.llvm.org/D129116
2022-08-26 09:22:11 +02:00