Commit Graph

1093 Commits

Author SHA1 Message Date
Fangrui Song a0365abad8 [Driver] Support -gz=zstd
The driver option translates to --compress-debug-sections=zstd cc1/cc1as/GNU
assembler/linker options.

`clang -g -gz=zstd -c a.c` generates ELFCOMPRESS_ZSTD compressed debug info
sections if compression decreases size.
2022-09-08 01:39:06 -07:00
Joseph Huber 2753eafe5a [Clang] Fix the new driver crashing when using '-fsyntax-only'
The new driver currently crashses when attempting to use the
'-fsyntax-only' option. This is because the option causes all output to
be given the `TY_Nothing' type which should signal the end of the
pipeline. The new driver was not treating this correctly and attempting
to use empty input. This patch fixes the handling so we do not attempt
to continue when the input is nothing.

One concession is that we must now check when generating the arguments
for Clang if the input is of 'TY_Nothing'. This is because the new
driver will only create code if the device code is a dependency on the
host, creating the output without the dependency would require a
complete rewrite of the logic as we do not maintain any state between
calls to 'BuildOffloadingActions' so I believe this is the most
straightforward method.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D133161
2022-09-06 19:49:47 -05:00
Joseph Huber 3a623999f3 [OpenMP] Fix logic error when building offloading applications
Summary:
A previous patch removed support for the `-fopenmp-new-driver` and
accidentally used the `isHostOffloading` flag instead of
`isDeviceOffloading` which lead to some build errors when compiling for
the offloading device. This patch addresses that.
2022-09-06 13:56:24 -05:00
Joseph Huber 57ef29f283 [OpenMP] Remove use of removed '-f[no-]openmp-new-driver' flag
The changes in D130020 removed all support for the old method of
compiling OpenMP offloading programs. This means that
`-fopenmp-new-driver` has no effect and `-fno-openmp-new-driver` does
not work. This patch removes the use and documentation of this flag.
Note that the `--offload-new-driver` flag still exists for using the new
driver optionally with CUDA and HIP.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D133367
2022-09-06 13:40:05 -05:00
Kazu Hirata b7a7aeee90 [clang] Qualify auto in range-based for loops (NFC) 2022-09-03 23:27:27 -07:00
Fangrui Song 1491282165 [clang] Change cc1 -fvisibility's canonical spelling to -fvisibility= 2022-09-02 11:49:38 -07:00
Sam Clegg 849df8f6f0 [clang][WebAssembly] Pass `-Wa,--no-type-check` through to the MC layer
I took as an example the `-Wa,--noexecstack` clang flag that maps down
to `cc1 -mnoexecstack`.

Differential Revision: https://reviews.llvm.org/D131217
2022-09-01 02:56:58 -07:00
Richard Smith 146ae4138a Revert "[driver] Additional ignoring of module-map related flags, if modules are disabled"
This reverts commit 33162a81d4.

This change breaks the usage of module maps with modules disabled, such
as for layering checking via `-fmodules-decluse`.

Regression test added.
2022-08-30 18:31:53 -07:00
Argyrios Kyrtzidis 33162a81d4 [driver] Additional ignoring of module-map related flags, if modules are disabled
Differential Revision: https://reviews.llvm.org/D132801
2022-08-29 17:38:00 -07:00
Joseph Huber 47166968db [OpenMP] Deprecate the old driver for OpenMP offloading
Recently OpenMP has transitioned to using the "new" driver which
primarily merges the device and host linking phases into a single
wrapper that handles both at the same time. This replaced a few tools
that were only used for OpenMP offloading, such as the
`clang-offload-wrapper` and `clang-nvlink-wrapper`. The new driver
carries some marked benefits compared to the old driver that is now
being deprecated. Things like device-side LTO, static library
support, and more compatible tooling. As such, we should be able to
completely deprecate the old driver, at least for OpenMP. The old driver
support will still exist for CUDA and HIP, although both of these can
currently be compiled on Linux with `--offload-new-driver` to use the new
method.

Note that this does not deprecate the `clang-offload-bundler`, although
it is unused by OpenMP now, it is still used by the HIP toolchain both
as their device binary format and object format.

When I proposed deprecating this code I heard some vendors voice
concernes about needing to update their code in their fork. They should
be able to just revert this commit if it lands.

Reviewed By: jdoerfert, MaskRay, ye-luo

Differential Revision: https://reviews.llvm.org/D130020
2022-08-26 13:47:09 -05:00
Chris Bieneman 18385cffc5 [HLSL] Add abs library function
This change exposes the abs library function for HLSL scalar types. Abs
is supported for all scalar, vector and matrix types. This patch only
adds a subset of scalar type support.

Fixes #57100 (https://llvm.org/pr57100)

The full documentation of the HLSL abs function is available here:
https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-abs

Reviewed By: bogner

Differential Revision: https://reviews.llvm.org/D131718
2022-08-25 18:56:51 -05:00
Hsiangkai Wang a869014305 [AArch64] Filter out invalid code model in frontend.
AArch64 only supports tiny, small, and large code model. Show error
messages when users specify other code model.

Fix https://github.com/llvm/llvm-project/issues/53402

Differential Revision: https://reviews.llvm.org/D132538
2022-08-25 23:28:28 +00:00
Joseph Huber 2b8f722e63 [OpenMP] Add option to assert no nested OpenMP parallelism on the GPU
The OpenMP device runtime needs to support the OpenMP standard. However
constructs like nested parallelism are very uncommon in real application
yet lead to complexity in the runtime that is sometimes difficult to
optimize out. As a stop-gap for performance we should supply an argument
that selectively disables this feature. This patch adds the
`-fopenmp-assume-no-nested-parallelism` argument which explicitly
disables the usee of nested parallelism in OpenMP.

Reviewed By: carlo.bertolli

Differential Revision: https://reviews.llvm.org/D132074
2022-08-23 14:09:51 -05:00
Weining Lu 15b65bcd65 [Clang][LoongArch] Add initial LoongArch target and driver support
With the initial support added, clang can compile `helloworld` C
to executable file for loongarch64. For example:

```
$ cat hello.c
int main() {
  printf("Hello, world!\n");
  return 0;
}
$ clang --target=loongarch64-unknown-linux-gnu --gcc-toolchain=xxx --sysroot=xxx hello.c
```

The output a.out can run within qemu or native machine. For example:

```
$ file ./a.out
./a.out: ELF 64-bit LSB pie executable, LoongArch, version 1 (SYSV), dynamically linked, interpreter /lib64/ld-linux-loongarch-lp64d.so.1, for GNU/Linux 5.19.0, with debug_info, not stripped
$ ./a.out
Hello, world!
```

Currently gcc toolchain and sysroot can be found here:
https://github.com/loongson/build-tools/releases/download/2022.08.11/loongarch64-clfs-5.1-cross-tools-gcc-glibc.tar.xz

Reference: https://github.com/loongson/LoongArch-Documentation
The last commit hash (main branch) is:
99016636af64d02dee05e39974d4c1e55875c45b

Note loongarch32 is not fully tested because there is no reference
gcc toolchain yet.

Differential Revision: https://reviews.llvm.org/D130255
2022-08-23 13:47:22 +08:00
Usman Nadeem ef5ede52ef [Flang][Driver] Add support for PIC
This patch does the following:

 - Consumes the PIC flags (fPIC/fPIE/fropi/frwpi etc) in flang-new.
   tools::ParsePICArgs() in ToolChains/CommonArgs.cpp is used for this.
 - Adds FC1Option to "-mrelocation-model", "-pic-level", and "-pic-is-pie"
   command line options.
 - Adds the above options to flang/Frontend/CodeGenOptions' data structure.
 - Sets the relocation model in the target machine, and
 - Sets module flags for the respective PIC/PIE type in LLVM IR.

I have tried my best to replicate how clang does things.

Differential Revision: https://reviews.llvm.org/D131533

Change-Id: I68fe64910be28147dc5617826641cea71b92d94d
2022-08-22 11:10:42 -07:00
Craig Topper 37c47b2cac [RISCV] Change how mtune aliases are implemented.
The previous implementation translated from names like sifive-7-series
to sifive-7-rv32 or sifive-7-rv64. This also required sifive-7-rv32
and sifive-7-rv64 to be valid CPU names. As those are not real
CPUs it doesn't make sense to accept them in -mcpu.

This patch does away with the translation and adds sifive-7-series
directly to RISCV.td. Removing sifive-7-rv32 and sifive-7-rv64.
sifive-7-series is only allowed in -mtune.

I've also added "rocket" to RISCV.td but have not removed rocket-rv32
or rocket-rv64.

To prevent -mcpu=sifive-7-series or -mcpu=rocket being used with llc,
I've added a Feature32Bit to all rv32 CPUs. And made it an error to
have an rv32 triple without Feature32Bit. sifive-7-series and rocket
do not have Feature32Bit or Feature64Bit set so the user would need
to provide -mattr=+32bit or -mattr=+64bit along with the -mcpu to
avoid the error.

SiFive no longer names their newer products with 3, 5, or 7 series.
Instead we have p200 series, x200 series, p500 series, and p600 series.
Following the previous behavior would require a sifive-p500-rv32 and
sifive-p500-rv64 in order to support -mtune=sifive-p500-series. There
is currently no p500 product, but it could start getting confusing if
there was in the future.

I'm open to hearing alternatives for how to achieve my main goal
of removing sifive-7-rv32/rv64 as a CPU name.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D131708
2022-08-18 16:22:25 -07:00
Wolfgang Pieb 8564e2fea5 [Inlining] Add a clang option to limit inlining of functions
Add the clang option -finline-max-stacksize=<N> to suppress inlining
of functions whose stack size exceeds the given value.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D131986
2022-08-18 11:56:24 -07:00
Fangrui Song 452fbbda39 [Driver] Use addOptInFlag. NFC 2022-08-13 00:51:04 -07:00
Fangrui Song 3f18f7c007 [clang] LLVM_FALLTHROUGH => [[fallthrough]]. NFC
With C++17 there is no Clang pedantic warning or MSVC C5051.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D131346
2022-08-08 09:12:46 -07:00
Xiang Li 549542b494 [HLSL] emit-obj when set output.
When not set output, set default output to stdout.
When set output with -Fo and no -fcgl, set -emit-obj to generate dx container.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D130858
2022-08-05 16:27:17 -07:00
Xiang Li 8a27a2f89f [HLSL] Support -E option for HLSL.
-E option will set entry function for hlsl.
The format is -E entry_name.

To avoid conflict with existing option with name 'E', add an extra prefix '--'.

A new field HLSLEntry is added to TargetOption.
To share code with HLSLShaderAttr, entry function will be add HLSLShaderAttr attribute too.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D124751
2022-08-04 16:54:19 -07:00
Phoebe Wang 6f867f9102 [X86] Support ``-mindirect-branch-cs-prefix`` for call and jmp to indirect thunk
This is to address feature request from https://github.com/ClangBuiltLinux/linux/issues/1665

Reviewed By: nickdesaulniers, MaskRay

Differential Revision: https://reviews.llvm.org/D130754
2022-08-04 15:12:15 +08:00
Gabriel Ravier 5674a3c880 Fixed a number of typos
I went over the output of the following mess of a command:

(ulimit -m 2000000; ulimit -v 2000000; git ls-files -z |
 parallel --xargs -0 cat | aspell list --mode=none --ignore-case |
 grep -E '^[A-Za-z][a-z]*$' | sort | uniq -c | sort -n |
 grep -vE '.{25}' | aspell pipe -W3 | grep : | cut -d' ' -f2 | less)

and proceeded to spend a few days looking at it to find probable typos
and fixed a few hundred of them in all of the llvm project (note, the
ones I found are not anywhere near all of them, but it seems like a
good start).

Differential Revision: https://reviews.llvm.org/D130827
2022-08-01 13:13:18 -04:00
Chuanqi Xu 834a878367 [C++2b] [Modules] Handle HaveModules with C++2b
Closing https://github.com/llvm/llvm-project/issues/56803. The root
cause for this bug is that we lack a good method to detect the language
mdoe when parsing the command line. There is a FIXME too. Dut to we lack
a good solution now, keep the workaround.
2022-08-01 16:06:34 +08:00
Rainer Orth bf3714884a [clang][Driver] Handle SPARC -mcpu=native etc.
To make use of SPARC support in `getHostCPUName` as implemented by D130272
<https://reviews.llvm.org/D130272>, this patch uses it to handle
`-mcpu=native` and `-mtune=native`.  To match GCC, this patch rejects
`-march` instead of silently treating it as a no-op.

Tested on `sparcv9-sun-solaris2.11` and checking that those options are
passed on as `-target-cpu` resp. `-tune-cpu` as expected.

Differential Revision: https://reviews.llvm.org/D130273
2022-07-29 09:27:09 +02:00
Fangrui Song 1dc26b80b8 [Driver][PowerPC] Support -mtune=
Reviewed By: #powerpc, nemanjai

Differential Revision: https://reviews.llvm.org/D130526
2022-07-28 00:34:04 -07:00
Joseph Huber e27026cce1 [LinkerWrapper] Do not consume `--verbose` from the linker
Summary:
Linkers use `--verbose` to let users investigate search libraries among
other things. The linker wrapper was incorrectly not forwarding this to
the linker job. This patch simply renames this so users can still see
verbose messages from the linker if it was passed.
2022-07-27 16:06:48 -04:00
Ying Yi bfe191dfa7 Disable stack-sizes section by default for PS4.
Differential Revision: https://reviews.llvm.org/D130493
2022-07-27 09:37:20 +01:00
Kai Luo 1cbaf681b0 [clang][AIX] Add option to control quadword lock free atomics ABI on AIX
We are supporting quadword lock free atomics on AIX. For the situation that users on AIX are using a libatomic that is lock-based for quadword types, we can't enable quadword lock free atomics by default on AIX in case user's new code and existing code accessing the same shared atomic quadword variable, we can't guarentee atomicity. So we need an option to enable quadword lock free atomics on AIX, thus we can build a quadword lock-free libatomic(also for advanced users considering atomic performance critical) for users to make the transition smooth.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D127189
2022-07-27 01:56:25 +00:00
Fangrui Song 80a4e6fd31 [Driver] Error for -gsplit-dwarf with RISC-V linker relaxation
-gsplit-dwarf produces a .dwo file which will not be processed by the linker. If
.dwo files contain relocations, they will not be resolved. Therefore the
practice is that .dwo files do not contain relocations.

Address ranges and location description need to use forms/entry kinds indexing
into .debug_addr (DW_FORM_addrx/DW_RLE_startx_endx/etc), which is currently not
implemented.

There is a difficult-to-read MC error with -gsplit-dwarf with RISC-V for both -mrelax and -mno-relax.
```
% clang --target=riscv64-linux-gnu -g -gsplit-dwarf -c a.c
error: A dwo section may not contain relocations
```

We expect to fix -mno-relax soon, so report a driver error for -mrelax for now.

Link: https://github.com/llvm/llvm-project/issues/56642

Reviewed By: compnerd, kito-cheng

Differential Revision: https://reviews.llvm.org/D130190
2022-07-22 17:16:41 -07:00
Fangrui Song 8f0c901c1a [Driver] Report -Wunused-command-line-argument for unimplemented -mtune=
Most common architectures (aarch64,riscv,s390x,x86,etc) have implemented -mtune=.
Don't ignore -mtune= in generic code.
2022-07-22 15:07:28 -07:00
Fangrui Song 1f02ba4843 [Driver][SystemZ] Simplify -mtune
Similar to AArch64.
2022-07-22 14:54:27 -07:00
Fangrui Song a4df2da173 [Driver][RISCV] Simplify -mtune 2022-07-22 14:51:07 -07:00
Fangrui Song 475e526d85 [Driver][AArch64] Simplify -mtune
llvm::sys::getHostCPUName()'s return value is not empty. `-mtune=` (empty value)
has caused a driver error. So we can omit `!TuneCPU.empty()` check.
2022-07-22 14:19:27 -07:00
Abraham Corea Diaz 119d22310b [clang] Add -fdiagnostics-format=sarif option for future SARIF output
Adds `sarif` option to the existing `-fdiagnostics-format` flag
for intended future work with SARIF diagnostics. Currently issues a warning
against the use of diagnostics in SARIF mode, then defaults to clang style for
diagnostics.

Reviewed By: cjdb, denik, aaron.ballman

Differential Revision: https://reviews.llvm.org/D129886
2022-07-21 16:51:15 +00:00
Joseph Huber 0c1b32717b [HIP] Allow the new driver to compile HIP in non-RDC mode
The new driver primarily allows us to support RDC-mode compilations with
proper linking. This is not needed for non-RDC mode compilation, but we
still would like the new driver to be able to handle this mode so we can
transition away from the old driver in the future. This patch adds the
necessary code to support creating a fatbinary for HIP code generation.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D129784
2022-07-20 16:52:23 -04:00
Xiang Li a73a84c447 [HLSL] add -I option for dxc mode.
A new option -I is added for dxc mode.
It is just alias of existing cc1 -I option.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D128462
2022-07-20 11:03:22 -07:00
Louis Dionne ca495e36c1 [clang] Add a new flag -fexperimental-library to enable experimental library features
Based on the discussion at [1], this patch adds a Clang flag called
-fexperimental-library that controls whether experimental library
features are provided in libc++. In essence, it links against the
experimental static archive provided by libc++ and defines a feature
that can be picked up by libc++ to enable experimental features.

This ensures that users don't start depending on experimental
(and hence unstable) features unknowingly.

[1]: https://discourse.llvm.org/t/rfc-a-compiler-flag-to-enable-experimental-unstable-language-and-library-features

Differential Revision: https://reviews.llvm.org/D121141
2022-07-19 15:04:58 -04:00
Joseph Huber 47b0aa5e4b [LinkerWrapper] Rework passing args to the LLVM backend 2022-07-18 12:44:15 -04:00
serge-sans-paille f764dc99b3 [clang] Introduce -fstrict-flex-arrays=<n> for stricter handling of flexible arrays
Some code [0] consider that trailing arrays are flexible, whatever their size.
Support for these legacy code has been introduced in
f8f6324983 but it prevents evaluation of
__builtin_object_size and __builtin_dynamic_object_size in some legit cases.

Introduce -fstrict-flex-arrays=<n> to have stricter conformance when it is
desirable.

n = 0: current behavior, any trailing array member is a flexible array. The default.
n = 1: any trailing array member of undefined, 0 or 1 size is a flexible array member
n = 2: any trailing array member of undefined or 0 size is a flexible array member

This takes into account two specificities of clang: array bounds as macro id
disqualify FAM, as well as non standard layout.

Similar patch for gcc discuss here: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101836

[0] https://docs.freebsd.org/en/books/developers-handbook/sockets/#sockets-essential-functions
2022-07-18 12:45:52 +02:00
dongjunduo f5d9de8cc3 [Clang] Add a new clang option "-ftime-trace=<value>"
The time profiler traces the stages during the clang compile
process. Each compiling stage of a single source file
corresponds to a separately .json file which holds its
time tracing data. However, the .json files are stored in the
same path/directory as its corresponding stage's '-o' option.
For example, if we compile the "demo.cc" to "demo.o" with option
"-o /tmp/demo.o", the time trace data file path is "/tmp/demo.json".

A typical c++ project can contain multiple source files in different
path, but all the json files' paths can be a mess.

The option "-ftime-trace=<value>" allows you to specify where the json
files should be stored. This allows the users to place the time trace
data files of interest in the desired location for further data analysis.

Usage:
    - clang/clang++ -ftime-trace ...
    - clang/clang++ -ftime-trace=the-directory-you-want ...
    - clang/clang++ -ftime-trace=the-directory-you-want/ ...
    - clang/clang++ -ftime-trace=the-full-file-path-you-want ...

Differential Revision: https://reviews.llvm.org/D128048
2022-07-15 08:55:17 -07:00
Ellis Hoag af58684f27 [InstrProf] Add options to profile function groups
Add two options, `-fprofile-function-groups=N` and `-fprofile-selected-function-group=i` used to partition functions into `N` groups and only instrument the functions in group `i`. Similar options were added to xray in https://reviews.llvm.org/D87953 and the goal is the same; to reduce instrumented size overhead by spreading the overhead across multiple builds. Raw profiles from different groups can be added like normal using the `llvm-profdata merge` command.

Reviewed By: ianlevesque

Differential Revision: https://reviews.llvm.org/D129594
2022-07-14 11:41:30 -07:00
Shoaib Meenai 42b3a5fb46 [clang] Add missing header include
With my version of the MSVC tools (14.11.25503), this was failing to
build because of missing declarations of `std::isalnum` and
`std::isdigit`. Include `<cctype>` to get these.
2022-07-14 00:21:09 -07:00
Kazu Hirata cb2c8f694d [clang] Use value instead of getValue (NFC) 2022-07-13 23:39:33 -07:00
Joseph Huber b370be37cc [CUDA] Allow the new driver to compile CUDA in non-RDC mode
The new driver primarily allows us to support RDC-mode compilations with
proper linking. This is not needed for non-RDC mode compilation, but we
still would like the new driver to be able to handle this mode so we can
transition away from the old driver in the future. This patch adds the
necessary code to support creating a fatbinary for CUDA code generation
as well as removing old assumptions and errors about RDC-mode with the
new driver.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D129655
2022-07-13 21:49:15 -04:00
Ben Langmuir 3ce78cbd23 [clang][deps] Fix handling of -MT in module command-line
Follow-up to 6626f6fec3, this fixes the handling of -MT
* If no targets are provided, we need to invent one since cc1 expects
  the driver to have handled it. The default is to use -o, quoting as
  necessary for a make target.
* Fix the splitting for empty string, which was incorrectly treated as
  {""} instead of {}.
* Add a way to test this behaviour in clang-scan-deps.

Differential Revision: https://reviews.llvm.org/D129607
2022-07-13 13:36:15 -07:00
Joseph Huber 6abaa8e210 [CUDA][HIP][NFC] Do not add `-fgpu-rdc` flag twice
Summary:
We currently add the `-fgpu-rdc` flag twice. Once unconditionally for
both the host and device phases of compilation, and a second time only
for the host. When we moved to an unconditional addition of this flag it
the old one was most likely not removed. This patch simply removes the
redundant flag and changes no functionality.
2022-07-13 15:57:53 -04:00
Kai Nacke 880eb839e6 [SystemZ] Enable `-mtune=` option in clang.
https://reviews.llvm.org/D128910 enabled handling of
attribute "tune-cpu" in LLVM. This PR now enables
option `-mtune` in clang, which then generates the
new attribute.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D129562
2022-07-13 11:39:24 -04:00
Nick Desaulniers 2240d72f15 [X86] initial -mfunction-return=thunk-extern support
Adds support for:
* `-mfunction-return=<value>` command line flag, and
* `__attribute__((function_return("<value>")))` function attribute

Where the supported <value>s are:
* keep (disable)
* thunk-extern (enable)

thunk-extern enables clang to change ret instructions into jmps to an
external symbol named __x86_return_thunk, implemented as a new
MachineFunctionPass named "x86-return-thunks", keyed off the new IR
attribute fn_ret_thunk_extern.

The symbol __x86_return_thunk is expected to be provided by the runtime
the compiled code is linked against and is not defined by the compiler.
Enabling this option alone doesn't provide mitigations without
corresponding definitions of __x86_return_thunk!

This new MachineFunctionPass is very similar to "x86-lvi-ret".

The <value>s "thunk" and "thunk-inline" are currently unsupported. It's
not clear yet that they are necessary: whether the thunk pattern they
would emit is beneficial or used anywhere.

Should the <value>s "thunk" and "thunk-inline" become necessary,
x86-return-thunks could probably be merged into x86-retpoline-thunks
which has pre-existing machinery for emitting thunks (which could be
used to implement the <value> "thunk").

Has been found to build+boot with corresponding Linux
kernel patches. This helps the Linux kernel mitigate RETBLEED.
* CVE-2022-23816
* CVE-2022-28693
* CVE-2022-29901

See also:
* "RETBLEED: Arbitrary Speculative Code Execution with Return
Instructions."
* AMD SECURITY NOTICE AMD-SN-1037: AMD CPU Branch Type Confusion
* TECHNICAL GUIDANCE FOR MITIGATING BRANCH TYPE CONFUSION REVISION 1.0
  2022-07-12
* Return Stack Buffer Underflow / Return Stack Buffer Underflow /
  CVE-2022-29901, CVE-2022-28693 / INTEL-SA-00702

SystemZ may eventually want to support "thunk-extern" and "thunk"; both
options are used by the Linux kernel's CONFIG_EXPOLINE.

This functionality has been available in GCC since the 8.1 release, and
was backported to the 7.3 release.

Many thanks for folks that provided discrete review off list due to the
embargoed nature of this hardware vulnerability. Many Bothans died to
bring us this information.

Link: https://www.youtube.com/watch?v=IF6HbCKQHK8
Link: https://github.com/llvm/llvm-project/issues/54404
Link: https://gcc.gnu.org/legacy-ml/gcc-patches/2018-01/msg01197.html
Link: https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/return-stack-buffer-underflow.html
Link: https://arstechnica.com/information-technology/2022/07/intel-and-amd-cpus-vulnerable-to-a-new-speculative-execution-attack/?comments=1
Link: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ce114c866860aa9eae3f50974efc68241186ba60
Link: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00702.html
Link: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00707.html

Reviewed By: aaron.ballman, craig.topper

Differential Revision: https://reviews.llvm.org/D129572
2022-07-12 09:17:54 -07:00
Xiang1 Zhang a45dd3d814 [X86] Support -mstack-protector-guard-symbol
Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D129346
2022-07-12 10:17:00 +08:00