Commit Graph

306 Commits

Author SHA1 Message Date
Fangrui Song 115b1899a1 [lldb][ARC] Fix -Wtautological-bitwise-compare warning 2022-08-13 00:18:37 -07:00
Jonas Devlieghere d446d91aa3
[lldb] Use single-argument static_assert where applicable (NFC)
Since C++17 the message string for static_assert is optional. Replaces
static asserts with an empty string literal with the single-argument
variant.
2022-08-07 14:26:08 -07:00
Slava Gurevich d735307aa2 [LLDB][Reliability] Remove dead code.
Remove redundant code that can never execute due to preceeding logic checks in the code.

Differential Revision: https://reviews.llvm.org/D130929
2022-08-02 10:09:45 -07:00
Kazu Hirata 5cff5142a8 Use value instead of getValue (NFC) 2022-07-15 20:03:13 -07:00
Martin Storsjö 66cdd6548a [lldb] Reduce the stack alignment requirements for the Windows x86_64 ABI
This fixes https://github.com/llvm/llvm-project/issues/56095.

Differential Revision: https://reviews.llvm.org/D129455
2022-07-11 23:41:35 +03:00
Fangrui Song 67854f9ed0 Use value_or instead of getValueOr. NFC 2022-06-29 21:55:02 -07:00
Kazu Hirata 3b7c3a654c Revert "Don't use Optional::hasValue (NFC)"
This reverts commit aa8feeefd3.
2022-06-25 11:56:50 -07:00
Kazu Hirata aa8feeefd3 Don't use Optional::hasValue (NFC) 2022-06-25 11:55:57 -07:00
Kazu Hirata ed8fceaa09 Don't use Optional::getValue (NFC) 2022-06-20 23:35:53 -07:00
Kazu Hirata aa88161b37 [lldb] Use value_or instead of getValueOr (NFC) 2022-06-19 09:12:01 -07:00
Jonas Devlieghere 9916633997
[lldb] Fix modernize-use-override warnings (NFC)
Fix modernize-use-override warnings. Because this check is listed in
LLDB's top level .clang-tidy configuration, the check is enabled by
default and the resulting warnings show up in my editor.

I've audited the modified lines. This is not a blind change.
2022-06-17 15:08:02 -07:00
David Spickett 00a1258593 [lldb][AArch64] Fix corefile memory reads when there are non-address bits
Previously if you read a code/data mask before there was a valid thread
you would get the top byte mask. This meant the value was "valid" as in,
don't read it again.

When using a corefile we ask for the data mask very early on and this
meant that later once you did have a thread it wouldn't read the
register to get the rest of the mask.

This fixes that and adds a corefile test generated from the same program
as in my previous change on this theme.

Depends on D118794

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D122411
2022-05-18 14:13:42 +01:00
Jonas Devlieghere fc54427e76
[lldb] Refactor DataBuffer so we can map files as read-only
Currently, all data buffers are assumed to be writable. This is a
problem on macOS where it's not allowed to load unsigned binaries in
memory as writable. To be more precise, MAP_RESILIENT_CODESIGN and
MAP_RESILIENT_MEDIA need to be set for mapped (unsigned) binaries on our
platform.

Binaries are mapped through FileSystem::CreateDataBuffer which returns a
DataBufferLLVM. The latter is backed by a llvm::WritableMemoryBuffer
because every DataBuffer in LLDB is considered to be writable. In order
to use a read-only llvm::MemoryBuffer I had to split our abstraction
around it.

This patch distinguishes between a DataBuffer (read-only) and
WritableDataBuffer (read-write) and updates LLDB to use the appropriate
one.

rdar://74890607

Differential revision: https://reviews.llvm.org/D122856
2022-04-05 13:46:37 -07:00
Jim Ingham 33f9fc77d1 Don't report memory return values on MacOS_arm64 of SysV_arm64 ABI's.
They don't require that the memory return address be restored prior to
function exit, so there's no guarantee the value is correct.  It's better
to return nothing that something that's not accurate.

Differential Revision: https://reviews.llvm.org/D121348
2022-03-14 15:25:40 -07:00
Pavel Labath c34698a811 [lldb] Rename Logging.h to LLDBLog.h and clean up includes
Most of our code was including Log.h even though that is not where the
"lldb" log channel is defined (Log.h defines the generic logging
infrastructure). This worked because Log.h included Logging.h, even
though it should.

After the recent refactor, it became impossible the two files include
each other in this direction (the opposite inclusion is needed), so this
patch removes the workaround that was put in place and cleans up all
files to include the right thing. It also renames the file to LLDBLog to
better reflect its purpose.
2022-02-03 14:47:01 +01:00
Pavel Labath a007a6d844 [lldb] Convert "LLDB" log channel to the new API 2022-02-02 14:13:08 +01:00
Benjamin Kramer f15014ff54 Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"
This reverts commit ef82063207.

- It conflicts with the existing llvm::size in STLExtras, which will now
  never be called.
- Calling it without llvm:: breaks C++17 compat
2022-01-26 16:55:53 +01:00
serge-sans-paille ef82063207 Rename llvm::array_lengthof into llvm::size to match std::size from C++17
As a conquence move llvm::array_lengthof from STLExtras.h to
STLForwardCompat.h (which is included by STLExtras.h so no build
breakage expected).
2022-01-26 16:17:45 +01:00
Jason Molenda 223e8ca026 Set a default number of address bits on Darwin arm64 systems
With arm64e ARMv8.3 pointer authentication, lldb needs to know how
many bits are used for addressing and how many are used for pointer
auth signing.  This should be determined dynamically from the inferior
system / corefile, but there are some workflows where it still isn't
recorded and we fall back on a default value that is correct on some
Darwin environments.

This patch also explicitly sets the vendor of mach-o binaries to
Apple, so we select an Apple ABI instead of a random other ABI.

It adds a function pointer formatter for systems where pointer
authentication is in use, and we can strip the ptrauth bits off
of the function pointer address and get a different value that
points to an actual symbol.

Differential Revision: https://reviews.llvm.org/D115431
rdar://84644661
2021-12-09 22:53:01 -08:00
Quinn Pham 68bb4e1648 [lldb][NFC] Inclusive Language: Replace master with main
[NFC] This patch fixes a URL within a git repo whose master branch was renamed
to main.
2021-11-01 12:25:41 -05:00
Pavel Labath b5e9f83ea4 [lldb] Remove ConstString from ABI, Architecture and Disassembler plugin names 2021-10-22 10:29:19 +02:00
Michał Górny f290efc326 [lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*
gdbserver does not expose combined ymm* registers but rather XSAVE-style
split xmm* and ymm*h portions.  Extend value_regs to support combining
multiple registers and use it to create user-friendly ymm* registers
that are combined from split xmm* and ymm*h portions.

Differential Revision: https://reviews.llvm.org/D108937
2021-10-20 15:06:45 +02:00
Michał Górny c6d7f248bd [lldb] [ABI/X86] Refactor ABIX86::AugmentRegisterInfo()
Refactor ABIX86::AugmentRegisterInfo() and helper functions for better
readability.  This also fixes listing eax & co. as potential subregs
on 32-bit systems.

Differential Revision: https://reviews.llvm.org/D108937
2021-10-19 13:36:38 +02:00
Michał Górny ee11612ee1 Revert "[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*"
This reverts commit 5352ea4a72.  It seems
to have broken the arm buildbot.
2021-10-19 12:31:25 +02:00
Michał Górny 5352ea4a72 [lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*
gdbserver does not expose combined ymm* registers but rather XSAVE-style
split xmm* and ymm*h portions.  Extend value_regs to support combining
multiple registers and use it to create user-friendly ymm* registers
that are combined from split xmm* and ymm*h portions.

Differential Revision: https://reviews.llvm.org/D108937
2021-10-19 10:31:07 +02:00
Pavel Labath a3939e159f [lldb] Return StringRef from PluginInterface::GetPluginName
There is no reason why this function should be returning a ConstString.

While modifying these files, I also fixed several instances where
GetPluginName and GetPluginNameStatic were returning different strings.

I am not changing the return type of GetPluginNameStatic in this patch, as that
would necessitate additional changes, and this patch is big enough as it is.

Differential Revision: https://reviews.llvm.org/D111877
2021-10-18 10:14:42 +02:00
Michał Górny f70f9620d9 [lldb] [ABI/AArch64] Do not add subregs if some of them are present
Fix a bug introduced while refactoring ABIAArch64::AugmentRegisterInfo()
that caused subregisters to be added even if they were already present.
Instead, abort immediately if at least one subregister is found
(following ABIX86).  While at it, add a test for that.

Differential Revision: https://reviews.llvm.org/D111881
2021-10-15 14:08:37 +02:00
Michał Górny 2712d18148 [lldb] [ABI/X86] Add pseudo-registers if missing
Differential Revision: https://reviews.llvm.org/D108831
2021-10-15 12:55:03 +02:00
Michał Górny 583f67cb4e [lldb] [ABI/AArch64] Add pseudo-regs if missing
Create pseudo-registers on the AArch64 target if they are not provided
by the remote server. This is the case for gdbserver. The created
registers are:

- 32-bit wN partials for 64-bit xN registers
- double precision floating-point dN registers (overlapping with vN)
- single precision floating-point sN registers (overlapping with vN)

Differential Revision: https://reviews.llvm.org/D109876
2021-10-11 17:02:27 +02:00
Michał Górny 5849219126 [lldb] [ABI] Apply AugmentRegisterInfo() to DynamicRegisterInfo::Registers
Call ABI::AugmentRegisterInfo() once with a vector of all defined
registers rather than calling it for every individual register.  Move
and rename RemoteRegisterInfo from gdb-remote to
DynamicRegisterInfo::Register, and use this class when augmenting
registers.

Differential Revision: https://reviews.llvm.org/D111142
2021-10-11 17:02:26 +02:00
Kazu Hirata 3d7d543743 [lldb] Fix a "missing field" warning
This patch fixes:

  llvm-project/lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp:204:6:
  error: missing field 'invalidate_regs' initializer
  [-Werror,-Wmissing-field-initializers]
2021-10-07 10:25:05 -07:00
Pavel Labath 202af507fd Recommit: [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo
The previous version of the patch did not update the definitions in
conditionally compiled code. This patch includes changes to ARC and
windows targets.

Original commit message was:

These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still referenced in the freebds mips implementation, but the
completeness of that implementation is also unknown. All other
architectures just set these fields to zero, which is a cause of
significant bloat in our register info definitions.

Arm also has registers with variable sizes, but they were implemented in
a more gdb-compatible fashion and don't use this feature.

Differential Revision: https://reviews.llvm.org/D110914
2021-10-07 11:15:00 +02:00
Michał Górny 67231650e6 [lldb] [ABI/X86] Split base x86 and i386 classes
Split the ABIX86 class into two classes: base ABIX86 class that is
common to 32-bit and 64-bit ABIs, and ABIX86_i386 class that is the base
for 32-bit ABIs.  This removes the confusing concept that ABIX86
initializes 64-bit ABIs but is only the base for 32-bit ABIs.

Differential Revision: https://reviews.llvm.org/D111216
2021-10-06 22:21:48 +02:00
Stella Stamenova 10f16bc7b2 Revert "[lldb] [ABI/X86] Split base x86 and i386 classes"
This change broke the windows lldb bot.

This reverts commit a30a36f66a.
2021-10-06 10:56:45 -07:00
Michael Forster b2c906da19 Revert "[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo"
This reverts commit 00e704bf08.

This commit should should have updated
llvm/llvm-project/lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp like the other
architectures.
2021-10-06 18:15:25 +02:00
Michał Górny a30a36f66a [lldb] [ABI/X86] Split base x86 and i386 classes
Split the ABIX86 class into two classes: base ABIX86 class that is
common to 32-bit and 64-bit ABIs, and ABIX86_i386 class that is the base
for 32-bit ABIs.  This removes the confusing concept that ABIX86
initializes 64-bit ABIs but is only the base for 32-bit ABIs.

Differential Revision: https://reviews.llvm.org/D111216
2021-10-06 13:59:21 +02:00
Pavel Labath 00e704bf08 [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo
These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still referenced in the freebds mips implementation, but the
completeness of that implementation is also unknown. All other
architectures just set these fields to zero, which is a cause of
significant bloat in our register info definitions.

Arm also has registers with variable sizes, but they were implemented in
a more gdb-compatible fashion and don't use this feature.

Differential Revision: https://reviews.llvm.org/D110914
2021-10-06 13:22:38 +02:00
Pavel Labath 93c1b3caf0 [lldb] Remove some anonymous namespaces
.. and reduce the scope of others. They don't follow llvm coding
standards (which say they should be used only when the same effect
cannot be achieved with the static keyword), and they set a bad example.
2021-10-05 08:35:18 +02:00
Michał Górny 47d57547f4 [lldb] [Process/gdb-remote] Alias sp to x31 on AArch64 for gdbserver
Alias the "sp" register to "x31" on AArch64 if one is present and does
not have the alt_name.  This is the case when connecting to gdbserver.

Differential Revision: https://reviews.llvm.org/D109695
2021-09-16 13:13:47 +02:00
Michał Górny c208deb900 [lldb] [ABI/AArch64] Recognize special regs by their xN names too
Recognize lr/sp/fp by their numeric register names in the ABI plugin.
This is necessary to mark them appropriately when interfacing with
gdbserver.

Differential Revision: https://reviews.llvm.org/D109691
2021-09-16 10:23:31 +02:00
Michał Górny e3d878bdd8 [lldb] Remove redundant register alt_names
Remove redundant register alt_names that correspond to their respective
generic names.  D108554 makes it possible to query registers through
their generic names directly, therefore making repeating them via
alt_name unnecessary.

While at it, also remove alt_names that are equal to register names
on PPC.

This patch does not alter register definitions where the generic names
are listed as primary names, and other names are provided as alt_name
(e.g. ARM).

Differential Revision: https://reviews.llvm.org/D109626
2021-09-13 13:05:06 +02:00
Pavel Labath b03126768a [lldb] Remove PluginInterface::GetPluginVersion
In all these years, we haven't found a use for this function (it has
zero callers). Lets just remove the boilerplate.

Differential Revision: https://reviews.llvm.org/D109600
2021-09-13 10:29:00 +02:00
Michał Górny c01b76e733 [lldb] Support "eflags" register name in generic reg fallback
Enhance the generic register fallback code to support "eflags" register
name in addition to "rflags", as the former is used by gdbserver.  This
permits lldb-server to recognize the generic flags register when
interfacing with gdbserver-style target.xml (i.e. without generic=""
attributes), and therefore aligns ABI plugins' AugmentRegisterInfo()
between lldb-server and gdbserver.

Differential Revision: https://reviews.llvm.org/D108548
2021-09-08 11:33:29 +02:00
Alex Langford 0a74fbb7b1 [lldb][NFC] Fix incorrect log and comment
Likely copy & paste issue that was overlooked years ago
2021-07-27 14:43:42 -07:00
Muhammad Omair Javaid e8f998c0c5 AArch64 Linux and elf-core PAC stack unwinder support
This patch builds on D100521 and other related patches to add support
for unwinding stack on AArch64 systems with pointer authentication
feature enabled.

We override FixCodeAddress and FixDataAddress function in ABISysV_arm64
class. We now try to calculate and set code and data masks after reading
data_mask and code_mask registers exposed by AArch64 targets running Linux.

This patch utilizes core file linux-aarch64-pac.core for testing that
LLDB can successfully unwind stack frames in the presence of signed
return address after masking off ignored bits.

This patch also includes a AArch64 Linux native test case to demonstrate
successful back trace calculation in presence of pointer authentication
feature.

Differential Revision: https://reviews.llvm.org/D99944
2021-06-16 02:09:46 +05:00
Michael Benfield 00d19c6704 [various] Remove or use variables which are unused but set.
This is in preparation for the -Wunused-but-set-variable warning.

Differential Revision: https://reviews.llvm.org/D102942
2021-06-01 15:38:48 -07:00
Jonas Devlieghere 8770b4ecca [lldb] Implement ABI::Fix{Code,Data}Address for AArch64
Implement FixCodeAddress and FixDataAddress for ABIMacOSX_arm64 and
ABISysV_arm64 and add missing calls to RegisterContextUnwind. We need
this to unwind on Apple Silicon where libraries like libSystem are
arm64e even when the program being debugged is arm64.

Differential revision: https://reviews.llvm.org/D100521
2021-04-16 13:49:38 -07:00
Raphael Isemann 03310c1e95 [lldb][NFC] Give CompilerType's IsArrayType/IsVectorType/IsBlockPointerType out-parameters default values
We already do this for most functions that have out-parameters, so let's do
the same here and avoid all the `nullptr, nullptr, nullptr` in every call.
2021-02-23 11:15:31 +01:00
Jason Molenda fcdef15d77 Add a new Row setting to mark all un-declared regs as Undefined
Add a new state for UnwindPlan::Row which indicates that any
register not listed is not defined, and should not be found in
stack frames newer than this one and passed up the stack.  Mostly
intended for use with architectural default unwind plans that are
used for jitted stack frames, where we have no unwind information
or start address.  lldb has no way to tell if registers were
spilled in the jitted frame & overwritten, so passing register
values up the stack is not safe to show the user.

Architectural default unwind plans are also used as a fast unwind
plan on x86_64 in particular, and are used as the fallback unwind
plans when lldb thinks it may be able to work around a problem
which causes the unwinder to stop walking the stack early.

For fast unwind plans, when we don't find a register location in
the arch default unwind plan, we fall back to computing & using
the full unwind plan. One small part of this patch is to know that
a register marked as Undefined in the fast unwind plan is a special
case, and we should continue on to the full unwind plan to find what
the real unwind rule is for this register.

Differential Revision: https://reviews.llvm.org/D96829
<rdar://problem/70398009>
2021-02-17 23:52:28 -08:00
Benjamin Kramer 2dbe88db58 [lldb] Fix up SysV ABI implementations after 057efa9916 2021-02-13 01:34:00 +01:00