6e3c705d74
Try committing again. Add OptionalDefOperand. Remove clobbersPred.
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llvm-svn: 38498
2007-07-10 18:05:01 +00:00
9835db562f
ImmutablePredicateOperand is no more.
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llvm-svn: 37963
2007-07-06 23:23:38 +00:00
b567e3ffb0
Add the byval attribute
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llvm-svn: 37940
2007-07-06 10:57:03 +00:00
a7d41aad4f
Refactor code to add initial support for OptionalDefOperand.
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llvm-svn: 37933
2007-07-06 01:05:26 +00:00
ffabff11c0
Teach DAGISelEmitter about zero_reg.
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llvm-svn: 37900
2007-07-05 07:19:45 +00:00
e32e7fb40d
Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time.
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llvm-svn: 37899
2007-07-05 07:19:29 +00:00
2660cef6d7
Convert .cvsignore files
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llvm-svn: 37801
2007-06-29 16:35:07 +00:00
59e5e118ac
One additional field in TargetRegisterDesc.
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llvm-svn: 37760
2007-06-27 17:09:34 +00:00
2e887c0b84
Add immediate sub-registers.
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llvm-svn: 37738
2007-06-26 20:59:16 +00:00
e8c1e428f2
Revert the earlier change that removed the M_REMATERIALIZABLE machine
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instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).
llvm-svn: 37728
2007-06-26 00:48:07 +00:00
02d1a7844a
Fix a typo in a comment.
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llvm-svn: 37727
2007-06-26 00:43:18 +00:00
b4777f087a
silence warning when assertions are disabled.
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llvm-svn: 37654
2007-06-19 06:40:46 +00:00
9e82064924
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
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with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.
llvm-svn: 37644
2007-06-19 01:48:05 +00:00
a7ca624028
Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.
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llvm-svn: 37643
2007-06-19 01:26:51 +00:00
f274efef9f
Add support to tablegen for specifying subregister classes on a per register class basis.
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llvm-svn: 37572
2007-06-13 22:20:15 +00:00
452a818c6a
Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions.
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llvm-svn: 37465
2007-06-06 10:14:55 +00:00
6357bf20fa
Patches by Chuck Rose to unbreak V Studio builds.
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Thanks Chuck!
llvm-svn: 37428
2007-06-04 23:52:59 +00:00
a23ef8a8f2
Remove the operator<< for MVT::ValueType in preparation for MVT::ValueType
...
being changed from an enum to an integer type, which can't have a custom
operator<< overload.
llvm-svn: 37412
2007-06-04 16:11:03 +00:00
c23c9fce34
The Intrinsic::getDeclaration function's Tys parameter only contains the
...
types of the iAny types involved in the overloaded intrinsic. Thus, we
can't use the argument number as the index but have to count them separately
in order to index Tys correctly. This patch rectifies this situation.
llvm-svn: 37296
2007-05-22 19:30:31 +00:00
b99726d7a0
Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand.
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llvm-svn: 37116
2007-05-16 20:45:24 +00:00
2b5badc0e1
Fix CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll, the other recent
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patches are also needed.
llvm-svn: 37070
2007-05-15 01:36:44 +00:00
a32dee205f
Added \!con(a,b) syntax to concatnate two dag fragments.
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llvm-svn: 37063
2007-05-15 01:23:24 +00:00
c0fb94596a
Mark all (not just the first) predicate operand M_PREDICATE_OPERAND.
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llvm-svn: 37061
2007-05-15 01:20:36 +00:00
b0925c0e49
PredicateOperand related bug fix.
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llvm-svn: 37060
2007-05-15 01:19:51 +00:00
5162f584c7
If a PredicateOperand has an empty ExecuteAlways field, treat it as if a normal operand for isel.
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llvm-svn: 36946
2007-05-08 21:04:07 +00:00
e6182267d7
Add an "implies" field to features. This indicates that, if the current
...
feature is set, then the features in the implied list should be set also.
The opposite is also enforced: if a feature in the implied list isn't set,
then the feature that owns that implies list shouldn't be set either.
llvm-svn: 36756
2007-05-04 20:38:40 +00:00
fd788aafba
A bit of feedback from Chris that I missed; error rather than asserting.
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llvm-svn: 36619
2007-05-01 06:08:36 +00:00
27a625a74b
llvm bug #1350 , parts 1, 2, and 3.
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llvm-svn: 36618
2007-05-01 05:57:02 +00:00
2966c9072b
Update a comment to reflect recent changes in the type system.
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llvm-svn: 36486
2007-04-26 19:43:14 +00:00
83fc4f3c3c
bugfix: remember that ResNode was declared.
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llvm-svn: 36477
2007-04-26 17:03:22 +00:00
8996dce6ec
Fix generation of certain scheduler itineraries.
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llvm-svn: 36338
2007-04-22 09:04:24 +00:00
f0c955b4dc
Bug fix; add super-registers sets.
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llvm-svn: 36296
2007-04-21 00:55:29 +00:00
2518889872
Implement "general dynamic", "initial exec" and "local exec" TLS models for
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X86 32 bits.
llvm-svn: 36283
2007-04-20 21:38:10 +00:00
ac9fdde7f4
Add sub-registers sets.
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llvm-svn: 36278
2007-04-20 21:13:46 +00:00
9c2eec377e
For PR1328:
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Don't assert everytime an intrinsic name isn't recognized. Instead, make
the assert optional when callin getIntrinsicID(). This allows the assembler
to handle invalid intrinsic names gracefully.
llvm-svn: 36120
2007-04-16 06:54:34 +00:00
e67d0c226d
For PR1297:
...
Implement code generation for overloaded intrinsic functions. The basic
difference is that "actual" argument types must be provided when
constructing intrinsic names and types. Also, for recognition, only the
prefix is examined. If it matches, the suffix is assumed to match. The
suffix is checked by the Verifier, however.
llvm-svn: 35539
2007-04-01 07:20:02 +00:00
98d2104c6f
Add support for the v1i64 type. This makes better code for this:
...
#include <mmintrin.h>
extern __m64 C;
void baz(__v2si *A, __v2si *B)
{
*A = C;
_mm_empty();
}
We get this:
_baz:
call "L1$pb"
"L1$pb":
popl %eax
movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
movq (%eax), %mm0
movl 4(%esp), %eax
movq %mm0, (%eax)
emms
ret
GCC gives us this:
_baz:
pushl %ebx
call L3
"L00000000001$pb":
L3:
popl %ebx
subl $8, %esp
movl L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
movl (%eax), %edx
movl 4(%eax), %ecx
movl 16(%esp), %eax
movl %edx, (%eax)
movl %ecx, 4(%eax)
emms
addl $8, %esp
popl %ebx
ret
llvm-svn: 35351
2007-03-26 07:53:08 +00:00
9d7d130835
Recognize target instruction flag 'isReMaterializable'.
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llvm-svn: 35159
2007-03-19 06:20:37 +00:00
ed4b303c10
Refactoring of formal parameter flags. Enable properly use of
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zext/sext/aext stuff.
llvm-svn: 35008
2007-03-07 16:25:09 +00:00
e7ec3bc7bc
Use new SDIselParamAttr enumeration. This removes "magick" constants
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from formal attributes' flags processing.
llvm-svn: 34963
2007-03-06 08:12:33 +00:00
7fb0823a7b
rename some CCActions
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llvm-svn: 34724
2007-02-28 05:29:06 +00:00
22778a3d1c
implement CCPromoteToType
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llvm-svn: 34720
2007-02-28 04:43:48 +00:00
cbebe4600f
reapply
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llvm-svn: 34697
2007-02-27 22:08:27 +00:00
bf5f3945fd
*** empty log message ***
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llvm-svn: 34696
2007-02-27 22:05:51 +00:00
116ec30e4f
Backing out
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CodeGenTarget.cpp updated: 1.82 -> 1.83
Record.cpp updated: 1.55 -> 1.56
Record.h updated: 1.59 -> 1.60
TableGen.cpp updated: 1.47 -> 1.48
It's missing CallingConvEmitter.h
llvm-svn: 34693
2007-02-27 21:44:08 +00:00
fa024e1ad1
initial support for calling convention generation, still unfinished.
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llvm-svn: 34682
2007-02-27 20:43:37 +00:00
68a8bcce99
emit an enum value for the # of target registers.
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llvm-svn: 34624
2007-02-26 03:34:38 +00:00
49e58cfe42
the lengths of the strings are known, just use memcmp
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llvm-svn: 34321
2007-02-15 19:26:16 +00:00
1e92e06779
Implement Function::getIntrinsicID without it needing to call Value::getName,
...
which allocates a string. This speeds up instcombine on 447.dealII by 5%.
llvm-svn: 34318
2007-02-15 19:17:16 +00:00
09575bac2e
For PR1195:
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Change use of "packed" term to "vector" in comments, strings, variable
names, etc.
llvm-svn: 34300
2007-02-15 03:39:18 +00:00
Evan Cheng