c0bf377f98
bye bye Pattern ISEL
...
llvm-svn: 25553
2006-01-23 21:56:07 +00:00
fef7dec9cc
added stores to lsmark
...
llvm-svn: 25552
2006-01-23 21:51:33 +00:00
208bbe9ca9
fix up more lsmark stuff
...
llvm-svn: 25550
2006-01-23 21:23:26 +00:00
ba97ea52d4
yea, lowering this stuff will basically work
...
llvm-svn: 25549
2006-01-23 20:59:50 +00:00
de02d7727f
Add explicit #includes of <iostream>
...
llvm-svn: 25515
2006-01-22 23:41:00 +00:00
5df67bcd50
typo
...
llvm-svn: 25464
2006-01-19 21:10:38 +00:00
688ea707d8
nasty nasty patterns
...
llvm-svn: 25463
2006-01-19 20:49:37 +00:00
cfd9c6e526
fix short immediate loads
...
llvm-svn: 25371
2006-01-16 21:41:39 +00:00
34380b7675
stack and rpcc
...
llvm-svn: 25369
2006-01-16 21:22:38 +00:00
81b108c54d
Friendly names
...
llvm-svn: 25364
2006-01-16 19:53:25 +00:00
2fba8a3aaa
bswap implementation
...
llvm-svn: 25312
2006-01-14 03:14:10 +00:00
045371a744
make DAG isel the default
...
llvm-svn: 25282
2006-01-13 18:49:47 +00:00
8e2f52e645
expand unsupported stacksave/stackrestore nodes
...
llvm-svn: 25272
2006-01-13 02:42:53 +00:00
1b8121b227
Add bswap, rotl, and rotr nodes
...
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
llvm-svn: 25222
2006-01-11 21:21:00 +00:00
91eda00a7a
this pattern was bogus
...
llvm-svn: 25197
2006-01-11 03:33:06 +00:00
599e73f21c
Int immediate loading fix
...
llvm-svn: 25182
2006-01-10 19:12:47 +00:00
32e7d1ed4a
proper branch not equal sequence
...
llvm-svn: 25159
2006-01-09 19:49:58 +00:00
346b4120af
make 0 codegen much better
...
llvm-svn: 25131
2006-01-06 19:41:51 +00:00
da56ae98a9
unbreak the build, these are now in TargetSelectionDAG.td
...
llvm-svn: 25109
2006-01-05 04:48:15 +00:00
deeafa0f00
Had expand logic backward.
...
llvm-svn: 25105
2006-01-05 01:47:43 +00:00
762e9ec06c
Added initial support for DEBUG_LABEL allowing debug specific labels to be
...
inserted in the code.
llvm-svn: 25104
2006-01-05 01:25:28 +00:00
eaf5ed1438
typeo
...
llvm-svn: 25060
2006-01-02 21:15:53 +00:00
38e0b281da
Remove a 'using namespace std'.
...
llvm-svn: 25059
2006-01-01 22:20:31 +00:00
6bec63aac9
Move brcond over and fix some imm patterns. This may be the last change before changing the default alpha isel.
...
llvm-svn: 25057
2006-01-01 22:16:14 +00:00
f0545f7c48
clean this function up some
...
llvm-svn: 25055
2006-01-01 22:13:54 +00:00
60ab61fcfc
improve constant loading. Still sucks, but oh well
...
llvm-svn: 25047
2005-12-30 02:30:02 +00:00
50d9caf6a4
let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean
...
llvm-svn: 25040
2005-12-29 01:06:12 +00:00
34e4782c95
Fix up immediate handling
...
llvm-svn: 25039
2005-12-29 00:50:08 +00:00
5bd1c2783b
Restore some happiness to the JIT
...
llvm-svn: 25026
2005-12-27 06:25:50 +00:00
962dcbd572
Fix alpha regressions.
...
llvm-svn: 25025
2005-12-27 03:53:58 +00:00
14c53b45f5
Added field noResults to Instruction.
...
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
llvm-svn: 25017
2005-12-26 09:11:45 +00:00
f520093eb3
add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG
...
llvm-svn: 25011
2005-12-25 17:36:48 +00:00
0fce613eff
All that just to lower div and rem
...
llvm-svn: 25008
2005-12-25 01:34:27 +00:00
5b18ed9e60
All addressing modes are now exposed. The only remaining relocated forms
...
are for function prologue.
TODO: move external symbols over to using RelLit.
: have a pattern that matches constpool|globaladdr
: have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003
2005-12-24 08:29:32 +00:00
b9aaea3564
Unify the patterns for loads and stores. Now offset addressing should be
...
supported. This almost completes memory operations.
llvm-svn: 25002
2005-12-24 07:34:33 +00:00
4621488965
Let's see if we can break things.
...
Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.
llvm-svn: 25001
2005-12-24 05:36:33 +00:00
636e1aed43
move loads and stores over. Smart addr selection comming
...
llvm-svn: 25000
2005-12-24 03:41:56 +00:00
177d7af5d5
remove dead code
...
llvm-svn: 24965
2005-12-22 21:16:08 +00:00
9e296bee9a
Disengage DEBUG_LOC from non-PPC targets.
...
llvm-svn: 24919
2005-12-21 20:51:37 +00:00
cd54254af3
fix FP selects
...
llvm-svn: 24672
2005-12-12 20:30:09 +00:00
b8296181e0
restore a more restricted select
...
llvm-svn: 24668
2005-12-12 17:43:52 +00:00
20d0b81c04
FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself
...
llvm-svn: 24658
2005-12-11 03:54:31 +00:00
87bf2234b5
it helps if your conditionals are not reversed
...
llvm-svn: 24641
2005-12-09 00:45:42 +00:00
26473b6b58
fix divide and remainder
...
llvm-svn: 24628
2005-12-06 23:27:39 +00:00
973cd1c845
more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp
...
llvm-svn: 24625
2005-12-06 20:43:30 +00:00
29b7ef0065
OK, this does wonders for broken stuff
...
llvm-svn: 24624
2005-12-06 20:40:34 +00:00
e788bbf6ef
added instructions with inverted immediates
...
llvm-svn: 24614
2005-12-06 00:33:53 +00:00
08c4a775e6
yea, it helps to have your path set right when testing
...
llvm-svn: 24613
2005-12-05 23:41:45 +00:00
3c7c4d7508
These never trigger, but whatever
...
llvm-svn: 24612
2005-12-05 23:19:44 +00:00
5bfcd1e63a
move this over to the dag
...
llvm-svn: 24609
2005-12-05 20:50:53 +00:00
9410433966
fix constant pool loads
...
llvm-svn: 24607
2005-12-05 17:51:02 +00:00
7bb09912c8
major think-o
...
llvm-svn: 24564
2005-12-01 17:48:51 +00:00
006bb04f3a
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
...
work. This change has no effect on generated code.
llvm-svn: 24563
2005-12-01 04:51:06 +00:00
ce68ef8073
Flags where I think I need them, quick, before the nightly tester starts
...
llvm-svn: 24560
2005-12-01 01:53:10 +00:00
4b25924d2a
SelectNodeTo now returns its result, we must pay attention to it.
...
llvm-svn: 24552
2005-11-30 23:04:38 +00:00
6f8c1ace6e
No longer track value types for asm printer operands, and remove them as
...
an argument to every operand printing function. Requires some slight
tweaks to x86, the only user.
llvm-svn: 24541
2005-11-30 18:54:35 +00:00
7ffe3affda
remove redundant code
...
llvm-svn: 24538
2005-11-30 17:14:11 +00:00
ede966e8ee
Make typesafe that which isn't: FCMOVxx
...
llvm-svn: 24536
2005-11-30 17:11:20 +00:00
873ed82a36
FPSelect and more custom lowering
...
llvm-svn: 24535
2005-11-30 16:10:29 +00:00
6db615df14
All sorts of stuff.
...
Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy. They should be custom lowered though.
Lots more stuff compiles now (go go single source!). Of course, none of it
probably works, but that is what the nightly tester can find out :)
llvm-svn: 24533
2005-11-30 07:19:56 +00:00
9c415364cf
No targets support line number info yet.
...
llvm-svn: 24513
2005-11-29 06:16:21 +00:00
d6a0308470
Fix warning, the better way. Really, this is what this instruction is for, so use it
...
llvm-svn: 24486
2005-11-22 20:59:00 +00:00
03390557fa
Fix warning
...
llvm-svn: 24485
2005-11-22 20:56:05 +00:00
0294e33ea4
massive DAGISel patch. lots and lots more stuff compiles now
...
llvm-svn: 24483
2005-11-22 04:20:06 +00:00
882b9fa977
Switch to using the generic constant pool emitter impl, use shorter
...
CPI names
llvm-svn: 24466
2005-11-21 08:29:17 +00:00
99946fb63f
Adjust to capitalized AsmPrinter method names
...
llvm-svn: 24456
2005-11-21 07:51:23 +00:00
9885c97088
Use PrivateGlobalPrefix for basic blocks
...
llvm-svn: 24451
2005-11-21 07:38:08 +00:00
a43b832f7f
Switch to the new shared SwitchSection
...
llvm-svn: 24450
2005-11-21 07:30:28 +00:00
2c0b435ba6
Rename SwitchSection -> switchSection to avoid conflicting with a future
...
change.
llvm-svn: 24443
2005-11-21 06:55:27 +00:00
8a4995e42a
Start using PrivateGlobalPrefix correctly
...
llvm-svn: 24442
2005-11-21 06:51:52 +00:00
6bc51c6f34
prevent latent switch creation
...
llvm-svn: 24413
2005-11-18 13:57:03 +00:00
59eefd4787
who would have thought you would want to write into globals too
...
llvm-svn: 24381
2005-11-16 21:15:53 +00:00
54c8fcf303
unbreak the build
...
llvm-svn: 24339
2005-11-13 01:45:23 +00:00
ab72424488
enable LSR by default on alpha
...
llvm-svn: 24337
2005-11-12 19:21:08 +00:00
2ba45d1ee9
fix more regressions
...
llvm-svn: 24335
2005-11-12 19:06:28 +00:00
56526ec1a9
fix READCYCLECOUNTER
...
llvm-svn: 24334
2005-11-12 19:04:09 +00:00
97e8207a05
fix yet more regressions
...
llvm-svn: 24308
2005-11-11 23:08:46 +00:00
fab772045e
generate chain result
...
llvm-svn: 24307
2005-11-11 23:02:55 +00:00
5b3b9d7052
Fix a bunch more alpha regressions
...
llvm-svn: 24304
2005-11-11 19:52:25 +00:00
01aa56397d
continued readcyclecounter support
...
llvm-svn: 24300
2005-11-11 16:47:30 +00:00
e373163e95
fix a bunch of regressions
...
llvm-svn: 24269
2005-11-10 16:59:55 +00:00
97a7fcfd2b
whatever. Intermediate patch to see what breaks. Seems ok.
...
llvm-svn: 24260
2005-11-09 19:17:08 +00:00
b28f214033
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
...
llvm-svn: 24233
2005-11-08 02:11:51 +00:00
5c7d731832
If the module has no t-t and the host is an alpha, default to using the Alpha BE
...
llvm-svn: 24110
2005-10-30 16:44:01 +00:00
85b184b292
Make -time-passes output prettier
...
llvm-svn: 24096
2005-10-29 16:45:02 +00:00
381cab36ed
int comparison patterns
...
llvm-svn: 24020
2005-10-26 18:44:45 +00:00
75eab3ca63
Typo made worse x 2 - take 2.
...
llvm-svn: 24018
2005-10-26 18:07:50 +00:00
b1f2cedbaa
Typo x 2
...
llvm-svn: 24016
2005-10-26 17:50:22 +00:00
7ac194560e
Simplify instinfo, set random bits on more fp insts, and fix 1 opcode
...
llvm-svn: 24014
2005-10-26 17:41:46 +00:00
a2b5235fac
Give full control of subtarget features over to table generated code.
...
llvm-svn: 24013
2005-10-26 17:30:34 +00:00
53ad110490
Add attribute name and type to SubtargetFeatures.
...
llvm-svn: 24012
2005-10-26 17:28:23 +00:00
26ee5953f7
The dag isel generator generates this now
...
llvm-svn: 23984
2005-10-25 20:36:10 +00:00
db4621a5f5
Preparation of supporting scheduling info. Need to find info based on selected
...
CPU.
llvm-svn: 23974
2005-10-25 15:15:28 +00:00
03bf3a1763
Simplify this due to changes in the tblgen side
...
llvm-svn: 23908
2005-10-23 22:33:22 +00:00
766361e8f4
Autogen subtarget information from .td files.
...
llvm-svn: 23904
2005-10-23 22:15:34 +00:00
4b5921d4d8
Add subtarget feature/processor defns to the .td file
...
llvm-svn: 23903
2005-10-23 22:08:45 +00:00
c6072af580
Add several things.
...
loads
branches
setcc
working calls
Global address
External addresses
now I can manage malloc calls.
llvm-svn: 23887
2005-10-23 03:43:48 +00:00
5a990417f8
Well, the Constant matching pattern works. Can't say much about calls or globals yet.
...
llvm-svn: 23884
2005-10-22 22:06:58 +00:00
229878b7bc
silence a release mode warning
...
llvm-svn: 23868
2005-10-21 16:01:26 +00:00
62e9e5462c
Kill some now-dead code.
...
llvm-svn: 23857
2005-10-21 01:52:20 +00:00
Andrew Lenharth