23d55f2547
Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is now
...
obsolete. yaay :)
llvm-svn: 25939
2006-02-03 18:54:24 +00:00
c408558638
When rewriting frame instructions, emit the appropriate small-immediate
...
instruction when possible.
llvm-svn: 25938
2006-02-03 18:20:04 +00:00
ca76917388
Teach sparc to fold loads/stores into copies.
...
Remove the dead getRegClassForType method
minor formating changes.
llvm-svn: 25936
2006-02-03 07:06:25 +00:00
6091407783
remove dead fn
...
llvm-svn: 25935
2006-02-03 06:51:34 +00:00
22e251abf1
Add common code for reassociating ops in the dag combiner
...
llvm-svn: 25934
2006-02-03 06:46:56 +00:00
d7d98611ca
Implement isLoadFromStackSlot and isStoreToStackSlot
...
llvm-svn: 25932
2006-02-03 06:44:54 +00:00
a23b04acdb
remove some target-indep and implemented notes
...
llvm-svn: 25930
2006-02-03 06:22:11 +00:00
d1aaee03ce
target independent notes
...
llvm-svn: 25929
2006-02-03 06:21:43 +00:00
fc567d85d5
Flesh out a couple of the items in the README
...
llvm-svn: 25928
2006-02-03 05:17:06 +00:00
3276ff7ac6
Fix VC++ compilation error caused by using a std::map iterator variable to receive
...
a std::multimap iterator value. For some reason, GCC doesn't have a problem with this.
llvm-svn: 25927
2006-02-03 03:48:54 +00:00
e18ef0d4a6
Remove move copies and dead stuff by not clobbering the result reg of a noop copy.
...
llvm-svn: 25926
2006-02-03 03:16:14 +00:00
1318240fd0
isStoreToStackSlot
...
llvm-svn: 25925
2006-02-03 03:07:37 +00:00
774d4a190b
Simplify some code
...
llvm-svn: 25924
2006-02-03 03:06:49 +00:00
a1eac9b978
the X86 backend no longer needs to delete its own noop copies
...
llvm-svn: 25923
2006-02-03 02:59:58 +00:00
1ef239afb4
Add code that checks for noop copies, which triggers when either:
...
1. a target doesn't know how to fold load/stores into copies, or
2. the spiller rewrites the input to a copy to the same register as the dest
instead of to the reloaded reg.
This will be moved/improved in the near future, but allows elimination of
some ancient x86 hacks. This eliminates 92 copies from SMG2000 on X86 and
163 copies from 252.eon.
llvm-svn: 25922
2006-02-03 02:02:59 +00:00
f0a2d66d1c
Add a note
...
llvm-svn: 25921
2006-02-03 01:49:49 +00:00
02b5b9cdd6
Added case HANDLENODE to getOperationName().
...
llvm-svn: 25920
2006-02-03 01:33:01 +00:00
b7f24de4c8
Physregs may hold multiple stack slot values at the same time. Keep track
...
of this, and use it to our advantage (bwahahah). This allows us to eliminate another
60 instructions from smg2000 on PPC (probably significantly more on X86). A common
old-new diff looks like this:
stw r2, 3304(r1)
- lwz r2, 3192(r1)
stw r2, 3300(r1)
- lwz r2, 3192(r1)
stw r2, 3296(r1)
- lwz r2, 3192(r1)
stw r2, 3200(r1)
- lwz r2, 3192(r1)
stw r2, 3196(r1)
- lwz r2, 3192(r1)
+ or r2, r2, r2
stw r2, 3188(r1)
and
- lwz r31, 604(r1)
- lwz r13, 604(r1)
- lwz r14, 604(r1)
- lwz r15, 604(r1)
- lwz r16, 604(r1)
- lwz r30, 604(r1)
+ or r31, r30, r30
+ or r13, r30, r30
+ or r14, r30, r30
+ or r15, r30, r30
+ or r16, r30, r30
+ or r30, r30, r30
Removal of the R = R copies is coming next...
llvm-svn: 25919
2006-02-03 00:36:31 +00:00
9b178ce225
update a note
...
llvm-svn: 25918
2006-02-02 23:50:22 +00:00
f3aef1b004
Fix a deficiency in the spiller that Evan noticed. In particular, consider
...
this code:
store [stack slot #0 ], R10
= add R14, [stack slot #0 ]
The spiller didn't know that the store made the value of [stackslot#0] available
in R10 *IF* the store came from a copy instruction with the store folded into it.
This patch teaches VirtRegMap to look at these stores and recognize the values
they make available. In one case Evan provided, this code:
divsd %XMM0, %XMM1
movsd %XMM1, QWORD PTR [%ESP + 40]
1) movsd QWORD PTR [%ESP + 48], %XMM1
2) movsd %XMM1, QWORD PTR [%ESP + 48]
addsd %XMM1, %XMM0
3) movsd QWORD PTR [%ESP + 48], %XMM1
movsd QWORD PTR [%ESP + 4], %XMM0
turns into:
divsd %XMM0, %XMM1
movsd %XMM1, QWORD PTR [%ESP + 40]
addsd %XMM1, %XMM0
3) movsd QWORD PTR [%ESP + 48], %XMM1
movsd QWORD PTR [%ESP + 4], %XMM0
In this case, instruction #2 was removed because of the value made
available by #1 , and inst #1 was later deleted because it is now
never used before the stack slot is redefined by #3 .
This occurs here and there in a lot of code with high spilling, on PPC
most of the removed loads/stores are LSU-reject-causing loads, which is
nice.
On X86, things are much better (because it spills more), where we nuke
about 1% of the instructions from SMG2000 and several hundred from eon.
More improvements to come...
llvm-svn: 25917
2006-02-02 23:29:36 +00:00
4efb328926
add 64b gpr store to the possible list of isStoreToStackSlot opcodes.
...
llvm-svn: 25916
2006-02-02 21:07:50 +00:00
5123346708
fix operand numbers
...
llvm-svn: 25915
2006-02-02 20:38:12 +00:00
c327d71e06
implement isStoreToStackSlot for PPC
...
llvm-svn: 25914
2006-02-02 20:16:12 +00:00
bb53acd03c
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
...
llvm-svn: 25913
2006-02-02 20:12:32 +00:00
246ee44c8f
implement isStoreToStackSlot
...
llvm-svn: 25911
2006-02-02 20:00:41 +00:00
0acc90c67e
add a method
...
llvm-svn: 25910
2006-02-02 19:57:16 +00:00
d8208c3665
more notes
...
llvm-svn: 25908
2006-02-02 19:43:28 +00:00
d3f033e8e0
add a note, I have no idea how important this is.
...
llvm-svn: 25907
2006-02-02 19:16:34 +00:00
e10e1024bc
%fcc is not an alias for %fcc0
...
llvm-svn: 25906
2006-02-02 08:02:20 +00:00
cb34968d19
correct an opcode
...
llvm-svn: 25905
2006-02-02 07:56:15 +00:00
9dd7df7ee7
new example
...
llvm-svn: 25903
2006-02-02 07:37:11 +00:00
cd018525f8
Update the README
...
llvm-svn: 25902
2006-02-02 07:27:56 +00:00
49beaf40fc
Turn any_extend nodes into zero_extend nodes when it allows us to remove an
...
and instruction. This allows us to compile stuff like this:
bool %X(int %X) {
%Y = add int %X, 14
%Z = setne int %Y, 12345
ret bool %Z
}
to this:
_X:
cmpl $12331, 4(%esp)
setne %al
movzbl %al, %eax
ret
instead of this:
_X:
cmpl $12331, 4(%esp)
setne %al
movzbl %al, %eax
andl $1, %eax
ret
This occurs quite a bit with the X86 backend. For example, 25 times in
lambda, 30 times in 177.mesa, 14 times in galgel, 70 times in fma3d,
25 times in vpr, several hundred times in gcc, ~45 times in crafty,
~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap,
16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K
programs.
llvm-svn: 25901
2006-02-02 07:17:31 +00:00
e0c60d63b1
Implement MaskedValueIsZero for ANY_EXTEND nodes
...
llvm-svn: 25900
2006-02-02 06:43:15 +00:00
4b2ec8af23
implemented, testcase here: test/Regression/CodeGen/X86/compare-add.ll
...
llvm-svn: 25899
2006-02-02 06:36:48 +00:00
49ce35542f
add two dag combines:
...
(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1
This allows us to compile this:
bool %X(int %X) {
%Y = add int %X, 14
%Z = setne int %Y, 12345
ret bool %Z
}
into this:
_X:
cmpl $12331, 4(%esp)
setne %al
movzbl %al, %eax
andl $1, %eax
ret
not this:
_X:
movl $14, %eax
addl 4(%esp), %eax
cmpl $12345, %eax
setne %al
movzbl %al, %eax
andl $1, %eax
ret
Testcase here: Regression/CodeGen/X86/compare-add.ll
nukage of the and coming up next.
llvm-svn: 25898
2006-02-02 06:36:13 +00:00
d3908f79cb
Update.
...
llvm-svn: 25896
2006-02-02 02:40:17 +00:00
0bd74558ae
make -debug output less newliney
...
llvm-svn: 25895
2006-02-02 00:38:08 +00:00
d8fba3a1ee
Fix a erroneous comment.
...
llvm-svn: 25894
2006-02-02 00:28:23 +00:00
7f5880b1c7
Implement matching constraints. We can now say things like this:
...
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)
and get:
xyz r2, r3, r4, r2
note that the r2's are pinned together. Yaay for 2-address instructions.
2342 ----------------------------------------------------------------------
llvm-svn: 25893
2006-02-02 00:25:23 +00:00
2f34a9e332
validate matching constraints and remember when we see them.
...
llvm-svn: 25892
2006-02-02 00:23:53 +00:00
6132a87cf4
more notes
...
llvm-svn: 25890
2006-02-01 23:38:08 +00:00
b3ea2677a4
Tell codegen MOVAPSrr and MOVAPDrr are copies.
...
llvm-svn: 25889
2006-02-01 23:03:16 +00:00
f1ed826c2a
Added SSE entries to foldMemoryOperand().
...
llvm-svn: 25888
2006-02-01 23:02:25 +00:00
8b40cde148
Rearrange code to my liking. :)
...
llvm-svn: 25887
2006-02-01 23:01:57 +00:00
aa23fa9f43
Implement smart printing of inline asm strings, handling variants and
...
substituted operands. For this testcase:
int %test(int %A, int %B) {
%C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
ret int %C
}
we now emit:
_test:
or r2, r3, r3
or r3, r4, r4
xyz r2, r2, r3 ;; look here
or r3, r2, r2
blr
... note the substituted operands. :)
llvm-svn: 25886
2006-02-01 22:41:11 +00:00
f7f056751c
add a method
...
llvm-svn: 25884
2006-02-01 22:38:46 +00:00
2f7650f9dc
another note
...
llvm-svn: 25883
2006-02-01 21:44:48 +00:00
4b1c726fbb
Add immediate forms of cmov and remove some cruft
...
llvm-svn: 25882
2006-02-01 19:37:33 +00:00
01bd9d9911
*** empty log message ***
...
llvm-svn: 25879
2006-02-01 19:05:15 +00:00
1558fc64f9
Implement simple register assignment for inline asms. This allows us to compile:
...
int %test(int %A, int %B) {
%C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
ret int %C
}
into:
(0x8906130, LLVM BB @0x8902220):
%r2 = OR4 %r3, %r3
%r3 = OR4 %r4, %r4
INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
%r3 = OR4 %r2, %r2
BLR
which asmprints as:
_test:
or r2, r3, r3
or r3, r4, r4
xyz $0, $1, $2 ;; need to print the operands now :)
or r3, r2, r2
blr
llvm-svn: 25878
2006-02-01 18:59:47 +00:00
ba56b5dc35
Finegrainify namespacification
...
llvm-svn: 25877
2006-02-01 18:10:56 +00:00
a983beab37
add a note
...
llvm-svn: 25876
2006-02-01 17:54:23 +00:00
7e7f439f85
Fix some of the stuff in the PPC README file, and clean up legalization
...
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
llvm-svn: 25875
2006-02-01 07:19:44 +00:00
3da1bb520e
add a note, I'll take care of this after nate commits his big patch
...
llvm-svn: 25873
2006-02-01 06:40:32 +00:00
9e350cd6ad
- Use xor to clear integer registers (set R, 0).
...
- Added a new format for instructions where the source register is implied
and it is same as the destination register. Used for pseudo instructions
that clear the destination register.
llvm-svn: 25872
2006-02-01 06:13:50 +00:00
c404b5748c
Remove another entry.
...
llvm-svn: 25871
2006-02-01 06:08:48 +00:00
b24b66f209
Fix VC++ compilation error.
...
llvm-svn: 25869
2006-02-01 04:37:04 +00:00
b0a76b0981
Another regression from the pattern isel
...
llvm-svn: 25867
2006-02-01 01:44:25 +00:00
7ed3101d14
Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use.
...
llvm-svn: 25866
2006-02-01 01:29:47 +00:00
3a5ed55187
adjust to changes in InlineAsm interface. Fix a few minor bugs.
...
llvm-svn: 25865
2006-02-01 01:28:23 +00:00
a24617f5d4
Return's chain should be matching either the chain produced by the
...
value or the chain going into the load.
llvm-svn: 25863
2006-02-01 01:19:32 +00:00
a0527473ac
another testcase.
...
llvm-svn: 25862
2006-02-01 00:28:12 +00:00
e1ce4d7115
When folding a load into a return of SSE value, check the chain to
...
ensure the memory location has not been clobbered.
llvm-svn: 25861
2006-02-01 00:20:21 +00:00
bc1fcd074e
Remove an item. It's done.
...
llvm-svn: 25860
2006-02-01 00:15:53 +00:00
5659ca8f47
Be smarter about whether to store the SSE return value in memory. If
...
it is already available in memory, do a fld directly from there.
llvm-svn: 25859
2006-01-31 23:19:54 +00:00
64387c3e9c
turning these into 'adds' would require extra copies
...
llvm-svn: 25858
2006-01-31 22:59:46 +00:00
72d5c256c9
- Allow XMM load (for scalar use) to be folded into ANDP* and XORP*.
...
- Use XORP* to implement fneg.
llvm-svn: 25857
2006-01-31 22:28:30 +00:00
a91eb48547
Remove entries on fabs and fneg. These are done.
...
llvm-svn: 25856
2006-01-31 22:26:21 +00:00
32be2dc0af
Allow the specification of explicit alignments for constant pool entries.
...
llvm-svn: 25855
2006-01-31 22:23:14 +00:00
c642aa5e1c
* Fix 80-column violations
...
* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.
llvm-svn: 25854
2006-01-31 19:43:35 +00:00
0151361d21
add info about the inline asm register constraints for PPC
...
llvm-svn: 25853
2006-01-31 19:20:21 +00:00
2443ab932d
Allow custom lowering of fabs. I forgot to check in this change which
...
caused several test failures.
llvm-svn: 25852
2006-01-31 18:14:25 +00:00
0962ffc4a6
add a missing break that caused a lot of failures last night :(
...
llvm-svn: 25851
2006-01-31 17:20:06 +00:00
a162f208ee
Codegen
...
bool %test(int %X) {
%Y = seteq int %X, 13
ret bool %Y
}
as
_test:
addi r2, r3, -13
cntlzw r2, r2
srwi r3, r2, 5
blr
rather than
_test:
cmpwi cr7, r3, 13
mfcr r2
rlwinm r3, r2, 31, 31, 31
blr
This has very little effect on most code, but speeds up analyzer 23% and
mason 11%
llvm-svn: 25848
2006-01-31 08:17:29 +00:00
ac9892ccaf
okay, one more
...
llvm-svn: 25847
2006-01-31 07:45:45 +00:00
882611dc25
another note
...
llvm-svn: 25846
2006-01-31 07:45:08 +00:00
24b0742476
More notes
...
llvm-svn: 25845
2006-01-31 07:43:33 +00:00
57480d0634
another one
...
llvm-svn: 25844
2006-01-31 07:38:32 +00:00
17cd988419
add a note
...
llvm-svn: 25843
2006-01-31 07:37:20 +00:00
799716141b
add conditional moves of float and double values on int/fp condition codes.
...
llvm-svn: 25842
2006-01-31 07:26:55 +00:00
b0fe138b65
example nate pointed out
...
llvm-svn: 25841
2006-01-31 07:16:34 +00:00
6f9bf658a7
treat conditional branches the same way as conditional moves (giving them
...
an operand that contains the condcode), making things significantly simpler.
llvm-svn: 25840
2006-01-31 06:56:30 +00:00
21ec192419
compactify all of the integer conditional moves into one instruction that takes
...
a CC as an operand. Much smaller, much happier.
llvm-svn: 25839
2006-01-31 06:49:09 +00:00
196d58373c
Add immediate forms of integer cmovs
...
llvm-svn: 25838
2006-01-31 06:24:29 +00:00
283492b4fe
Shrinkify
...
llvm-svn: 25837
2006-01-31 06:18:16 +00:00
70c9e42593
Add the full complement of conditional moves of integer registers.
...
llvm-svn: 25834
2006-01-31 05:26:36 +00:00
b6493b3165
Compile this:
...
void %X(int %A) {
%C = setlt int %A, 123 ; <bool> [#uses=1]
br bool %C, label %T, label %F
T: ; preds = %0
call int %main( int 0 ) ; <int>:0 [#uses=0]
ret void
F: ; preds = %0
ret void
}
to this:
X:
save -96, %o6, %o6
subcc %i0, 122, %l0
bg .LBBX_2 ! F
nop
...
not this:
X:
save -96, %o6, %o6
sethi 0, %l0
or %g0, 1, %l1
subcc %i0, 122, %l2
bg .LBBX_4 !
nop
.LBBX_3: !
or %g0, %l0, %l1
.LBBX_4: !
subcc %l1, 0, %l0
bne .LBBX_2 ! F
nop
llvm-svn: 25833
2006-01-31 05:05:52 +00:00
e9721b2984
Only insert an AND when converting from BR_COND to BRCC if needed.
...
llvm-svn: 25832
2006-01-31 05:04:52 +00:00
2dd217b88f
Added custom lowering of fabs
...
llvm-svn: 25831
2006-01-31 03:14:29 +00:00
a9bfca8d1e
add the 'lucas' optimization
...
llvm-svn: 25830
2006-01-31 02:55:28 +00:00
0e70729e83
I don't see why this optimization isn't safe, but it isn't, so disable it
...
llvm-svn: 25829
2006-01-31 02:45:52 +00:00
d916e78b0a
Another high-prio selection performance bug
...
llvm-svn: 25828
2006-01-31 02:10:06 +00:00
2e56e89452
Handle physreg input/outputs. We now compile this:
...
int %test_cpuid(int %op) {
%B = alloca int
%C = alloca int
%D = alloca int
%A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
%Bv = load int* %B
%Cv = load int* %C
%Dv = load int* %D
%x = add int %A, %Bv
%y = add int %x, %Cv
%z = add int %y, %Dv
ret int %z
}
to this:
_test_cpuid:
sub %ESP, 16
mov DWORD PTR [%ESP], %EBX
mov %EAX, DWORD PTR [%ESP + 20]
cpuid
mov DWORD PTR [%ESP + 8], %ECX
mov DWORD PTR [%ESP + 12], %EBX
mov DWORD PTR [%ESP + 4], %EDX
mov %ECX, DWORD PTR [%ESP + 12]
add %EAX, %ECX
mov %ECX, DWORD PTR [%ESP + 8]
add %EAX, %ECX
mov %ECX, DWORD PTR [%ESP + 4]
add %EAX, %ECX
mov %EBX, DWORD PTR [%ESP]
add %ESP, 16
ret
... note the proper register allocation. :)
it is unclear to me why the loads aren't folded into the adds.
llvm-svn: 25827
2006-01-31 02:03:41 +00:00
2b70a6f853
more mumbling
...
llvm-svn: 25826
2006-01-31 00:45:37 +00:00
b521361fb9
add some notes
...
llvm-svn: 25825
2006-01-31 00:20:38 +00:00
45df7f84ff
Don't generate complex sequence for SETOLE, SETOLT, SETULT, and SETUGT. Flip
...
the order of the compare operands and generate SETOGT, SETOGE, SETUGE, and
SETULE instead.
llvm-svn: 25824
2006-01-30 23:41:35 +00:00
57ecb561c6
Print the most trivial inline asms.
...
llvm-svn: 25822
2006-01-30 23:00:08 +00:00
f263a23735
Fix a bug in my legalizer reworking that caused the X86 backend to not get
...
a chance to custom legalize setcc, which broke a bunch of C++ Codes.
Testcase here: CodeGen/X86/2006-01-30-LongSetcc.ll
llvm-svn: 25821
2006-01-30 22:43:50 +00:00
9a90572374
Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure from last night
...
llvm-svn: 25819
2006-01-30 22:20:49 +00:00
08390f6a21
i64 -> f32, f32 -> i64 and some clean up.
...
llvm-svn: 25818
2006-01-30 22:13:22 +00:00
5b97fcf0f5
Always use FP stack instructions to perform i64 to f64 as well as f64 to i64
...
conversions. SSE does not have instructions to handle these tasks.
llvm-svn: 25817
2006-01-30 08:02:57 +00:00
37faeb2b02
Revamp the ICC/FCC reading instructions to be parameterized in terms of the
...
SPARC condition codes, not in terms of the DAG condcodes. This allows us to
write nice clean patterns for cmovs/branches.
llvm-svn: 25815
2006-01-30 07:43:04 +00:00
33a79cae7c
Compile:
...
uint %test(uint %X) {
%Y = call uint %llvm.ctpop.i32(uint %X)
ret uint %Y
}
to:
test:
save -96, %o6, %o6
sll %i0, 0, %l0
popc %l0, %i0
restore %g0, %g0, %g0
retl
nop
instead of to 40 logical ops. Note the shift-by-zero that clears the top
part of the 64-bit V9 register.
Testcase here: CodeGen/SparcV8/ctpop.ll
llvm-svn: 25814
2006-01-30 06:14:02 +00:00
321e337d95
If the target has V9 instructions, this pass is a noop, don't bother
...
running it.
llvm-svn: 25811
2006-01-30 05:51:14 +00:00
90d3fd9e7c
When in v9 mode, emit fabsd/fnegd/fmovd
...
llvm-svn: 25810
2006-01-30 05:48:37 +00:00
99dcb95e14
First step towards V9 instructions in the V8 backend, two conditional move
...
patterns. This allows emission of this code:
t1:
save -96, %o6, %o6
subcc %i0, %i1, %l0
move %icc, %i0, %i2
or %g0, %i2, %i0
restore %g0, %g0, %g0
retl
nop
instead of this:
t1:
save -96, %o6, %o6
subcc %i0, %i1, %l0
be .LBBt1_2 !
nop
.LBBt1_1: !
or %g0, %i2, %i0
.LBBt1_2: !
restore %g0, %g0, %g0
retl
nop
for this:
int %t1(int %a, int %b, int %c) {
%tmp.2 = seteq int %a, %b
%tmp3 = select bool %tmp.2, int %a, int %c
ret int %tmp3
}
llvm-svn: 25809
2006-01-30 05:35:57 +00:00
238fe93242
Two changes:
...
1. Default to having V9 instructions, instead of just V8.
2. unless -enable-sparc-v9-insts is passed, disable V9 (for use with llcbeta)
llvm-svn: 25807
2006-01-30 04:57:43 +00:00
af209b8b13
When lowering SELECT_CC, see if the input is a lowered SETCC. If so, fold
...
the two operations together. This allows us to compile this:
void %two(int %a, int* %b) {
%tmp.2 = seteq int %a, 0
%tmp.0.0 = select bool %tmp.2, int 10, int 20
store int %tmp.0.0, int* %b
ret void
}
into:
two:
save -96, %o6, %o6
or %g0, 20, %l0
or %g0, 10, %l1
subcc %i0, 0, %l2
be .LBBtwo_2 ! entry
nop
.LBBtwo_1: ! entry
or %g0, %l0, %l1
.LBBtwo_2: ! entry
st %l1, [%i1]
restore %g0, %g0, %g0
retl
nop
instead of:
two:
save -96, %o6, %o6
sethi 0, %l0
or %g0, 1, %l1
or %g0, 20, %l2
or %g0, 10, %l3
subcc %i0, 0, %l4
be .LBBtwo_2 ! entry
nop
.LBBtwo_1: ! entry
or %g0, %l0, %l1
.LBBtwo_2: ! entry
subcc %l1, 0, %l0
bne .LBBtwo_4 ! entry
nop
.LBBtwo_3: ! entry
or %g0, %l2, %l3
.LBBtwo_4: ! entry
st %l3, [%i1]
restore %g0, %g0, %g0
retl
nop
llvm-svn: 25806
2006-01-30 04:34:44 +00:00
baeb39c969
Add AddSymbol() method to DynamicLibrary to work around Windows limitation
...
of being unable to search for symbols in an EXE. It will also allow other
existing hacks to be improved.
llvm-svn: 25805
2006-01-30 04:33:51 +00:00
d6f5ae4455
don't insert an and node if it isn't needed here, this can prevent folding
...
of lowered target nodes.
llvm-svn: 25804
2006-01-30 04:22:28 +00:00
f0b24d2dc0
Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
...
llvm-svn: 25803
2006-01-30 04:09:27 +00:00
4ac0fa2aa5
Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes,
...
allowing redundant and's to be eliminated by the dag combiner.
llvm-svn: 25800
2006-01-30 03:51:45 +00:00
3b40e64aa3
pass the address of MaskedValueIsZero into isMaskedValueZeroForTargetNode,
...
to permit recursion
llvm-svn: 25799
2006-01-30 03:49:37 +00:00
c6fa0282d2
adjust prototype
...
llvm-svn: 25798
2006-01-30 03:49:07 +00:00
8ee89c774b
Fix indentation.
...
llvm-svn: 25795
2006-01-29 22:02:52 +00:00
4d1ea71a31
Fix RET of promoted values on targets that custom expand RET to a target node.
...
llvm-svn: 25794
2006-01-29 21:02:23 +00:00
32058cfb7b
Functions that are lazily streamed in from the .bc file are *not* external.
...
This fixes llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c
and PR704
llvm-svn: 25793
2006-01-29 20:49:17 +00:00
3c6a950653
add another note
...
llvm-svn: 25789
2006-01-29 09:46:06 +00:00
dabee1f655
add some performance notes from looking at sgefa
...
llvm-svn: 25788
2006-01-29 09:42:20 +00:00
7c7cbde0e5
add a high-priority SSE issue from sgefa
...
llvm-svn: 25787
2006-01-29 09:14:47 +00:00
5a7a22c9dd
add a missed optimization
...
llvm-svn: 25786
2006-01-29 09:08:15 +00:00
2c748afd6c
cleanups to the ValueTypeActions interface
...
llvm-svn: 25785
2006-01-29 08:42:06 +00:00
3072af4d4f
Now that OpActions is big enough, we can specify actions for vector types
...
llvm-svn: 25784
2006-01-29 08:41:37 +00:00
8a4a3deaf9
clean up interface to ValueTypeActions
...
llvm-svn: 25783
2006-01-29 08:41:12 +00:00
ccb4476c87
Remove some special case hacks for CALLSEQ_*, using UpdateNodeOperands
...
instead.
llvm-svn: 25780
2006-01-29 07:58:15 +00:00
d7738e6b32
disable this for now
...
llvm-svn: 25778
2006-01-29 07:31:33 +00:00
0c05a2c99c
Add a note about lowering llvm.memset, llvm.memcpy, and llvm.memmove to a
...
few stores under certain conditions.
llvm-svn: 25777
2006-01-29 06:48:25 +00:00
35d20a4c00
remove now-dead code, the legalizer takes care of this for us
...
llvm-svn: 25776
2006-01-29 06:45:31 +00:00
132177e103
The FP stack doesn't support UNDEF, ask the legalizer to legalize it
...
instead of lying and saying we have it.
llvm-svn: 25775
2006-01-29 06:44:22 +00:00
2f292789dc
Allow custom expansion of ConstantVec nodes. PPC will use this in the future.
...
llvm-svn: 25774
2006-01-29 06:34:16 +00:00
d33c60b52b
Request expansion of ConstantVec nodes.
...
llvm-svn: 25773
2006-01-29 06:32:58 +00:00
758b0ac54b
Legalize ConstantFP into TargetConstantFP when the target allows. Implement
...
custom expansion of ConstantFP nodes.
llvm-svn: 25772
2006-01-29 06:26:56 +00:00
61c9a8e942
Targets all now request ConstantFP to be legalized into TargetConstantFP.
...
'fpimm' in .td files is now TargetConstantFP.
llvm-svn: 25771
2006-01-29 06:26:08 +00:00
b5f0ba6051
Update alpha to reflect recent constantfp legalize changes. It's not clear
...
why all this code isn't autogenerated. :(
llvm-svn: 25770
2006-01-29 06:25:22 +00:00
678da98835
eliminate uses of SelectionDAG::getBR2Way_CC
...
llvm-svn: 25767
2006-01-29 06:00:45 +00:00
1b09c6ba87
cmovle != cmovlt
...
llvm-svn: 25761
2006-01-29 03:47:30 +00:00
4ab39e43e8
Fix typo.
...
llvm-svn: 25760
2006-01-29 03:45:35 +00:00
8643ea67b1
Flesh out AMD family/models.
...
llvm-svn: 25755
2006-01-28 20:30:18 +00:00
58ca0be9af
Correctly determine CPU vendor.
...
llvm-svn: 25754
2006-01-28 19:48:34 +00:00
71287085a1
Use union instead of reinterpret_cast.
...
llvm-svn: 25751
2006-01-28 18:47:32 +00:00
b5de47cd9a
Fix recognition of Intel CPUs.
...
llvm-svn: 25750
2006-01-28 18:38:20 +00:00
b3ab2d3a42
Is64Bit reflects the capability of the chip, not an aspect of the target os
...
llvm-svn: 25749
2006-01-28 18:23:48 +00:00
be08957dc5
Fix a bunch of JIT failures with the new isel
...
llvm-svn: 25748
2006-01-28 18:19:37 +00:00
e128d5f724
Improve X86 subtarget support for Windows and AMD.
...
llvm-svn: 25747
2006-01-28 18:09:06 +00:00
d02b05473c
Use the new "UpdateNodeOperands" method to simplify LegalizeDAG and make it
...
faster. This cuts about 120 lines of code out of the legalizer (mostly code
checking to see if operands have changed).
It also fixes an ugly performance issue, where the legalizer cloned the entire
graph after any change. Now the "UpdateNodeOperands" method gives it a chance
to reuse nodes if the operands of a node change but not its opcode or valuetypes.
This speeds up instruction selection time on kimwitu++ by about 8.2% with a
release build.
llvm-svn: 25746
2006-01-28 10:58:55 +00:00
ccd2a20c4b
silence a warning
...
llvm-svn: 25745
2006-01-28 10:34:47 +00:00
580b12ad34
add another method variant
...
llvm-svn: 25744
2006-01-28 10:09:25 +00:00
f34156e8cb
add some methods for updating nodes
...
llvm-svn: 25742
2006-01-28 09:32:45 +00:00
eb63751499
minor tweaks
...
llvm-svn: 25740
2006-01-28 08:31:04 +00:00
689bdcc9cf
move a bunch of code, no other change.
...
llvm-svn: 25739
2006-01-28 08:25:58 +00:00
fcfda5a174
remove a couple more now-extraneous legalizeop's
...
llvm-svn: 25738
2006-01-28 08:22:56 +00:00
364b89a784
fix a bug
...
llvm-svn: 25737
2006-01-28 07:42:08 +00:00
9dcce6da8e
Several major changes:
...
1. Pull out the expand cases for BSWAP and CT* into a separate function,
reducing the size of LegalizeOp.
2. Fix a bug where expand(bswap i64) was wrong when i64 is legal.
3. Changed LegalizeOp/PromoteOp so that the legalizer never needs to be
iterative. It now operates in a single pass over the nodes.
4. Simplify a LOT of code, with a net reduction of ~280 lines.
llvm-svn: 25736
2006-01-28 07:39:30 +00:00
30432e07f0
Fix a bug in my elimination of ISD::CALL this morning. PPC now has to
...
provide the expansion for i64 calls itself
llvm-svn: 25735
2006-01-28 07:33:03 +00:00
dc8bbb6527
make this work on non-native hosts
...
llvm-svn: 25734
2006-01-28 06:05:41 +00:00
0c7b4666a3
add a note about how we should implement this FIXME from the legalizer:
...
// FIXME: revisit this when we have some kind of mechanism by which targets
// can decided legality of vector constants, of which there may be very
// many.
llvm-svn: 25733
2006-01-28 05:40:47 +00:00
fd4a7f76a9
Eliminate the need for ExpandOp to set 'needsanotheriteration', as it already
...
relegalizes the stuff it returns.
Add the ability to custom expand ADD/SUB, so that targets don't need to deal
with ADD_PARTS/SUB_PARTS if they don't want.
Fix some obscure potential bugs and simplify code.
llvm-svn: 25732
2006-01-28 05:07:51 +00:00
10f677508f
Instead of making callers of ExpandLibCall legalize the result, make
...
ExpandLibCall do it itself.
llvm-svn: 25731
2006-01-28 04:28:26 +00:00
a593acfe66
Eliminate the need to do another iteration of the legalizer after inserting
...
a libcall.
llvm-svn: 25730
2006-01-28 04:23:12 +00:00
98ed05c81d
remove method I just added
...
llvm-svn: 25728
2006-01-28 03:43:09 +00:00
43b867dd3b
add a new callback
...
llvm-svn: 25727
2006-01-28 03:37:03 +00:00
595ec734fc
Implement Promote for VAARG, and allow it to be custom promoted for people
...
who don't want the default behavior (Alpha).
llvm-svn: 25726
2006-01-28 03:14:31 +00:00
6c82262289
Add a couple more things to the readme.
...
llvm-svn: 25724
2006-01-28 01:22:10 +00:00
af397cec0b
Add a missing case to the dag combiner.
...
llvm-svn: 25723
2006-01-28 01:06:30 +00:00
fb16a62fba
Remove the ISD::CALL and ISD::TAILCALL nodes
...
llvm-svn: 25721
2006-01-28 00:18:58 +00:00
b292de6703
Remove some dead code
...
llvm-svn: 25719
2006-01-28 00:02:51 +00:00
2c00db82bd
Switch to AlphaISD::CALL instead of ISD::CALL
...
llvm-svn: 25718
2006-01-27 23:39:00 +00:00
f424a66524
Use PPCISD::CALL instead of ISD::CALL
...
llvm-svn: 25717
2006-01-27 23:34:02 +00:00
a9382ca59e
Use V8ISD::CALL instead of ISD::CALL
...
llvm-svn: 25716
2006-01-27 23:30:03 +00:00
18243826fd
A bit of wisdom from Chris on the last entry.
...
llvm-svn: 25715
2006-01-27 22:54:32 +00:00
63045d221b
AT&T assembly convention: registers are in lower case.
...
llvm-svn: 25714
2006-01-27 22:53:29 +00:00
a502b93fae
initialize member vars
...
llvm-svn: 25712
2006-01-27 22:38:36 +00:00
dbfc299915
initialize all instance vars
...
llvm-svn: 25711
2006-01-27 22:37:09 +00:00
4d967a4cbb
Make llvm.frame/returnaddr not crash on ppc
...
llvm-svn: 25710
2006-01-27 22:25:06 +00:00
9857d075b5
Added notes about a x86 isel deficiency.
...
llvm-svn: 25706
2006-01-27 22:11:01 +00:00
1073ae07b0
Added a temporary option -enable-x86-sse to enable sse support. It is used by
...
llc-beta.
llvm-svn: 25701
2006-01-27 21:49:34 +00:00
a814f0b31c
Bye bye Pattern ISel, hello DAG ISel.
...
llvm-svn: 25700
2006-01-27 21:26:54 +00:00
8c47c3a3b1
Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
...
the same functionality. This addresses another piece of bug 680. Next,
on to fixing Alpha VAARG, which I broke last time.
llvm-svn: 25696
2006-01-27 21:09:22 +00:00
0cda006a69
Using bit size of integers instead of ambiguous "long" et all.
...
llvm-svn: 25694
2006-01-27 20:31:25 +00:00
afab7aa8f2
A better workaround
...
llvm-svn: 25692
2006-01-27 19:30:30 +00:00
4a84e97421
Sorry - really folowing convention.
...
llvm-svn: 25691
2006-01-27 18:32:41 +00:00
4be147f456
force sse/3dnow off until they work. This fixes all the x86 failures last night
...
llvm-svn: 25690
2006-01-27 18:30:50 +00:00
116bb15473
Following convention.
...
llvm-svn: 25689
2006-01-27 18:28:31 +00:00
ed2bb8562f
Unbreak the JIT with SSE
...
llvm-svn: 25688
2006-01-27 18:27:18 +00:00
fc3eca9023
fix build
...
llvm-svn: 25687
2006-01-27 18:16:17 +00:00
ecd7e61a1f
Fix build error that is apparently only a warning with some compilers.
...
llvm-svn: 25686
2006-01-27 17:31:30 +00:00
2b6efa9d41
Forgot the version number.
...
llvm-svn: 25685
2006-01-27 15:46:54 +00:00
f98fc8441c
Improve visibility/correctness of operand indices in "llvm.db" objects.
...
Handle 64 in DIEs.
llvm-svn: 25684
2006-01-27 15:20:54 +00:00
76a8d45e32
Fix auto-upgrade of intrinsics to work properly with both assembly and
...
bytecode reading. This code is crufty, the result of much hacking to get things
working correctly. Cleanup patches will follow.
llvm-svn: 25682
2006-01-27 11:49:27 +00:00
cde9e30bc6
x86 CPU detection and proper subtarget support
...
llvm-svn: 25679
2006-01-27 08:10:46 +00:00
d98701c639
Subtarget feature can now set any variable to any value
...
llvm-svn: 25678
2006-01-27 08:09:42 +00:00
061d9e2cf0
Stub out a method
...
llvm-svn: 25676
2006-01-27 02:10:10 +00:00
1240574609
PHI and INLINEASM are now built-in instructions provided by Target.td
...
llvm-svn: 25674
2006-01-27 01:46:15 +00:00
1c341ac1fe
Add a default NoItinerary class for targets to use.
...
llvm-svn: 25670
2006-01-27 01:41:38 +00:00
4df279cfda
Teach the scheduler to emit the appropriate INLINEASM MachineInstr for an
...
ISD::INLINEASM node.
llvm-svn: 25668
2006-01-26 23:28:04 +00:00
476e67be14
initial selectiondag support for new INLINEASM node. Note that inline asms
...
with outputs or inputs are not supported yet. :)
llvm-svn: 25664
2006-01-26 22:24:51 +00:00
0689dfad23
Use global information to fill out Dwarf compile units.
...
llvm-svn: 25662
2006-01-26 21:22:49 +00:00
15a8c15a1f
Improve compatibility with VC2005, patch by Morten Ofstad!
...
llvm-svn: 25661
2006-01-26 20:41:32 +00:00
32fef53f5c
Implement a method for inline asm support
...
llvm-svn: 25660
2006-01-26 20:37:03 +00:00
0bbdc55333
Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals.
...
Global Variable information is now pulled from "llvm.dbg.globals"
llvm-svn: 25655
2006-01-26 20:21:46 +00:00
ebbfb386a5
Improve compatibility with VC2005, patch by Morten Ofstad!
...
llvm-svn: 25653
2006-01-26 19:55:20 +00:00
4558e4ae10
dynamically allocate plugin space as needed
...
llvm-svn: 25652
2006-01-26 19:38:58 +00:00
bb4c9c0bd7
Remember plugins should someone like bugpoint want to know them.
...
llvm-svn: 25649
2006-01-26 18:36:50 +00:00
54c13da29c
Added preliminary x86 subtarget support.
...
llvm-svn: 25645
2006-01-26 09:53:06 +00:00
0ebb0b1c5c
fix stack corruption! Previously, 16-byte whole-FP-register stores were
...
being treated as needing only 8 bytes (though they were 16 byte aligned.)
This should fix a bunch of tests - anyone have any comments, though?
- in Target.td , SpillSize and SpillAlignment seem dead - is this what
Size and Alignment do now?
- in CodeGenRegisters.h/CodeGenTarget.cpp , DeclaredSpillSize and
DeclaredSpillAlignment seem dead.
- there are a bunch of comments here and there that don't clearly
distinguish between 'size' and 'spillsize' etc. hmm.
llvm-svn: 25644
2006-01-26 09:45:03 +00:00
c090ac13bd
some hoovering
...
llvm-svn: 25643
2006-01-26 09:08:31 +00:00
dbc2aac1e7
Rest of subtarget support, remove references to ppc
...
llvm-svn: 25642
2006-01-26 07:22:22 +00:00
e6842a9da6
Add trivial subtarget support
...
llvm-svn: 25641
2006-01-26 06:51:21 +00:00
0a01374299
minor renaming
...
llvm-svn: 25640
2006-01-26 03:24:15 +00:00
153f808f53
allow R28 to be used for frame calculations without entirely removing it from circulation
...
llvm-svn: 25639
2006-01-26 03:22:07 +00:00
fcdce6d26f
Work around some x86 Darwin assembler bugs
...
llvm-svn: 25638
2006-01-26 02:27:43 +00:00
c981b8e35a
add method for constraint parsing
...
llvm-svn: 25637
2006-01-26 02:21:59 +00:00
944d1e91ea
When trying to fold X86::SETCC into a Select, make a copy if it has more than
...
one use. This allows more CMOV instructions.
llvm-svn: 25634
2006-01-26 02:13:10 +00:00
120f31b1fd
teach the cloner to handle inline asms
...
llvm-svn: 25633
2006-01-26 01:55:22 +00:00
8547e3ab16
parse and verify the constraint string.
...
llvm-svn: 25631
2006-01-26 00:48:33 +00:00
c4c339c3d0
Clean up some code; improve efficiency; and fixed a potential bug involving
...
chain successors.
llvm-svn: 25630
2006-01-26 00:30:29 +00:00
97c68f0f5c
Remove the uses of STATUS flag register. Rely on node property SDNPInFlag,
...
SDNPOutFlag, and SDNPOptInFlag instead.
llvm-svn: 25629
2006-01-26 00:29:36 +00:00
41eb5cd9c3
Make sure the only user of InlineAsm's are direct calls.
...
llvm-svn: 25626
2006-01-26 00:08:45 +00:00
5c3dd5fafd
oops
...
llvm-svn: 25623
2006-01-25 23:33:32 +00:00
4470691999
add bc reader/writer support for inline asm
...
llvm-svn: 25621
2006-01-25 23:08:15 +00:00
a852660e74
forgot one
...
llvm-svn: 25620
2006-01-25 22:28:07 +00:00
e0a4ee9db7
regenerate
...
llvm-svn: 25619
2006-01-25 22:27:16 +00:00
a02d603c18
Parse inline asm objects
...
llvm-svn: 25618
2006-01-25 22:26:43 +00:00
a2d810d935
Print InlineAsm objects
...
llvm-svn: 25617
2006-01-25 22:26:05 +00:00
93fd315292
make things compile again
...
llvm-svn: 25614
2006-01-25 21:54:38 +00:00
5edde66863
Don't break the optimized build (by incorrect placement of #endif)
...
llvm-svn: 25613
2006-01-25 21:49:13 +00:00
8bbcda2fda
Change inline asms to be uniqued like constants, not embedded in a Module.
...
llvm-svn: 25610
2006-01-25 18:57:27 +00:00
d07c86465d
initialize an instance var, apparently I forgot to commit this long ago
...
llvm-svn: 25609
2006-01-25 18:57:15 +00:00
1880f8db02
No need to keep track of top and bottom nodes in a group since the vector is
...
already in order. Thanks Jim for pointing it out.
llvm-svn: 25608
2006-01-25 18:54:24 +00:00
030e002fb9
Set SchedulingForLatency to be the default scheduling preference for all.
...
llvm-svn: 25607
2006-01-25 18:52:42 +00:00
e74795cd70
First part of bug 680:
...
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
llvm-svn: 25606
2006-01-25 18:21:52 +00:00
c3cafb8a67
Make it even more portable.
...
llvm-svn: 25605
2006-01-25 17:18:50 +00:00
fb20616aa6
Fix VC++ compilation error.
...
llvm-svn: 25604
2006-01-25 17:17:49 +00:00
1092a02619
Default scheduling preference is SchedulingForLatency.
...
llvm-svn: 25603
2006-01-25 09:15:54 +00:00
83eeefbbd1
X86 prefer scheduling for reduced register pressure.
...
llvm-svn: 25602
2006-01-25 09:15:17 +00:00
ab49556cf4
Bottom up register usage reducing list scheduler.
...
llvm-svn: 25601
2006-01-25 09:14:32 +00:00
fbc88a624a
Keep track of bottom / top element of a set of flagged nodes.
...
llvm-svn: 25600
2006-01-25 09:13:41 +00:00
a6eff8a432
If scheduler choice is the default (-sched=default), use target scheduling
...
preference to determine which scheduler to use. SchedulingForLatency ==
Breadth first; SchedulingForRegPressure == bottom up register reduction list
scheduler.
llvm-svn: 25599
2006-01-25 09:12:57 +00:00
aff0800fd1
Fix a selectcc lowering bug. Make a copy of X86ISD::CMP when folding it.
...
llvm-svn: 25596
2006-01-25 09:05:09 +00:00
bc7226a7cc
Loosen up these checks to allow direct uses of ESP
...
llvm-svn: 25595
2006-01-25 08:00:36 +00:00
a292744ecc
Portably cast a pointer to an integer.
...
llvm-svn: 25594
2006-01-25 02:40:10 +00:00
5ea06a9f13
add bundling! well not really, for now it's just stop-insertion.
...
llvm-svn: 25593
2006-01-25 02:23:38 +00:00
94150f0666
maintaining stackpointer alignment. Perhaps it doesn't matter
...
llvm-svn: 25592
2006-01-25 01:51:08 +00:00
1dbc389ad2
fix build on 64 bit hosts
...
llvm-svn: 25591
2006-01-24 21:26:43 +00:00
c0f633a598
Fix Regression/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll
...
llvm-svn: 25587
2006-01-24 19:36:27 +00:00
27d30a5f42
use ESP directly, not a copy of ESP into some other register for fastcc calls
...
llvm-svn: 25584
2006-01-24 06:14:44 +00:00
f9a1e3aadc
Fix an infinite loop I caused by making sure to legalize the flag operand
...
of CALLSEQ_* nodes
llvm-svn: 25582
2006-01-24 05:48:21 +00:00
6f33eaeb81
Emit the copies out of call return registers *after* the ISD::CALLSEQ_END
...
node, fixing fastcc and the case where a function has a frame pointer due
to dynamic allocas.
llvm-svn: 25580
2006-01-24 05:17:12 +00:00
68e62a5184
Allow jit-beta to work
...
llvm-svn: 25578
2006-01-24 04:50:48 +00:00
12f8441c03
Fix VC++ compilation error.
...
llvm-svn: 25577
2006-01-24 04:43:17 +00:00
b56a80061a
Remove unused variables.
...
llvm-svn: 25576
2006-01-24 04:42:53 +00:00
00fcdfef0d
rename method
...
llvm-svn: 25572
2006-01-24 04:16:34 +00:00
8ebd2164eb
Rename method
...
llvm-svn: 25571
2006-01-24 04:14:29 +00:00
eef2fe72c0
Initial checkin of the InlineAsm class
...
llvm-svn: 25570
2006-01-24 04:13:11 +00:00
3e65f28ffe
Crude Dwarf global variable debugging.
...
llvm-svn: 25569
2006-01-24 00:49:18 +00:00
efaf35d52a
Pretty print file-scope asm blocks.
...
llvm-svn: 25568
2006-01-24 00:45:30 +00:00
3acaf5cb11
syntax change
...
llvm-svn: 25567
2006-01-24 00:40:17 +00:00
e3a79268a2
Print file-scope inline asm blocks at the start of the output file.
...
llvm-svn: 25565
2006-01-23 23:47:53 +00:00
bc7b2581cb
Add support for reading/writing inline asm
...
llvm-svn: 25564
2006-01-23 23:43:17 +00:00
dd2d3faf19
Add support for linking inline asm
...
llvm-svn: 25560
2006-01-23 23:08:37 +00:00
37992b34c2
When cloning a module, clone the inline asm.
...
llvm-svn: 25559
2006-01-23 23:06:28 +00:00
edd9b0389b
regenerate
...
llvm-svn: 25558
2006-01-23 23:05:42 +00:00
f09741f441
Add support for parsing global asm blocks
...
llvm-svn: 25557
2006-01-23 23:05:15 +00:00
6ed87bdeb4
Print out inline asm strings
...
llvm-svn: 25556
2006-01-23 23:03:36 +00:00
c0bf377f98
bye bye Pattern ISEL
...
llvm-svn: 25553
2006-01-23 21:56:07 +00:00
fef7dec9cc
added stores to lsmark
...
llvm-svn: 25552
2006-01-23 21:51:33 +00:00
683352382e
another couple selects
...
llvm-svn: 25551
2006-01-23 21:51:14 +00:00
208bbe9ca9
fix up more lsmark stuff
...
llvm-svn: 25550
2006-01-23 21:23:26 +00:00
ba97ea52d4
yea, lowering this stuff will basically work
...
llvm-svn: 25549
2006-01-23 20:59:50 +00:00
c28563874c
another selectto
...
llvm-svn: 25548
2006-01-23 20:59:12 +00:00
b8566fa10a
Typo.
...
llvm-svn: 25545
2006-01-23 13:34:04 +00:00
31272347d4
Skeleton of the list schedule.
...
llvm-svn: 25544
2006-01-23 08:26:10 +00:00
421cfe8006
Minor clean up.
...
llvm-svn: 25543
2006-01-23 08:25:34 +00:00
455d1217ea
Revert last patch because it messes up the JIT, amongst other things.
...
llvm-svn: 25541
2006-01-23 08:11:03 +00:00
281dcd6ace
For PR411:
...
No functionality changes, just improve the code by a) providing better
function names, b) eliminating a call to get_suffix and c) tightening up
a function elimination test to reduce further checking.
llvm-svn: 25540
2006-01-23 07:42:30 +00:00
95c05bf1b4
For PR411:
...
Don't try to be smart about fixing intrinsic functions when they're read
in, just fix them after the module is read when all names are resolved.
llvm-svn: 25539
2006-01-23 07:39:03 +00:00
763dfd7723
Fix Regression/CodeGen/SparcV8/2006-01-22-BitConvertLegalize.ll by making
...
sure that the result of expanding a BIT_CONVERT node is itself legalized.
llvm-svn: 25538
2006-01-23 07:30:46 +00:00
87063b9986
Remove a couple of unnecessary #include's
...
llvm-svn: 25535
2006-01-23 07:21:01 +00:00
8935e3eb7d
remove the V8 simple isel
...
llvm-svn: 25534
2006-01-23 07:20:15 +00:00
c1e1d9724d
Factor out more instruction scheduler code to the base class.
...
llvm-svn: 25532
2006-01-23 07:01:07 +00:00
5774040c09
add a bunch more optimizations for unary double math functions
...
llvm-svn: 25530
2006-01-23 06:24:46 +00:00
37c8ad14f4
die, die!! r15, you are not callee-saved
...
llvm-svn: 25527
2006-01-23 06:11:45 +00:00
cc87402925
fix register corruption! (my god.) r15 is a scratch reg, using that as
...
a frame pointer is a pretty doofus thing to do. use r5 instead, and
mark it callee-saved, coz that's what it is!
llvm-svn: 25526
2006-01-23 06:08:46 +00:00
57a2863cbb
Refactor/genericize this, no functionality change
...
llvm-svn: 25525
2006-01-23 05:57:36 +00:00
deda32a786
Fix bugs lowering stackrestore, fixing 2004-08-12-InlinerAndAllocas.c on
...
PPC.
llvm-svn: 25522
2006-01-23 05:22:07 +00:00
c66da83a89
Speedup and simplify pass registration by the observation that there is
...
exactly one PassInfo object per RegisterPass object and that their lifetimes
are the same. As such, there is no reason for the RegisterPass object to
dynamically allocate the PassInfo object at compiler startup time: just inline
the object by-value. This should reduce codesize, heap size, and startup time. Yaay.
llvm-svn: 25521
2006-01-23 01:01:04 +00:00
01a325ed68
Add #include of <iostream>
...
llvm-svn: 25516
2006-01-22 23:41:42 +00:00
de02d7727f
Add explicit #includes of <iostream>
...
llvm-svn: 25515
2006-01-22 23:41:00 +00:00
c597b8a55e
Make iostream #inclusion explicit
...
llvm-svn: 25514
2006-01-22 23:32:06 +00:00
6806c02380
Add explicit iostream #includes
...
llvm-svn: 25513
2006-01-22 23:19:18 +00:00
33081b4648
Make this more efficient in the following ways:
...
1. Do not statically construct a map when the program starts up, this
is expensive and cannot be optimized. Instead, create a list.
2. Do not insert entries for all function in the module into a hashmap
that lives the full life of the compiler.
llvm-svn: 25512
2006-01-22 23:10:26 +00:00
469640e506
Add explicit #includes of <iostream>
...
llvm-svn: 25509
2006-01-22 22:53:01 +00:00
0d4ebfc15b
Several non-functionality changing changes:
...
1. Use the varargs version of getOrInsertFunction to simplify code.
2. remove #include
3. Reduce the number of #ifdef's.
4. remove extraneous vertical whitespace.
llvm-svn: 25508
2006-01-22 22:35:08 +00:00
e23928c67f
Fix a bug in a recent refactor that caused a bunch of programs to miscompile
...
or the compiler to crash.
llvm-svn: 25503
2006-01-21 19:12:11 +00:00
4204e02fc6
insignificant, but next up is proper stack frame layout!
...
llvm-svn: 25497
2006-01-21 14:27:19 +00:00
44cab00045
Fix CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll
...
llvm-svn: 25496
2006-01-21 04:27:00 +00:00
468fecdc99
Rename fcmovae to fcmovnb and fcmova to fcmovnbe (following Intel manual).
...
Some assemblers can't recognize the aliases.
llvm-svn: 25494
2006-01-21 02:55:41 +00:00
739a6a456e
Do some code refactoring on Jim's scheduler in preparation of the new list
...
scheduler.
llvm-svn: 25493
2006-01-21 02:32:06 +00:00
9436aa74a9
trivial formatting improvement: don't insert extra blank lines between .comm
...
vars.
llvm-svn: 25492
2006-01-21 01:35:26 +00:00
3d8f3a55b7
Simplify search for abbreviations.
...
llvm-svn: 25491
2006-01-21 01:13:18 +00:00
45900baadb
Correct some simple errors.
...
llvm-svn: 25490
2006-01-21 00:59:54 +00:00
b17434dc1d
Right size integer values before emitting.
...
llvm-svn: 25489
2006-01-20 21:02:36 +00:00
4b41c8e929
Make the C writer work with packed types. printContainedStructs is
...
still not quite right and will be fixed later.
llvm-svn: 25488
2006-01-20 20:43:57 +00:00
7a3e9aa282
Reworked how Dwarf debug info entries and abbreviations are handled. Added
...
pubnames and debuy str sections.
llvm-svn: 25487
2006-01-20 20:34:06 +00:00
f54c9395e7
remove RET hack, add proper support for rets (watching out for ret voids)
...
llvm-svn: 25486
2006-01-20 20:24:31 +00:00
eca87342b4
Simplify CWriter::printContainedStructs, also allowing it to work with
...
PackedTypes as a side-effect.
llvm-svn: 25485
2006-01-20 18:57:03 +00:00
335b46dd20
LowerReturn now doesn't have to handle f32 returns.
...
llvm-svn: 25484
2006-01-20 18:41:25 +00:00
15afe462a8
remove some unintentionally committed code
...
llvm-svn: 25483
2006-01-20 18:40:10 +00:00
222ceabbee
If the target doesn't support f32 natively, insert the FP_EXTEND in target-indep
...
code, so that the LowerReturn code doesn't have to handle it.
llvm-svn: 25482
2006-01-20 18:38:32 +00:00
69d621387c
Fixed InitializeMemory to handle ConstantPacked.
...
llvm-svn: 25481
2006-01-20 18:18:40 +00:00
61590dd739
Remove dead expression.
...
llvm-svn: 25480
2006-01-20 18:04:43 +00:00
06784ff9ab
Don't use invalidated use_iterator's. This fixes a crash compiling povray
...
llvm-svn: 25479
2006-01-20 18:01:41 +00:00
4026e12e85
fix sext breakage: now we correctly deal with functions that return
...
int vs uint
llvm-svn: 25478
2006-01-20 16:10:05 +00:00
9a8fb20689
fix storing bools! eek!
...
llvm-svn: 25476
2006-01-20 03:40:25 +00:00
0c5de2864f
Stop doing that accidental commit.
...
llvm-svn: 25474
2006-01-20 01:14:05 +00:00
cce748d316
A few more SH{L|R}D peepholes.
...
llvm-svn: 25473
2006-01-20 01:13:30 +00:00
027c18da98
ConstantFoldLoadThroughGEPConstantExpr wasn't handling pointers to
...
packed types correctly.
llvm-svn: 25470
2006-01-19 23:53:23 +00:00
9c30bd5e25
Didn't mean to commit the last one.
...
llvm-svn: 25469
2006-01-19 23:27:08 +00:00
8591b9f254
Added i16 SH{L|R}D patterns.
...
llvm-svn: 25468
2006-01-19 23:26:24 +00:00
93bde9cbf7
add support for ConstantPacked to the linker
...
llvm-svn: 25467
2006-01-19 23:15:58 +00:00
5df67bcd50
typo
...
llvm-svn: 25464
2006-01-19 21:10:38 +00:00
688ea707d8
nasty nasty patterns
...
llvm-svn: 25463
2006-01-19 20:49:37 +00:00
550d8ec1ad
fix boolean XOR (which fixes up comparisons..)
...
llvm-svn: 25462
2006-01-19 15:18:56 +00:00
4d69a01254
BOOM!
...
llvm-svn: 25460
2006-01-19 14:14:11 +00:00
bcbcfac6ea
click click
...
llvm-svn: 25459
2006-01-19 14:13:11 +00:00
3d2cc7e2e9
Avoid generating a redundant setcc.
...
llvm-svn: 25457
2006-01-19 08:52:46 +00:00
ade182125f
For PR696:
...
Don't do floor->floorf conversion if floorf is not available. This checks
the compiler's host, not its target, which is incorrect for cross-compilers
Not sure that's important as we don't build many cross-compilers.
llvm-svn: 25456
2006-01-19 08:36:56 +00:00
29b9d7cdff
fix calls that return f32
...
llvm-svn: 25455
2006-01-19 08:31:51 +00:00
e154abf9b3
Implement casts.ll:test26: a cast from float -> double -> integer, doesn't
...
need the float->double part.
llvm-svn: 25452
2006-01-19 07:40:22 +00:00
2efef3d6f1
implement support for f32 arguments past the first 6 words
...
llvm-svn: 25450
2006-01-19 07:22:29 +00:00
bf31906660
1. Identify bytecode modules that have upgraded intrinsics by setting a
...
boolean flag if we read a function prototype that needs upgrading.
2. Don't upgrade the CallInst instruction until after its been inserted
into the basic block, and only if we know that we have seen an
upgraded intrinsic function.
llvm-svn: 25448
2006-01-19 07:02:16 +00:00
75b9567671
Don't forget about casting the result of an upgraded call to an intrinsic
...
in the case where it needs to cast back to a signed type.
llvm-svn: 25447
2006-01-19 07:00:29 +00:00
7e63a456a0
Add a flag to identify bytecode files that have intrinsic functions that
...
need to be upgraded.
llvm-svn: 25445
2006-01-19 06:57:58 +00:00
91007126c2
adc and sbb need an incoming flag to ensure it reads the carry flag
...
from add / sub.
llvm-svn: 25444
2006-01-19 06:53:20 +00:00
4cdceb7203
Make get_suffix faster by using a switch on getTypeID rather than a series
...
of comparisons on the various type objects.
llvm-svn: 25441
2006-01-19 05:37:27 +00:00
13e8c9d6de
Another typo
...
llvm-svn: 25440
2006-01-19 04:54:52 +00:00
c3c27032d0
add a note
...
llvm-svn: 25439
2006-01-19 02:09:38 +00:00
a7bfbe996e
Two peepholes:
...
(or (x >> c) | (y << (32 - c))) ==> (shrd x, y, c)
(or (x << c) | (y >> (32 - c))) ==> (shld x, y, c)
llvm-svn: 25438
2006-01-19 01:56:29 +00:00
6135a7a546
Didn't mean to check that in.
...
llvm-svn: 25436
2006-01-19 01:52:56 +00:00
267ba5965e
A obvious typo
...
llvm-svn: 25435
2006-01-19 01:46:14 +00:00
c8a9fafcfc
Make sure intrinsic auto-upgrade is invoked correctly.
...
llvm-svn: 25434
2006-01-19 01:21:04 +00:00
f8592bdea5
Don't accept the ctpop, cttz, or ctlz intrinsics with signed arguments. The
...
interface requires unsigned arguments.
llvm-svn: 25433
2006-01-19 01:20:03 +00:00
e0aa7c7ded
Add a new interface function to AutoUpgrade for simultaneously upgrading
...
the Function and the CallInst: UpgradeCallsToIntrinsic(Function*). Also,
re-factor the AutoUpgrade implementation to eliminate some duplication of
code.
llvm-svn: 25432
2006-01-19 01:18:29 +00:00
7be2203c9f
If not internalizing, don't mark llvm.global[cd]tors const, as a fix for a
...
hypothetical future boog.
llvm-svn: 25430
2006-01-19 00:46:54 +00:00
d693b7943a
Don't internalize llvm.global[cd]tor unless there are uses of it. This
...
unbreaks front-ends that don't use __main (like the new CFE).
llvm-svn: 25429
2006-01-19 00:40:39 +00:00
7599b6e4af
was ignoring the legalized chain in this case, fixed SPASS on alpha
...
llvm-svn: 25428
2006-01-18 23:19:08 +00:00
569c439567
Get rid of code in the DAGCombiner that is duplicated in SelectionDAG.cpp
...
Now all constant folding in the code generator is in one place.
llvm-svn: 25426
2006-01-18 22:35:16 +00:00
e2ee190821
Temporary work around for a libcall insertion bug: If a target doesn't
...
support FSIN/FCOS nodes, do not lower sin/cos to them.
llvm-svn: 25425
2006-01-18 21:50:14 +00:00
b98282d2d6
Make sure that cloning a module clones its target triple and dependent
...
library list as well. This should help bugpoint.
llvm-svn: 25424
2006-01-18 21:32:45 +00:00
ce5066c863
Don't assert on 'select_cc SETUO'
...
llvm-svn: 25423
2006-01-18 19:42:35 +00:00
36eba3a49b
fix out of date comment
...
llvm-svn: 25422
2006-01-18 19:37:44 +00:00
15e7642ab1
Fix Regression/CodeGen/PowerPC/2006-01-18-InvalidBranchOpcodeAssert.ll
...
llvm-svn: 25421
2006-01-18 19:35:21 +00:00
5fee908be5
Fix a backwards conditional that caused an inf loop in some cases. This
...
fixes: test/Regression/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll
llvm-svn: 25419
2006-01-18 19:13:41 +00:00
194a5268cb
Added minimum Dwarf aranges. Cleaned up some section headers. Line number
...
support now works in gdb.
llvm-svn: 25417
2006-01-18 16:54:26 +00:00
621674a19d
SRA shift amount must be in i8
...
llvm-svn: 25416
2006-01-18 09:26:46 +00:00
4b3774e0a2
If a call return type is i1, insert a truncate from X86::AL to i1.
...
llvm-svn: 25415
2006-01-18 08:08:38 +00:00
0e9bd5a416
Fixed style of curly brace. No functionality changes.
...
llvm-svn: 25414
2006-01-17 22:01:57 +00:00
feaed4d107
Fix lowering of calls which return f32 values.
...
llvm-svn: 25413
2006-01-17 21:58:21 +00:00
cc9dfecf81
Add frame work for additional dwarf sections. Comments will improve as code
...
is added.
llvm-svn: 25410
2006-01-17 20:41:40 +00:00
ca27f0320b
VMCore support for the insertelement operation.
...
llvm-svn: 25408
2006-01-17 20:07:22 +00:00
e6336a9b69
Constant folding support for the insertelement operation.
...
llvm-svn: 25407
2006-01-17 20:07:07 +00:00
6dce25019d
Lowerpacked and SCCP support for the insertelement operation.
...
llvm-svn: 25406
2006-01-17 20:06:55 +00:00
03e95af9f7
Support for the insertelement operation.
...
llvm-svn: 25405
2006-01-17 20:06:42 +00:00
c744cbe160
Reader support for the insertelement operation.
...
llvm-svn: 25404
2006-01-17 20:06:35 +00:00
fdf9e41848
Lexer and parser support for the insertelement operation.
...
llvm-svn: 25403
2006-01-17 20:06:25 +00:00
6f86a7db07
Bug fix: missing LegalizeOp() on newly created nodes.
...
llvm-svn: 25401
2006-01-17 19:47:13 +00:00
801f47512d
Clean up the FFS optimization code, and make it correctly create the appropriate
...
unsigned llvm.cttz.* intrinsic, fixing the 2005-05-11-Popcount-ffs-fls regression
last night.
llvm-svn: 25398
2006-01-17 18:27:17 +00:00
b9966029fe
Adding basic support for Dwarf line number debug information.
...
I promise to keep future commits smaller.
llvm-svn: 25396
2006-01-17 17:31:53 +00:00
14417ed99c
Zero extending load from i1 to i8.
...
llvm-svn: 25391
2006-01-17 07:02:46 +00:00
e08a95d3c1
oops, this shouldn't have gotten in
...
llvm-svn: 25388
2006-01-17 03:09:48 +00:00
0d5b69f734
SSE does not support i64 SINT_TO_FP (FP stack doesn't either, but we custom
...
expand it), so ask legalizer to expand i32 UINT_TO_FP.
llvm-svn: 25386
2006-01-17 02:32:49 +00:00
266ff6056a
use proper (82-bit) spills/fills when spilling FP regs, so that
...
divides don't get broken. this fixes obsequi, smg2000, and probably
a bunch of other stuff (tm)
llvm-svn: 25385
2006-01-17 02:04:52 +00:00
c261469ad9
fixing divides
...
llvm-svn: 25383
2006-01-17 01:19:49 +00:00
c9fbba6fc0
Revert this, I didn't mean to commit it
...
llvm-svn: 25382
2006-01-17 00:40:24 +00:00
561881f30a
Added a FIXME comment about why FST is currently flagged to fpGETRESULT.
...
llvm-svn: 25381
2006-01-17 00:37:42 +00:00
f64762c26e
Add support for programs with a null argv[0]
...
llvm-svn: 25379
2006-01-17 00:32:28 +00:00
bec9d720b0
Bug fixes: fpGETRESULT should produces a flag result and X86ISD::FST should
...
read a flag.
llvm-svn: 25378
2006-01-17 00:19:47 +00:00
c14bb1026b
More typo's
...
llvm-svn: 25375
2006-01-16 23:26:53 +00:00
64eeed27d9
Some typo's
...
llvm-svn: 25374
2006-01-16 22:48:46 +00:00
cfd9c6e526
fix short immediate loads
...
llvm-svn: 25371
2006-01-16 21:41:39 +00:00
34380b7675
stack and rpcc
...
llvm-svn: 25369
2006-01-16 21:22:38 +00:00
911c68d7a8
Fix FP_TO_INT**_IN_MEM lowering.
...
llvm-svn: 25368
2006-01-16 21:21:29 +00:00
b4f9a6f110
For PR411:
...
This patch is an incremental step towards supporting a flat symbol table.
It de-overloads the intrinsic functions by providing type-specific intrinsics
and arranging for automatically upgrading from the old overloaded name to
the new non-overloaded name. Specifically:
llvm.isunordered -> llvm.isunordered.f32, llvm.isunordered.f64
llvm.sqrt -> llvm.sqrt.f32, llvm.sqrt.f64
llvm.ctpop -> llvm.ctpop.i8, llvm.ctpop.i16, llvm.ctpop.i32, llvm.ctpop.i64
llvm.ctlz -> llvm.ctlz.i8, llvm.ctlz.i16, llvm.ctlz.i32, llvm.ctlz.i64
llvm.cttz -> llvm.cttz.i8, llvm.cttz.i16, llvm.cttz.i32, llvm.cttz.i64
New code should not use the overloaded intrinsic names. Warnings will be
emitted if they are used.
llvm-svn: 25366
2006-01-16 21:12:35 +00:00
84c00ea718
For PR411:
...
This file makes the helper functions for auto-upgrade of llvm assembly and
bytecode more accessible. This is part of de-overloading of intrinsic
functions to support the flat symbol table (no type planes).
llvm-svn: 25365
2006-01-16 21:06:01 +00:00
81b108c54d
Friendly names
...
llvm-svn: 25364
2006-01-16 19:53:25 +00:00
307b7ea15f
fix a crash due to missing parens
...
llvm-svn: 25363
2006-01-16 19:47:21 +00:00
7c76290038
add notes from my *other* email acct.
...
llvm-svn: 25362
2006-01-16 17:58:54 +00:00
b2eacf48aa
transfer some notes from my email to somewhere useful.
...
llvm-svn: 25361
2006-01-16 17:53:00 +00:00
e995910e64
fixing divides: FP should now be 100%, and integers are fine too
...
unless you try to div/mod 0 by anything, in which case you will
get some cute number, and not 0, which is bad.
llvm-svn: 25358
2006-01-16 14:33:04 +00:00
1e1eb5ee6c
Constant fold ctpop/ctlz/cttz, and a couple other small cleanups
...
llvm-svn: 25357
2006-01-16 08:07:10 +00:00
2642a35f4c
Expand case for 64b Legalize, even though no one should end up using this
...
(itanium supports bswap natively, alpha should custom lower it using the
VAX floating point swapload, ha ha).
llvm-svn: 25356
2006-01-16 07:59:13 +00:00
7d831fa5b9
Add BSWAP stuff to intrinsic lowering for CBE & friends.
...
llvm-svn: 25355
2006-01-16 07:57:00 +00:00
ba187774fe
fix division! again!! pattern isel, prepare to die.
...
llvm-svn: 25353
2006-01-16 06:33:38 +00:00
e636ba84b5
Silly Sparc is big endian. If we have to load args out of incoming stack slots
...
that are smaller than an int, make sure to adjust the frame pointer to take
this into consideration.
llvm-svn: 25351
2006-01-16 01:40:00 +00:00
0de2c7d3d8
This pass has never worked correctly. Remove.
...
llvm-svn: 25349
2006-01-16 01:06:00 +00:00
9d41ecc95b
Make sure that bool,byte and short arguments are the right type when loaded
...
from memory.
llvm-svn: 25346
2006-01-15 22:22:01 +00:00
087bb703d7
Thanks to Daniel Berlin's ETForest fix, we can now use it again for the verifier
...
llvm-svn: 25345
2006-01-15 21:58:50 +00:00
9a7e6c7ae0
ET-Forest has issues with unreachable blocks. Temporarily disable verifiers use
...
of it until they are resolved.
llvm-svn: 25341
2006-01-15 20:00:51 +00:00
53312c6342
Disable a broken optimization
...
llvm-svn: 25340
2006-01-15 19:15:46 +00:00
fcdb420baf
Disable two transformations that contribute to bus errors on SparcV8.
...
llvm-svn: 25339
2006-01-15 18:58:59 +00:00
2494ce49f0
Added patterns for 8-bit multiply
...
llvm-svn: 25338
2006-01-15 10:05:20 +00:00
c8817d2857
explain that r12 is the stack pointer reg
...
llvm-svn: 25336
2006-01-15 09:45:23 +00:00
e96523474b
Don't print a label for the first MBB in a function.
...
Compile this:
%_2E_str_8 = external global [75 x sbyte]
implementation ; Functions:
declare int %printf(sbyte*, ...)
void %test()
%tmp.101 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([75 x sbyte]* %_2E_str_8, int 0, int 0) ) ; <int> [#uses=0]
unreachable
}
to this:
main_endif_2E_8:
save -96, %o6, %o6
sethi %hi(_2E_str_8), %l0
add %l0, %lo(_2E_str_8), %o0
call printf
nop
instead of this:
main_endif_2E_8:
save -96, %o6, %o6
sethi %hi(_2E_str_8), %l0
or %g0, %lo(_2E_str_8), %l1 ;; extra instruction
add %l1, %l0, %o0
call printf
nop
llvm-svn: 25335
2006-01-15 09:26:27 +00:00
5bd514d7b0
Use the default impl of DYNAMIC_STACKALLOC, allowing us to delete some code.
...
llvm-svn: 25334
2006-01-15 09:02:48 +00:00
78c358d1ad
Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.
...
llvm-svn: 25333
2006-01-15 09:00:21 +00:00
aea3cccd55
Have legalize take care of DYNAMIC_STACKALLOC for us, implement llvm.stacksave/stackrestore.
...
llvm-svn: 25332
2006-01-15 08:55:25 +00:00
59b82f9848
Allow the target to specify 'expand' if they just require the amount to
...
be subtracted from the stack pointer.
llvm-svn: 25331
2006-01-15 08:54:32 +00:00
c5101b4ffa
Implement DYNAMIC_STACKALLOC for V8
...
llvm-svn: 25330
2006-01-15 08:43:57 +00:00
2d59142613
Fix custom lowering of dynamic_stackalloc
...
llvm-svn: 25329
2006-01-15 08:43:08 +00:00
5186bd8312
add a missing break that Reid noticed.
...
llvm-svn: 25328
2006-01-15 08:40:16 +00:00
9597b33d58
add a missing node name
...
llvm-svn: 25327
2006-01-15 08:39:35 +00:00
e5ca28b74d
reorder passes
...
llvm-svn: 25326
2006-01-15 07:19:53 +00:00
02011c9a4f
Token chain results are not always the first or last result. Consider copyfromreg nodes, where they are the middle result (the flag result is last)
...
llvm-svn: 25325
2006-01-14 22:41:46 +00:00
c17b41c3ba
Cleanup IA64ISD, tell the graph drawer what the symbolic names for the enums are.
...
llvm-svn: 25324
2006-01-14 22:27:21 +00:00
c020bcf850
Change ET-Forest to automatically recalculate its DFSnum's if too many slow
...
queries are made.
Patch by Daniel Berlin!
llvm-svn: 25323
2006-01-14 20:55:09 +00:00
8869c6f782
silence a warning
...
llvm-svn: 25322
2006-01-14 20:11:13 +00:00
f6d6823f09
Let the inliner update the callgraph to reflect the changes it makes, instead
...
of doing it ourselves. This fixes Transforms/Inline/2006-01-14-CallGraphUpdate.ll
llvm-svn: 25321
2006-01-14 20:09:18 +00:00
0841fb1d4c
Teach the inliner to update the CallGraph itself, and have it add edges to
...
llvm.stacksave/restore when it inserts calls to them.
llvm-svn: 25320
2006-01-14 20:07:50 +00:00
00ca8d2de8
Add a new CallGraph::getOrInsertFunction for clients to use when updating
...
the callgraph.
llvm-svn: 25317
2006-01-14 20:03:00 +00:00
ef530c24c1
FunctionPass's cannot do IPO things.
...
llvm-svn: 25315
2006-01-14 19:30:35 +00:00
bc351e171f
add a dump method to CallGraph
...
llvm-svn: 25314
2006-01-14 19:17:02 +00:00
542c3c17a9
Remove some duplicated code
...
llvm-svn: 25313
2006-01-14 03:18:27 +00:00
2fba8a3aaa
bswap implementation
...
llvm-svn: 25312
2006-01-14 03:14:10 +00:00
82049eba2c
Add bswap intrinsics as documented in the Language Reference
...
llvm-svn: 25309
2006-01-14 01:25:24 +00:00
f2b38dbdc7
Remove some redundant stuff out of the readme.
...
llvm-svn: 25308
2006-01-14 01:24:22 +00:00
3bc25e8a54
A typo.
...
llvm-svn: 25307
2006-01-14 01:18:49 +00:00
a4de9baf40
Implement a new InvalidateStructLayoutInfo method and add some comments
...
llvm-svn: 25304
2006-01-14 00:07:34 +00:00
a83529678e
Added instcombine support for extractelement.
...
llvm-svn: 25299
2006-01-13 22:48:06 +00:00
392c7d2779
Add truncstore i1 patterns.
...
llvm-svn: 25296
2006-01-13 21:45:19 +00:00
5fba6e6696
it is ok to dce stacksave.
...
llvm-svn: 25295
2006-01-13 21:31:54 +00:00
503221f5c5
Do a simple instcombine xforms to delete llvm.stackrestore cases.
...
llvm-svn: 25294
2006-01-13 21:28:09 +00:00
5f9c134bac
Fix a bug in my last X86 checkin, pointed out by cozmic
...
llvm-svn: 25293
2006-01-13 20:19:44 +00:00
c66b223b28
Simplify this a tiny bit by using the new IntrinsicInst functionality.
...
llvm-svn: 25292
2006-01-13 20:11:04 +00:00
dba84bbc1e
LHS = X86ISD::CMOVcc LHS, RHS means LHS = RHS if cc. So the operands must be
...
flipped around.
llvm-svn: 25290
2006-01-13 19:51:46 +00:00
45406c0c53
Permit inlining functions that contain dynamic allocations now that
...
InlineFunction handles this case safely. This implements
Transforms/Inline/dynamic_alloca_test.ll.
llvm-svn: 25288
2006-01-13 19:35:43 +00:00
2be0607a8d
If inlining a call to a function that contains dynamic allocas, wrap the
...
resultant code with llvm.stacksave/llvm.stackrestore intrinsics.
llvm-svn: 25286
2006-01-13 19:34:14 +00:00
e24f79a032
Use ClonedCodeInfo to avoid another walk over the inlined code, this this
...
time in common C cases.
llvm-svn: 25285
2006-01-13 19:18:11 +00:00
19e6a08d78
Use the ClonedCodeInfo object to avoid scans of the inlined code when
...
it doesn't contain any calls. This is a fairly common case for C++ code,
so it will probably speed up the inliner marginally in these cases.
llvm-svn: 25284
2006-01-13 19:15:15 +00:00
908d79556d
Refactor a bunch of invoke handling stuff out into a new function
...
"HandleInlinedInvoke". No functionality change.
llvm-svn: 25283
2006-01-13 19:05:59 +00:00
045371a744
make DAG isel the default
...
llvm-svn: 25282
2006-01-13 18:49:47 +00:00
edad1288fd
Allow the code cloning interfaces to capture some important info about the
...
code being cloned if the client wants.
llvm-svn: 25281
2006-01-13 18:39:17 +00:00
257492c0ab
Fix a bug I noticed by inspection: if the first instruction in the inlined
...
function was not an alloca, we wouldn't check the entry block for any allocas,
leading to increased stack space in some cases. In practice, allocas are almost
always at the top of the block, so this was never noticed.
llvm-svn: 25280
2006-01-13 18:16:48 +00:00
49c4d536bd
Fix 80 column violations
...
llvm-svn: 25279
2006-01-13 18:06:56 +00:00
1a8d918ef1
Enable X86 support for savestack/restorestack
...
llvm-svn: 25278
2006-01-13 18:00:54 +00:00
776c326c96
implement stacksave/stackrestore on PPC
...
llvm-svn: 25277
2006-01-13 17:52:03 +00:00
ed9b3e1c0a
If a target specified a stack pointer with setStackPointerRegisterToSaveRestore,
...
lower STACKSAVE/STACKRESTORE into a copy from/to that register.
llvm-svn: 25276
2006-01-13 17:48:44 +00:00
0b94324c5e
don't be a doofus - this fixes storing bools
...
llvm-svn: 25274
2006-01-13 10:28:25 +00:00
b32664583b
Compile llvm.stacksave/restore into STACKSAVE/STACKRESTORE nodes, and allow
...
targets to custom expand them as they desire.
llvm-svn: 25273
2006-01-13 02:50:02 +00:00
8e2f52e645
expand unsupported stacksave/stackrestore nodes
...
llvm-svn: 25272
2006-01-13 02:42:53 +00:00
fdc6d1ea69
new nodes
...
llvm-svn: 25271
2006-01-13 02:40:58 +00:00
a5110e854d
add stacksave/stackrestore nodes
...
llvm-svn: 25270
2006-01-13 02:39:42 +00:00
6c9c250dcd
Add "support" for stacksave/stackrestore to the dag isel
...
llvm-svn: 25268
2006-01-13 02:24:42 +00:00
3b2b0aff0c
Add "support" for the llvm.stacksave/stackrestore intrinsics, this is
...
used by the C backend.
llvm-svn: 25267
2006-01-13 02:22:08 +00:00
c482f16da1
Add recognition and verification of new llvm.stacksave/llvm.stackrestore intrinsics
...
llvm-svn: 25266
2006-01-13 02:15:39 +00:00
f00374e4a8
Minor update.
...
llvm-svn: 25263
2006-01-13 01:20:42 +00:00
d7faa4bae1
More typo's. I need new eye glasses...
...
llvm-svn: 25261
2006-01-13 01:17:24 +00:00
731423f36a
Oops. Typo.
...
llvm-svn: 25260
2006-01-13 01:06:49 +00:00
fb22e86c4d
Fix a SETCC / BRCOND folding bug.
...
llvm-svn: 25259
2006-01-13 01:03:02 +00:00
6305e50ee1
Fix sint_to_fp (fild*) support.
...
llvm-svn: 25257
2006-01-12 22:54:21 +00:00
3470b5dee6
Add a simple missing fold to produce this:
...
subfic r3, r2, 33
instead of this:
subfic r2, r2, 32
addi r3, r2, 1
llvm-svn: 25255
2006-01-12 20:22:43 +00:00
c993d4522d
Specify transformation from GlobalAddress to TargetGlobalAddress and
...
ExternalSymbol to TargetExternalSymbol.
llvm-svn: 25253
2006-01-12 19:36:31 +00:00
3760e901cf
If using __main, emit global ctor/dtor list like any other global
...
llvm-svn: 25251
2006-01-12 19:17:23 +00:00
b1ee616de9
Don't create rotate instructions in unsupported types, because we don't have
...
promote/expand code yet. This fixes the 177.mesa failure on PPC.
llvm-svn: 25250
2006-01-12 18:57:33 +00:00
556f14a6cb
Fix branches on FP compares
...
llvm-svn: 25249
2006-01-12 17:05:32 +00:00
4f1d8b3647
Patch #10 from Saem:
...
"Extracts a few more methods, reduces some redundancy in the code at
the same time."
llvm-svn: 25248
2006-01-12 16:48:23 +00:00
84dc9b55f0
X86ISD::SETCC (e.g. SETEr) produces a flag (so multiple SETCC can be
...
linked together).
llvm-svn: 25247
2006-01-12 08:27:59 +00:00
b94db9e9a4
* Materialize GlobalAddress and ExternalSym with MOV32ri rather than
...
LEA32r.
* Do not lower GlobalAddress to TargetGlobalAddress. Let isel does it.
llvm-svn: 25246
2006-01-12 07:56:47 +00:00
fd41d94486
fix a bug in my previous checkin
...
llvm-svn: 25244
2006-01-12 07:38:04 +00:00
071c9637c3
Give V8ISD nodes symbolic names in dumps
...
llvm-svn: 25243
2006-01-12 07:31:15 +00:00
dc09e40c9d
Convert the verifier over to use ETForest instead of DominatorSet. Patch
...
by Daniel Berlin
llvm-svn: 25242
2006-01-12 06:17:59 +00:00
84be729a56
sabre's (correct) fix means these guys need to be flagged as well (else
...
the scheduler will complain)
llvm-svn: 25241
2006-01-12 03:28:40 +00:00
268d3584fc
ahem :)
...
llvm-svn: 25239
2006-01-12 02:05:36 +00:00
1014b38404
these cases are autogenerated
...
llvm-svn: 25238
2006-01-12 02:01:45 +00:00
44416f92f1
remove dead code
...
llvm-svn: 25237
2006-01-12 01:54:15 +00:00
33792a483a
Goodbye PPC pattern isel. You have served us well, but it is now time for
...
you to ride off into the sunset.
llvm-svn: 25236
2006-01-12 01:46:07 +00:00
9d5e4e8f3c
Fix an itanium call lowering bug for duraid
...
llvm-svn: 25235
2006-01-12 01:33:08 +00:00
504b63c873
invert the sense of this switch and its name
...
llvm-svn: 25234
2006-01-12 01:28:56 +00:00
6b9e00dedc
Missed a spot.
...
llvm-svn: 25233
2006-01-11 23:20:28 +00:00
6d2ab04463
Added ROTL and ROTR.
...
llvm-svn: 25232
2006-01-11 23:20:05 +00:00
2812e79c23
Fix an off-by-one error that Nate's eagle eyes caught
...
llvm-svn: 25231
2006-01-11 23:16:29 +00:00
dc43a3f237
Use the auto-insert BuildMI constructor to avoid an explicit insert. No
...
functionality change, just code cleanup.
llvm-svn: 25230
2006-01-11 23:07:57 +00:00
3280da3cda
If a function has a non-zero sized frame, use an add to adjust the stack
...
pointer in the epilog, not a load.
llvm-svn: 25229
2006-01-11 23:03:54 +00:00
ae986f1f1e
Support for MEMCPY and MEMSET.
...
llvm-svn: 25226
2006-01-11 22:15:48 +00:00
2ae799aff0
Select DYNAMIC_STACKALLOC
...
llvm-svn: 25225
2006-01-11 22:15:18 +00:00
7f4ec8274f
Allow custom lowering of DYNAMIC_STACKALLOC.
...
llvm-svn: 25224
2006-01-11 22:14:47 +00:00
982493300e
ignore register #0
...
llvm-svn: 25223
2006-01-11 22:13:48 +00:00
1b8121b227
Add bswap, rotl, and rotr nodes
...
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
llvm-svn: 25222
2006-01-11 21:21:00 +00:00
602dfea79c
Fix calls that need to store values in stack slots, to not copy the stack
...
pointer. This allows us to emit stuff like this:
li r10, 0
stw r10, 56(r1)
or r3, r10, r10
or r4, r10, r10
or r5, r10, r10
or r6, r10, r10
or r7, r10, r10
or r8, r10, r10
or r9, r10, r10
bl L_bar$stub
instead of this:
or r2, r1, r1 ;; Extraneous copy.
li r10, 0
stw r10, 56(r2)
or r3, r10, r10
or r4, r10, r10
or r5, r10, r10
or r6, r10, r10
or r7, r10, r10
or r8, r10, r10
or r9, r10, r10
bl L_bar$stub
wowness.
llvm-svn: 25221
2006-01-11 19:55:07 +00:00
eaf94a8d2e
tblgen does this now
...
llvm-svn: 25220
2006-01-11 19:53:22 +00:00
b41e92b04c
This is no longer needed
...
llvm-svn: 25219
2006-01-11 19:52:46 +00:00
66f63f72f3
Dead FP arguments still use an incoming FP reg. This fixes
...
Regression/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll, which was
distilled from a miscompilation in 252.eon.
llvm-svn: 25217
2006-01-11 18:21:25 +00:00
4e1515789e
Fix VC++ compilation error.
...
llvm-svn: 25214
2006-01-11 16:21:23 +00:00
a5287eac4f
Patch #9 from Saem:
...
"Cut up the runPasses method into smaller pieces. The small private
helpers should be easier to deal with when code shuffling arising
from creating the new specialised batchers, not to mention, they're
much easier to understand.
I inlined them, in case function call overhead would be noticeable --
doubtful."
llvm-svn: 25213
2006-01-11 16:14:49 +00:00
41c7f4a9ce
Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a
...
pattern for SUBCCrr, and makes it trivial to add support for SUBCCri, eliminating
an instruction in the common "setcc X, imm" case.
llvm-svn: 25212
2006-01-11 07:49:38 +00:00
caf4d92f85
Fix a bug in i32->f64 conversion lowering
...
llvm-svn: 25211
2006-01-11 07:27:40 +00:00
d3839c74d6
Unbreak ret void :-/
...
llvm-svn: 25210
2006-01-11 07:15:43 +00:00
8e0bee11e3
Write this pattern in canonical form, allowing more patterns to match.
...
This implements Regression/CodeGen/SparcV8/xnor.ll
llvm-svn: 25209
2006-01-11 07:14:01 +00:00
bc7a0f44bd
* Add special entry code main() (to set x87 to 64-bit precision).
...
* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
call parmater passing.
llvm-svn: 25207
2006-01-11 06:09:51 +00:00
21f0c31c43
Simple is good. CVS is for revision control, not file headers
...
llvm-svn: 25206
2006-01-11 05:39:45 +00:00
2b84e01ba0
Simple is good
...
llvm-svn: 25205
2006-01-11 05:38:55 +00:00
0770d8e326
Preserve and update ETForest. Patch by Daniel Berlin
...
llvm-svn: 25203
2006-01-11 05:11:13 +00:00
cb36710ff9
Switch these to using ETForest instead of DominatorSet to compute itself.
...
Patch written by Daniel Berlin!
llvm-svn: 25202
2006-01-11 05:10:20 +00:00
48e4a2ebd8
Switch this to using ETForest instead of DominatorSet to compute itself.
...
Patch written by Daniel Berlin!
llvm-svn: 25201
2006-01-11 05:09:40 +00:00
9db9f8a902
Switch loopinfo to using ETForest instead of DominatorSet to compute itself.
...
Patch by Daniel Berlin!
llvm-svn: 25199
2006-01-11 05:08:29 +00:00
0302e62296
cleanup GETFD
...
llvm-svn: 25198
2006-01-11 03:50:40 +00:00
91eda00a7a
this pattern was bogus
...
llvm-svn: 25197
2006-01-11 03:33:06 +00:00
cefd38b2b5
Regenerate these files. FreeBSD apparently has issues with the version of
...
lex/bison Rob used.
llvm-svn: 25196
2006-01-11 02:07:51 +00:00
c712fd6b4e
this just might work
...
llvm-svn: 25195
2006-01-11 01:38:07 +00:00
0d5d08b26e
add support for selecting bools
...
FIXME: this is commented out because it makes tblgen go a bit fruity
llvm-svn: 25193
2006-01-11 01:21:12 +00:00
7c551268d0
implement FP_REG_KILL insertion for the dag-dag instruction selector
...
llvm-svn: 25192
2006-01-11 01:15:34 +00:00
29852a58b0
Fit into 80 cols
...
llvm-svn: 25191
2006-01-11 00:46:55 +00:00
339edad775
SSE cmov support.
...
llvm-svn: 25190
2006-01-11 00:33:36 +00:00
efaf5c56fd
* fp to sint patterns.
...
* fiadd, fisub, etc.
llvm-svn: 25189
2006-01-10 22:22:02 +00:00
73a1ad975e
FP_TO_INT*_IN_MEM and x87 FP Select support.
...
llvm-svn: 25188
2006-01-10 20:26:56 +00:00
de7f1c9a63
Added constant folding support for the extractelement operation.
...
llvm-svn: 25187
2006-01-10 20:03:46 +00:00
0fb2ae7d17
silence a bogus warning
...
llvm-svn: 25185
2006-01-10 19:45:18 +00:00
fb5f46541c
silence a warning
...
llvm-svn: 25184
2006-01-10 19:43:26 +00:00
599e73f21c
Int immediate loading fix
...
llvm-svn: 25182
2006-01-10 19:12:47 +00:00
230044839d
Added support for the extractelement operation.
...
llvm-svn: 25181
2006-01-10 19:05:34 +00:00
bd518d153b
Added lower packed support for the extractelement operation.
...
llvm-svn: 25180
2006-01-10 19:05:05 +00:00
2c966e7617
Added selection DAG support for the extractelement operation.
...
llvm-svn: 25179
2006-01-10 19:04:57 +00:00
bec39ee4e5
Added bytecode support for the extractelement operation.
...
llvm-svn: 25178
2006-01-10 19:04:39 +00:00
aa1cf5440e
Added lexer and parser support for the extractelement operation.
...
llvm-svn: 25177
2006-01-10 19:04:32 +00:00
25780d5eac
For PR411:
...
First step in refactoring the SymbolTable is to split it into two classes,
one for a symbol table of types and one for a symbol table of Values.
llvm-svn: 25175
2006-01-10 09:51:48 +00:00
b05fce676f
Minor cleanup, no functionality change for current targets
...
llvm-svn: 25173
2006-01-10 05:41:59 +00:00
014e8ee806
heh, 'sif it'd be a legalizer bug.
...
llvm-svn: 25172
2006-01-10 05:26:01 +00:00
e977a93bd5
support functions that return bool (this "should" work but doesn't,
...
*maybe* due to a legalizer bug.)
llvm-svn: 25171
2006-01-10 05:08:25 +00:00
cfc60f3484
Remove unused inclusion of SymbolTable.h
...
llvm-svn: 25170
2006-01-10 03:48:34 +00:00
5995c57574
For PR521:
...
With these patches we implement the ability for the Linker library to
keep track of which libraries were actually bytecode files (not archives)
and cause their users to remove such files from the list of libraries to
pass to the native linker.
llvm-svn: 25169
2006-01-10 03:14:40 +00:00
8097c0a0d9
Be a little more explanatory in a comment.
...
llvm-svn: 25168
2006-01-10 03:12:29 +00:00
477933cfbd
Remove a comment that no longer applies.
...
llvm-svn: 25167
2006-01-10 00:15:59 +00:00
347ed8a581
Give PPCISD:: nodes legible names in dumps.
...
llvm-svn: 25166
2006-01-09 23:52:17 +00:00
90ba544826
Fix an exponential function in libcall insertion to not be exponential. :)
...
llvm-svn: 25165
2006-01-09 23:21:49 +00:00
bfb2de9030
add ret void support back
...
llvm-svn: 25164
2006-01-09 23:20:37 +00:00
7c4486215f
* Added undef patterns.
...
* Some reorg.
llvm-svn: 25163
2006-01-09 23:10:28 +00:00
12181af0c7
More typos
...
llvm-svn: 25162
2006-01-09 22:29:54 +00:00
77fa9195cd
typo
...
llvm-svn: 25160
2006-01-09 20:49:21 +00:00
32e7d1ed4a
proper branch not equal sequence
...
llvm-svn: 25159
2006-01-09 19:49:58 +00:00
9c249c37f8
Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.
...
llvm-svn: 25158
2006-01-09 18:33:28 +00:00
870e4f8e38
* Allow custom lowering of ADD_PARTS, SUB_PARTS, SHL_PARTS, SRA_PARTS,
...
and SRL_PARTS.
* Fix a bug that caused *_PARTS to be custom lowered twice.
llvm-svn: 25157
2006-01-09 18:31:59 +00:00
53a1f57fc5
New getNode() variants.
...
llvm-svn: 25156
2006-01-09 18:29:18 +00:00
7785e5b3a4
New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
...
hasInFlag, hasOutFlag.
llvm-svn: 25155
2006-01-09 18:28:21 +00:00
cda4aa6eb4
Teach loopsimplify to update et-forest. Patch contributed by Daniel Berlin!
...
llvm-svn: 25153
2006-01-09 08:03:08 +00:00
dfa65542a1
Bugfix for etforest updating. Contributed by Daniel Berlin.
...
llvm-svn: 25152
2006-01-09 07:58:01 +00:00
60e2c4b4e7
Saem Ghani's PassManager Patch #8 :
...
This fixes a "gccass" regression. The -debug-pass=Structure option now
prints all the appropriate output
llvm-svn: 25151
2006-01-08 22:57:07 +00:00
a60738316e
Fix a problem exposed by the et-forest work. Load-vn needs these passes live
...
whenever it is live, not just when load-vn is computed initially
llvm-svn: 25146
2006-01-08 09:10:04 +00:00
6c9cbdba1a
Initial implementation of the ET-Forest data structure for dominators and
...
post-dominators. This code was written/adapted by Daniel Berlin!
llvm-svn: 25144
2006-01-08 08:22:18 +00:00
38e618438f
Patch #7 from Saem:
...
"added the asserts and casts, fixed the comments and started the break
down of the larger methods. A few more patches and the breakdown
should be complete."
llvm-svn: 25142
2006-01-07 23:16:58 +00:00
1185e73cc9
Fix the PPC JIT failures last night, which were due to mishandling of linkonce globals
...
llvm-svn: 25141
2006-01-07 06:22:16 +00:00
2e8b93ac46
Wrap long lines.
...
llvm-svn: 25140
2006-01-07 06:20:51 +00:00
31b05d0ee3
wrap long line
...
llvm-svn: 25139
2006-01-07 06:12:07 +00:00
9cbfbc21bb
fix some 176.gcc miscompilation from my previous patch.
...
llvm-svn: 25137
2006-01-07 01:32:28 +00:00
92e2797ce2
* Added integer div / rem.
...
* Fixed a load folding bug.
llvm-svn: 25136
2006-01-06 23:19:29 +00:00
10d2790d50
ISEL code for MULHU, MULHS, and UNDEF.
...
llvm-svn: 25132
2006-01-06 20:36:21 +00:00
346b4120af
make 0 codegen much better
...
llvm-svn: 25131
2006-01-06 19:41:51 +00:00
330628a6d8
silence some bogus gcc warnings on fenris
...
llvm-svn: 25130
2006-01-06 17:59:59 +00:00
efbb8da3f5
silence a bogus gcc warning
...
llvm-svn: 25129
2006-01-06 17:56:38 +00:00
eb372a0276
Enhance the shift-shift folding code to allow a no-op cast to occur in between
...
the shifts.
This allows us to fold this (which is the 'integer add a constant' sequence
from cozmic's scheme compmiler):
int %x(uint %anf-temporary776) {
%anf-temporary777 = shr uint %anf-temporary776, ubyte 1
%anf-temporary800 = cast uint %anf-temporary777 to int
%anf-temporary804 = shl int %anf-temporary800, ubyte 1
%anf-temporary805 = add int %anf-temporary804, -2
%anf-temporary806 = or int %anf-temporary805, 1
ret int %anf-temporary806
}
into this:
int %x(uint %anf-temporary776) {
%anf-temporary776 = cast uint %anf-temporary776 to int
%anf-temporary776.mask1 = add int %anf-temporary776, -2
%anf-temporary805 = or int %anf-temporary776.mask1, 1
ret int %anf-temporary805
}
note that instcombine already knew how to eliminate the AND that the two
shifts fold into. This is tested by InstCombine/shift.ll:test26
-Chris
llvm-svn: 25128
2006-01-06 07:52:12 +00:00
b330939d90
Simplify the code a bit more
...
llvm-svn: 25126
2006-01-06 07:22:22 +00:00
145539343f
Extract a bunch of code out of visitShiftInst into FoldShiftByConstant. No
...
functionality changes.
llvm-svn: 25125
2006-01-06 07:12:35 +00:00
fae8afb77f
Unbreak the build :(
...
llvm-svn: 25124
2006-01-06 05:47:48 +00:00
53dd0ac226
Addd (shl x, 1) ==> (shl x, x) peepholes.
...
llvm-svn: 25123
2006-01-06 02:31:59 +00:00
85c973cda9
Revert the previous check-in. Leave shl x, 1 along for target to deal with.
...
llvm-svn: 25121
2006-01-06 01:56:02 +00:00
b03f9b32d2
fold (shl x, 1) -> (add x, x)
...
llvm-svn: 25120
2006-01-06 01:06:31 +00:00
b87030358d
linkonce symbols have an extra indirection, just like weak ones do. This fixes
...
Prolangs-C++/family and Prolangs-C++/primes.
llvm-svn: 25119
2006-01-06 01:04:03 +00:00
172fce7050
* Fast call support.
...
* FP cmp, setcc, etc.
llvm-svn: 25117
2006-01-06 00:43:03 +00:00
f35b1c837f
Support for custom lowering of ISD::RET.
...
llvm-svn: 25116
2006-01-06 00:41:43 +00:00
20c88dfd1b
Fix a compile crash building MultiSource/Applications/d with the new front-end.
...
The PPC backend was generating random shift counts in this case, due to an
uninitialized variable.
llvm-svn: 25114
2006-01-05 18:32:49 +00:00
fed8ceb56a
Implement a few symbolic constant folding things. X ? Y : Y is Y.
...
Fold:
seteq ({ short }* cast (int 1 to { short }*), { short }* null)
setlt ({ short }* cast (int 1 to { short }*), { short }* cast (int 2 to { short }*))
to false/true. These last two commonly occur in the output of compilers that
tag integers, like cozmic's scheme compiler.
Tested by Regression/Assembler/ConstantExprFold.llx
llvm-svn: 25112
2006-01-05 07:49:30 +00:00
0f7e9f5180
fix some formatting problems
...
llvm-svn: 25110
2006-01-05 07:19:51 +00:00
da56ae98a9
unbreak the build, these are now in TargetSelectionDAG.td
...
llvm-svn: 25109
2006-01-05 04:48:15 +00:00
a5ae6e8320
Added ConstantFP patterns.
...
llvm-svn: 25108
2006-01-05 02:08:37 +00:00
e0d1b65d24
Added fpimm node for ConstantFP.
...
llvm-svn: 25107
2006-01-05 02:07:49 +00:00
deeafa0f00
Had expand logic backward.
...
llvm-svn: 25105
2006-01-05 01:47:43 +00:00
762e9ec06c
Added initial support for DEBUG_LABEL allowing debug specific labels to be
...
inserted in the code.
llvm-svn: 25104
2006-01-05 01:25:28 +00:00
45e19098a6
DAG based isel call support.
...
llvm-svn: 25103
2006-01-05 00:27:02 +00:00
779dd94721
Remove some dead code.
...
llvm-svn: 25102
2006-01-05 00:26:14 +00:00
219d559824
Applied some recommend changes from sabre. The dominate one beginning "let the
...
pass manager do it's thing." Fixes crash when compiling -g files and suppresses
dwarf statements if no debug info is present.
llvm-svn: 25100
2006-01-04 22:28:25 +00:00
0da76a676a
Add unique id to debug location for debug label use (work in progress.)
...
llvm-svn: 25096
2006-01-04 15:04:11 +00:00
2741e8304c
Add check for debug presence.
...
llvm-svn: 25095
2006-01-04 14:30:12 +00:00
b0609d91c3
Tie dwarf generation to darwin assembler.
...
llvm-svn: 25093
2006-01-04 13:52:30 +00:00
57a5e0b45a
Moving MachineDebugInfo to module level location.
...
llvm-svn: 25090
2006-01-04 13:43:56 +00:00
6f9ff633a6
Change how MachineDebugInfo is fetched.
...
llvm-svn: 25089
2006-01-04 13:42:59 +00:00
44317393f8
Extending MachineDebugInfo.
...
llvm-svn: 25086
2006-01-04 13:36:38 +00:00
c47b08154d
Patch #6's in Saem's refactor-the-passmanager patch series. From him:
...
This sanitises the world, blows away the specialisations and adds
traits per passmanager type -- seemed most natural.
llvm-svn: 25085
2006-01-04 07:47:13 +00:00
227e936650
Add support for targets (like Alpha) that have terminator instructions which
...
use virtual registers. We now allow the first instruction in a block of
terminators to use virtual registers, and update phi elimination to correctly
update livevar when eliminating phi's. This fixes a problem on a testcase
Andrew sent me.
llvm-svn: 25083
2006-01-04 07:12:21 +00:00
0511055276
Add an assertion, update DefInst even though no one uses it (dangling pointers
...
don't help anyone)
llvm-svn: 25081
2006-01-04 06:47:48 +00:00
be45b5e948
Add a LiveVariables::VarInfo::dump method
...
llvm-svn: 25080
2006-01-04 05:40:30 +00:00
3f60c83911
Saem's patch #5 of the passmanager refactoring
...
llvm-svn: 25078
2006-01-04 05:02:04 +00:00
afb8ee6d25
patch #4 in Saem's passmanager refactoring.
...
llvm-svn: 25077
2006-01-04 04:36:11 +00:00
6b52be6a89
implement constant folding of ==/!= on constant packed, simplify some code.
...
llvm-svn: 25074
2006-01-04 02:20:54 +00:00
f0f4068196
implement constant folding for the element-wise binary operations
...
llvm-svn: 25073
2006-01-04 02:15:02 +00:00
1171d95d88
don't crash when trying to constant fold packed expressions.
...
llvm-svn: 25072
2006-01-04 02:03:29 +00:00
c421a26792
Fix an assertion to allow constant folding of packed values
...
llvm-svn: 25071
2006-01-04 01:01:04 +00:00
8cdc773748
Pull inline methods out of the pass class definition to make it easier to
...
read the code.
Do not internalize debugger anchors.
llvm-svn: 25067
2006-01-03 19:13:17 +00:00
6c10dee2fa
silence some warnings
...
llvm-svn: 25066
2006-01-03 17:52:18 +00:00
b723c33614
Change a variable from being an iterator to a raw MachineInstr*, to make
...
GDB use tolerable
llvm-svn: 25064
2006-01-03 07:41:37 +00:00
4700d9a9cf
Finally commit Saem's 'patch #3' to refactor the pass manager
...
llvm-svn: 25063
2006-01-03 07:05:17 +00:00
44497859f9
Make the -print-alias-sets pass work for printing out something other than
...
the default aa impl results.
llvm-svn: 25062
2006-01-03 06:05:22 +00:00
eaf5ed1438
typeo
...
llvm-svn: 25060
2006-01-02 21:15:53 +00:00
38e0b281da
Remove a 'using namespace std'.
...
llvm-svn: 25059
2006-01-01 22:20:31 +00:00
f99c338278
Add support for brcond
...
llvm-svn: 25058
2006-01-01 22:16:43 +00:00
6bec63aac9
Move brcond over and fix some imm patterns. This may be the last change before changing the default alpha isel.
...
llvm-svn: 25057
2006-01-01 22:16:14 +00:00
f0545f7c48
clean this function up some
...
llvm-svn: 25055
2006-01-01 22:13:54 +00:00
5916d7b6b1
Patch #1 of Saem Ghani's Pass Manager refactoring. From the man:
...
"All this should do is create what will eventually be the specialised
passmanagers. Currently, the templates are inheriting them, once the
template specialisations' methods have been absorbed, patches
submitted method by method. I'll nuke the specialisations and have
the new objects inherit directly from passmanagert, and sanitise the
world of all references to templates.
"
llvm-svn: 25053
2005-12-30 20:00:46 +00:00
60ab61fcfc
improve constant loading. Still sucks, but oh well
...
llvm-svn: 25047
2005-12-30 02:30:02 +00:00
336dba6fb1
Add support for generating v4i32 altivec code
...
llvm-svn: 25046
2005-12-30 00:12:56 +00:00
c2c8a6202f
Remove a fixme
...
llvm-svn: 25045
2005-12-30 00:11:07 +00:00
164db3a7eb
Make sure to pass the offset into the new node, so that we don't silently
...
drop it on the floor.
llvm-svn: 25044
2005-12-30 00:10:38 +00:00
fb6a914ca7
purity++
...
llvm-svn: 25041
2005-12-29 05:59:19 +00:00
50d9caf6a4
let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean
...
llvm-svn: 25040
2005-12-29 01:06:12 +00:00
34e4782c95
Fix up immediate handling
...
llvm-svn: 25039
2005-12-29 00:50:08 +00:00
26b037e762
add these so I can be less naughty
...
llvm-svn: 25034
2005-12-28 06:29:02 +00:00
e47d9d0e92
HB is *the* code janitor.
...
llvm-svn: 25031
2005-12-28 04:55:42 +00:00
7c3dcb6892
mixed-STL programs are big and nasty :(
...
llvm-svn: 25030
2005-12-28 02:44:35 +00:00
3f5aaf55b8
yet more C++ standards-compliance stuff.
...
llvm-svn: 25028
2005-12-27 10:40:34 +00:00
69ac08c683
nasty paste-o, calls passing more than 8 arguments along were having
...
args >8 put into the wrong place
llvm-svn: 25027
2005-12-27 10:17:03 +00:00
5bd1c2783b
Restore some happiness to the JIT
...
llvm-svn: 25026
2005-12-27 06:25:50 +00:00
962dcbd572
Fix alpha regressions.
...
llvm-svn: 25025
2005-12-27 03:53:58 +00:00
8258489ca4
Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc
...
llvm-svn: 25024
2005-12-27 03:02:18 +00:00
c58523442a
more C++ daintiness
...
llvm-svn: 25023
2005-12-26 14:31:26 +00:00
7859bd2ea4
I bet pinski knows why g++ accepts this stuff
...
llvm-svn: 25022
2005-12-26 14:23:22 +00:00
7a3ad6cae2
getting there...
...
llvm-svn: 25021
2005-12-26 13:48:44 +00:00
9d3058ccda
dum de dum
...
llvm-svn: 25018
2005-12-26 10:24:15 +00:00
14c53b45f5
Added field noResults to Instruction.
...
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
llvm-svn: 25017
2005-12-26 09:11:45 +00:00
c00eab5b03
more HP-UX cleanliness
...
llvm-svn: 25015
2005-12-26 08:35:06 +00:00
b43eb8c75b
HP aCC chokes on this, but it's not required anyway: according to
...
the bzip2 homepage, only ancient (gcc 2.7.x ?) versions of GCC
require this? It certainly isn't needed for the current bzip2
sources.
llvm-svn: 25013
2005-12-26 05:00:25 +00:00
36501f5eb0
MERRY CHRISTMAS EVERYONE!!! (what better way to spend christmas than
...
to try building LLVM on HP-UX! (the Right Way seems to be to tear out
the ancient STL that HP ship and use http://incubator.apache.org/stdcxx/ )
llvm-svn: 25012
2005-12-26 04:56:16 +00:00
f520093eb3
add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG
...
llvm-svn: 25011
2005-12-25 17:36:48 +00:00
6b240e55d1
unbreak calls, a few more tests should run. Tomorrow: bugpoint!
...
llvm-svn: 25010
2005-12-25 14:09:08 +00:00
06dcc199f0
we don't feed our call instructions extra operands
...
llvm-svn: 25009
2005-12-25 14:07:01 +00:00
0fce613eff
All that just to lower div and rem
...
llvm-svn: 25008
2005-12-25 01:34:27 +00:00
30db2ec59f
allow custom lowering to return null for legal results
...
llvm-svn: 25007
2005-12-25 01:07:37 +00:00
7259426d88
Support Custom lowering of a few more operations.
...
Alpha needs to custom lower *DIV and *REM
llvm-svn: 25006
2005-12-24 23:42:32 +00:00
0dc12c38e5
support targetexternalsym
...
llvm-svn: 25005
2005-12-24 23:36:59 +00:00
782b654e6f
Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass.
...
llvm-svn: 25004
2005-12-24 09:48:35 +00:00
5b18ed9e60
All addressing modes are now exposed. The only remaining relocated forms
...
are for function prologue.
TODO: move external symbols over to using RelLit.
: have a pattern that matches constpool|globaladdr
: have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003
2005-12-24 08:29:32 +00:00
b9aaea3564
Unify the patterns for loads and stores. Now offset addressing should be
...
supported. This almost completes memory operations.
llvm-svn: 25002
2005-12-24 07:34:33 +00:00
4621488965
Let's see if we can break things.
...
Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.
llvm-svn: 25001
2005-12-24 05:36:33 +00:00
636e1aed43
move loads and stores over. Smart addr selection comming
...
llvm-svn: 25000
2005-12-24 03:41:56 +00:00
9aea6e4691
Fix one of the things in the todo file, and get a bit closer to folding
...
constant offsets from statics into the address arithmetic.
llvm-svn: 24999
2005-12-24 01:00:15 +00:00
9ae486047e
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
...
* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
llvm-svn: 24997
2005-12-23 22:14:32 +00:00
bdba3e2a46
Remove redundant debug locations.
...
llvm-svn: 24995
2005-12-23 20:08:28 +00:00
c7037abc5b
unbreak the build :-/
...
llvm-svn: 24992
2005-12-23 16:12:20 +00:00
4f52796f79
not a good idea
...
llvm-svn: 24991
2005-12-23 07:37:47 +00:00
5c59d49630
More X86 floating point patterns.
...
llvm-svn: 24990
2005-12-23 07:31:11 +00:00
8be8067b19
Operand 1 of TRUNCSTORE can be any of integer and floating point types.
...
llvm-svn: 24989
2005-12-23 07:30:30 +00:00
31d15fa093
Allow custom lowering of LOAD, EXTLOAD, ZEXTLOAD, STORE, and TRUNCSTORE. Not
...
currently used.
llvm-svn: 24988
2005-12-23 07:29:34 +00:00
55823ae03f
fix something-o
...
llvm-svn: 24987
2005-12-23 07:08:39 +00:00
5427aab5f8
implement vaarg. Varargs now should work.
...
llvm-svn: 24986
2005-12-23 06:37:38 +00:00
5ee896aad9
implement vastart. The dag isel compiles this:
...
void test3(va_list Y);
void test2(int F, ...) {
va_list X;
va_start(X, F);
test3(X);
}
into this:
test2:
save -104, %o6, %o6
st %i5, [%i6+88]
st %i4, [%i6+84]
st %i3, [%i6+80]
st %i2, [%i6+76]
st %i1, [%i6+72]
add %i6, 72, %o0
st %o0, [%i6+-4]
call test3
nop
restore %g0, %g0, %g0
retl
nop
The simple isel emits:
test2:
save -96, %o6, %o6
st %i0, [%i6+68]
st %i1, [%i6+72]
st %i2, [%i6+76]
st %i3, [%i6+80]
st %i4, [%i6+84]
st %i5, [%i6+88]
or %g0, 1, %l0
or %g0, 4, %l1
umul %l0, %l1, %l0
add %l0, 7, %l0
and %l0, -8, %l0
sub %o6, %l0, %o6
add %o6, 96, %l0
add %i6, 72, %l1
st %l1, [%l0]
ld [%l0], %o0
call test3
nop
restore %g0, %g0, %g0
retl
nop
llvm-svn: 24985
2005-12-23 06:24:04 +00:00
6e6d5a1fa1
remove benchmark list, remove issues addressed by the dag-dag isel
...
llvm-svn: 24984
2005-12-23 06:09:30 +00:00
26943b9691
Simplify store(bitconv(x)) to store(x). This allows us to compile this:
...
void bar(double Y, double *X) {
*X = Y;
}
to this:
bar:
save -96, %o6, %o6
st %i1, [%i2+4]
st %i0, [%i2]
restore %g0, %g0, %g0
retl
nop
instead of this:
bar:
save -104, %o6, %o6
st %i1, [%i6+-4]
st %i0, [%i6+-8]
ldd [%i6+-8], %f0
std %f0, [%i2]
restore %g0, %g0, %g0
retl
nop
on sparcv8.
llvm-svn: 24983
2005-12-23 05:48:07 +00:00
54560f6887
fold (conv (load x)) -> (load (conv*)x).
...
This allows us to compile this:
void foo(double);
void bar(double *X) { foo(*X); }
To this:
bar:
save -96, %o6, %o6
ld [%i0+4], %o1
ld [%i0], %o0
call foo
nop
restore %g0, %g0, %g0
retl
nop
instead of this:
bar:
save -104, %o6, %o6
ldd [%i0], %f0
std %f0, [%i6+-8]
ld [%i6+-4], %o1
ld [%i6+-8], %o0
call foo
nop
restore %g0, %g0, %g0
retl
nop
on SparcV8.
llvm-svn: 24982
2005-12-23 05:44:41 +00:00
efbbedbf4a
Fold bitconv(bitconv(x)) -> x. We now compile this:
...
void foo(double);
void bar(double X) { foo(X); }
to this:
bar:
save -96, %o6, %o6
or %g0, %i0, %o0
or %g0, %i1, %o1
call foo
nop
restore %g0, %g0, %g0
retl
nop
instead of this:
bar:
save -112, %o6, %o6
st %i1, [%i6+-4]
st %i0, [%i6+-8]
ldd [%i6+-8], %f0
std %f0, [%i6+-16]
ld [%i6+-12], %o1
ld [%i6+-16], %o0
call foo
nop
restore %g0, %g0, %g0
retl
nop
on V8.
llvm-svn: 24981
2005-12-23 05:37:50 +00:00
a187460552
constant fold bits_convert in getNode and in the dag combiner for fp<->int
...
conversions. This allows V8 to compiles this:
void %test() {
call float %test2( float 1.000000e+00, float 2.000000e+00, double 3.000000e+00, double* null )
ret void
}
into:
test:
save -96, %o6, %o6
sethi 0, %o3
sethi 1049088, %o2
sethi 1048576, %o1
sethi 10403841040384
2005-12-23 05:30:37 +00:00
30107e65c8
make sure bit_convert's are expanded
...
llvm-svn: 24979
2005-12-23 05:15:23 +00:00
c46fc2482c
make sure bit_converts are expanded
...
llvm-svn: 24978
2005-12-23 05:13:35 +00:00
5ce81edbf6
fix the int<->fp instructions, which apparently take a single float register
...
to represent the int part (because it's always 32-bits)
llvm-svn: 24976
2005-12-23 05:00:16 +00:00
c9849274bd
Use BIT_CONVERT to simplify this code
...
llvm-svn: 24975
2005-12-23 02:31:39 +00:00
f474034432
Simplify some code by using BIT_CONVERT
...
llvm-svn: 24974
2005-12-23 00:59:59 +00:00
884eb3adc3
Fix a pasto
...
llvm-svn: 24973
2005-12-23 00:52:30 +00:00
9eae8d5d03
fix a thinko in the bit_convert handling code
...
llvm-svn: 24972
2005-12-23 00:50:25 +00:00
36e663d6e1
add very simple support for the BIT_CONVERT node
...
llvm-svn: 24970
2005-12-23 00:16:34 +00:00
e4ae72a4e6
Revert previous patch. Additional tests fail.
...
llvm-svn: 24968
2005-12-22 21:46:37 +00:00
4c141d047c
clean up .td file by using evan's new FLAG thing
...
llvm-svn: 24967
2005-12-22 21:18:39 +00:00
177d7af5d5
remove dead code
...
llvm-svn: 24965
2005-12-22 21:16:08 +00:00
6b0325aa26
fix handling of weak linkage
...
llvm-svn: 24964
2005-12-22 21:15:17 +00:00
8f8124edaa
Fix PR409:
...
Implement the suggested check to ensure that out-of-range float constants
don't get accepted by LLVM accidentally. Adjust the supporting test cases
as well.
llvm-svn: 24963
2005-12-22 21:07:29 +00:00
ccd5b90f58
For PR351:
...
* Allow the ExecuteAndWait to return negative values if a signal is
detected as the reason for the child termination. This is needed to
support bugpoint detecting bad things in its child processes.
llvm-svn: 24960
2005-12-22 20:00:16 +00:00
ffe3542726
move some random notes out of my email into someplace useful
...
llvm-svn: 24956
2005-12-22 17:19:28 +00:00
644e7db818
this is a hack, which may or may not hang around. In short:
...
whimper out of doing things the Right Way, and hack up a generic
'BRCALL' instruction, that gets generated when calls are lowered.
This gets selected by hand in the DAG isel, where it gets turned
into real (i.e. in tablegen) br.call instructions.
BUG: this dies on void calls, but seems to work otherwise?
llvm-svn: 24952
2005-12-22 13:29:14 +00:00
3692fa14b8
we can't do this directly in lowering, so we need this case
...
llvm-svn: 24951
2005-12-22 07:14:45 +00:00
3608ab87c0
oops, back this out
...
llvm-svn: 24950
2005-12-22 07:13:51 +00:00
b1d57fb175
we can't all have brains now, can we
...
llvm-svn: 24948
2005-12-22 06:41:39 +00:00
d0c146d59f
this should take care of calls to varadic functions, but it doesn.,t
...
BUG: calling printf(string, float) will load the float into the wrong
register, completely forget about loading the string, etce
llvm-svn: 24947
2005-12-22 06:39:57 +00:00
a8de8a5db4
we need to emit the getf.d instruction in lowering, so add it
...
to IA64ISD
llvm-svn: 24946
2005-12-22 06:38:38 +00:00
be19877731
Separate the call graph implementation from its interface. This implements
...
the rough idea sketched out in http://nondot.org/sabre/LLVMNotes/CallGraphClass.txt ,
allowing new spiffy implementations of the callgraph interface to be built.
Many thanks to Saem Ghani for contributing this!
llvm-svn: 24944
2005-12-22 06:07:52 +00:00
1408c05a8b
The 81st column doesn't like code in it.
...
llvm-svn: 24943
2005-12-22 05:23:45 +00:00
5ccf76fed3
I shoulda done this a *long* time ago (tm): implement calls properly,
...
i.e. r1/r12/rp are saved/restored regardless of scheduling/luck
TODO: calls to external symbols, indirect (function descriptor) calls,
performance (we're being paranoid right now)
BUG: the code for handling calls to vararg functions breaks if FP
args are passed (this will make printf() go haywire so a bunch of
tests will fail)
BUG: this seems to trigger some legalize nastiness
llvm-svn: 24942
2005-12-22 04:07:40 +00:00
8f6c86fe3b
kill SelectCALL() in the DAG isel, we handle this in lowering now, like
...
SPARCv8. (we copy sparcv8's workaround for tablegen not being nice about
ISD::CALL/TAILCALL)
llvm-svn: 24941
2005-12-22 03:58:17 +00:00
a743e00e7a
update tablegen files - nothing to see here
...
llvm-svn: 24939
2005-12-22 03:56:03 +00:00
6197688c71
For PR351:
...
Move the system dependent portion to lib/System/*/Alarm.inc. This makes the
SlowOperationInformer platform independent.
llvm-svn: 24938
2005-12-22 03:31:26 +00:00
3493dab23b
Implement a generic polled Alarm function. This merely removes the system
...
dependent portion of the lib/Support/SlowOperationTimer code into the
lib/System implementation where it can be ported to different platforms.
llvm-svn: 24937
2005-12-22 03:23:46 +00:00
dfad8ed54e
Bye bye HACKTROCITY.
...
llvm-svn: 24935
2005-12-22 02:26:21 +00:00
62fef13143
Added special flag node FLAG.
...
llvm-svn: 24934
2005-12-22 02:25:14 +00:00
2335fc2f44
Add an eol at the end to shut gcc sup.
...
llvm-svn: 24926
2005-12-22 01:41:00 +00:00
1872908f3b
Lefted out TargetLowering::
...
llvm-svn: 24922
2005-12-21 23:14:54 +00:00
9cdc16c6d3
* Fix a GlobalAddress lowering bug.
...
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
llvm-svn: 24921
2005-12-21 23:05:39 +00:00
02767195bb
Oops. Accidentally deleted RET pattern. It's still needed for return void;
...
llvm-svn: 24920
2005-12-21 22:22:16 +00:00
9e296bee9a
Disengage DEBUG_LOC from non-PPC targets.
...
llvm-svn: 24919
2005-12-21 20:51:37 +00:00
c1583dbd63
* Added support for X86 RET with an additional operand to specify number of
...
bytes to pop off stack.
* Added support for X86 SETCC.
llvm-svn: 24917
2005-12-21 20:21:51 +00:00
7b52a923b8
Start of Dwarf framework.
...
llvm-svn: 24914
2005-12-21 19:48:16 +00:00
0fab459362
make sure to relegalize all cases
...
llvm-svn: 24911
2005-12-21 19:40:42 +00:00
44c07ed61a
enable the gep isel opt
...
llvm-svn: 24910
2005-12-21 19:36:36 +00:00
15f5a182e1
Regenerate
...
llvm-svn: 24908
2005-12-21 18:31:50 +00:00
a5d70e9feb
allow logical operators on packed integral types
...
llvm-svn: 24907
2005-12-21 18:31:29 +00:00
dca56cbd9a
Get logical operations to like packed types, allow BinOp::getNot to create
...
the right vector of -1's as its operand.
llvm-svn: 24906
2005-12-21 18:22:19 +00:00
ac12f68424
fix a bug I introduced that broke recursive expansion of nodes (e.g. scalarizing vectors)
...
llvm-svn: 24905
2005-12-21 18:02:52 +00:00
a054d129ea
regenerate
...
llvm-svn: 24904
2005-12-21 17:53:23 +00:00
8c7bda561c
Implement Regression/Assembler/2005-12-21-ZeroInitVector.ll
...
llvm-svn: 24903
2005-12-21 17:53:02 +00:00
81f2653e45
add some nodes, forgot to commit this last night :(
...
llvm-svn: 24901
2005-12-21 16:22:46 +00:00
0dcdd83c0e
This was meant to go in
...
llvm-svn: 24900
2005-12-21 07:50:26 +00:00
f431ad4477
Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns
...
that were overloaded to work before and after the stackifier runs. With the
new clean world, it is possible to write patterns for these instructions: woo!
This also adds a few simple patterns here and there, though there are a lot
still missing. These should be easy to add though. :)
See the comments under "Floating Point Stack Support" for more details on
the new world order.
This patch as absolutely no effect on the generated code, woo!
llvm-svn: 24899
2005-12-21 07:47:04 +00:00
988827a482
Wrap some long lines: no functionality change
...
llvm-svn: 24898
2005-12-21 05:34:58 +00:00
72575d882b
remove dead code
...
llvm-svn: 24896
2005-12-21 05:27:51 +00:00
803a575616
Lower ConstantAggregateZero into zeros
...
llvm-svn: 24890
2005-12-21 02:43:26 +00:00
a2f308fc3e
Remove ISD::RET select code. Now tblgen'd.
...
llvm-svn: 24889
2005-12-21 02:41:57 +00:00
a74ce62746
* Added lowering hook for external weak global address. It inserts a load
...
for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
value (or store / fld / copy to ST(0) for floating point value). This
eliminate the need to write C++ code to handle RET with variable number
of operands.
llvm-svn: 24888
2005-12-21 02:39:21 +00:00
434ffe49a9
Don't emit a null terminator, nor anything after it, to the ctor/dtor list
...
llvm-svn: 24887
2005-12-21 01:17:37 +00:00
5c0b4df483
SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns.
...
llvm-svn: 24886
2005-12-20 22:59:51 +00:00
82285c55aa
Flip the meaning of FPContractions to reflect Requires<[]> change.
...
llvm-svn: 24884
2005-12-20 20:08:53 +00:00
fc94dff7dc
Run lower-switch after lower-invoke.
...
Only run lower-allocations and lower-select for the simple isel
llvm-svn: 24881
2005-12-20 08:00:11 +00:00
10c7f67d78
Reserve G1 for frame offset stuff and use it to handle large stack frames.
...
For example, instead of emitting this:
test:
save -40112, %o6, %o6 ;; imm too large
add %i6, -40016, %o0 ;; imm too large
call caller
nop
restore %g0, %g0, %g0
retl
nop
emit this:
test:
sethi 4194264, %g1
or %g1, 848, %g1
save %o6, %g1, %o6
sethi 4194264, %g1
add %g1, %i6, %g1
add %i1, 944, %o0
call caller
nop
restore %g0, %g0, %g0
retl
nop
which doesn't cause the assembler to barf.
llvm-svn: 24880
2005-12-20 07:56:31 +00:00
5815a6e455
Added X86 readport patterns.
...
llvm-svn: 24879
2005-12-20 07:38:38 +00:00
6af02635a7
Added a hook to print out names of target specific DAG nodes.
...
llvm-svn: 24877
2005-12-20 06:22:03 +00:00
2af3ee4bdd
Fix a nasty latent bug in the legalizer that was triggered by my patch
...
last night, breaking crafty and twolf. Make sure that the newly found
legal nodes are themselves not re-legalized until the next iteration.
Also, since this functionality exists now, we can reduce number of legalizer
iterations by depending on this behavior instead of having to misuse 'do
another iteration' to get the same effect.
llvm-svn: 24875
2005-12-20 00:53:54 +00:00
b11b8e44fa
Pattern-match return. Includes gross hack!
...
llvm-svn: 24874
2005-12-20 00:26:01 +00:00
c126397a69
Fix a couple of the FIXMEs, thanks to suggestion from Chris. This allows
...
us to load and store vectors directly at a pointer (offset of zero) by
using r0 as the base register. This also requires some asm printer work
to satisfy the darwin assembler.
For
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
We now produce:
_foo:
lvx v0, 0, r3
vaddfp v0, v0, v0
stvx v0, 0, r3
blr
Instead of:
_foo:
li r2, 0
lvx v0, r2, r3
vaddfp v0, v0, v0
stvx v0, r2, r3
blr
llvm-svn: 24872
2005-12-19 23:40:42 +00:00
8e6a8af205
Convert load/store over to being pattern matched
...
llvm-svn: 24871
2005-12-19 23:25:09 +00:00
6fc31046aa
X86 conditional branch support.
...
llvm-svn: 24870
2005-12-19 23:12:38 +00:00
9fd9541367
Print out opcode number if it's an unknown target node.
...
llvm-svn: 24869
2005-12-19 23:11:49 +00:00
1d9b671de0
It's essential we clear CodeGenMap after isel every basic block!
...
llvm-svn: 24867
2005-12-19 22:36:02 +00:00
50b2d302d5
Fix a case where the DAG Combiner would accidentally CSE flag-producing nodes,
...
creating graphs that cannot be scheduled.
llvm-svn: 24866
2005-12-19 22:21:21 +00:00
757035ead9
Prefix DSA specific options with dsa.
...
Make the dsa-alloc-list and dsa-free-list options hidden.
llvm-svn: 24864
2005-12-19 20:14:38 +00:00
45bb70d8f9
Added an option to specify the names of heap freeing functions.
...
llvm-svn: 24863
2005-12-19 19:54:23 +00:00
aa0fed0148
Added a command line option that allows the user to specify a list of
...
functions that allocate memory.
llvm-svn: 24862
2005-12-19 17:38:39 +00:00
9b9688aeb8
Amend comment.
...
llvm-svn: 24861
2005-12-19 16:32:26 +00:00
ce23987e6b
Create a strong dependency for loads following stores. This will leave a
...
latency period between the two.
llvm-svn: 24860
2005-12-19 16:30:13 +00:00
7767a654b0
Fix pifft by correcting the case when a i64/f64 straddles O5 and memory:
...
we were storing into [FP+88] instead of [FP+92].
Improve codegen by emitting [FP+92], instead of emitting a copy of FP into
another GPR which wouldn't be coallesced because FP isn't register allocated.
llvm-svn: 24859
2005-12-19 07:57:53 +00:00
631c9df853
don't emit 'add %o6, 0, %o6' instructions
...
llvm-svn: 24857
2005-12-19 02:51:12 +00:00
5b9c9f9d36
Fix calls to functions returning i64
...
llvm-svn: 24856
2005-12-19 02:15:51 +00:00
655fac2c95
Correct bool truncstore operand order
...
llvm-svn: 24855
2005-12-19 02:06:50 +00:00
2c792ccc62
add the other bool zextload as well
...
llvm-svn: 24854
2005-12-19 01:44:58 +00:00
766170c6ee
implement zextload bool
...
llvm-svn: 24853
2005-12-19 01:43:04 +00:00
9be456300e
mark some unsupported ops as unsupported
...
llvm-svn: 24852
2005-12-19 01:39:40 +00:00
e59941810a
Fix syntax for indirect calls. This fixes Olden/mst
...
llvm-svn: 24850
2005-12-19 01:22:53 +00:00
bead785656
Keep stack frames 8-byte aligned. This fixes olden/voronoi
...
llvm-svn: 24849
2005-12-19 01:15:13 +00:00
9078c84654
apparently rdy isn't actually a psuedo instruction. Use rd %y
...
llvm-svn: 24848
2005-12-19 00:53:02 +00:00
d2e885e321
add fneg/fabs support for doubles
...
llvm-svn: 24847
2005-12-19 00:50:12 +00:00
14ee61ef00
Various cleanups to this pass, no functionality change
...
llvm-svn: 24846
2005-12-19 00:46:20 +00:00
d2a07eebcd
add bool truncstores
...
llvm-svn: 24845
2005-12-19 00:19:21 +00:00
15bd5ea92f
Elimiante SP and FP, which weren't members of the IntRegs register class
...
llvm-svn: 24844
2005-12-19 00:06:52 +00:00
c06da626b4
Make sure to relegalize new nodes
...
llvm-svn: 24843
2005-12-18 23:54:29 +00:00
f5f80cb947
The sun assembler only supports .xword in V9 mode.
...
llvm-svn: 24842
2005-12-18 23:36:45 +00:00
1ac15547d6
Configure the asmwriter to allow constant pools to be printed correctly
...
llvm-svn: 24841
2005-12-18 23:35:05 +00:00
030672f16b
add support for integer extloads
...
llvm-svn: 24840
2005-12-18 23:18:37 +00:00
c70ed7721b
Add support for undef
...
llvm-svn: 24839
2005-12-18 23:10:57 +00:00
4c3c3ac218
Add support for calls to external symbols
...
llvm-svn: 24838
2005-12-18 23:07:11 +00:00
388f3043b0
we have no memcpy
...
llvm-svn: 24837
2005-12-18 23:00:27 +00:00
c65cd5a03e
Fix a crash on a call with no arguments
...
llvm-svn: 24836
2005-12-18 22:57:47 +00:00
c7cb351aac
Keep VC++ happy.
...
llvm-svn: 24835
2005-12-18 22:20:05 +00:00
2f5fb6a720
This is handled by the autogen'd code
...
llvm-svn: 24834
2005-12-18 21:06:11 +00:00
1958690ff2
Change return lowering so that we can autogen the matching code.
...
llvm-svn: 24832
2005-12-18 21:03:04 +00:00
02e9904ee5
Implement Calls for V8. This would be completely autogenerated except for
...
a small bug in tblgen. When that is fixed, we can remove the ISD::Call case
in Select.
llvm-svn: 24830
2005-12-18 15:55:15 +00:00
ebcfa0c210
More corrections for flagged copyto/from reg
...
llvm-svn: 24828
2005-12-18 15:36:21 +00:00
e3c67e97c7
legalize copytoreg and copyfromreg nodes that have flag operands correctly.
...
llvm-svn: 24826
2005-12-18 15:27:43 +00:00
a0be18c9a4
Implement the full V8 ABI for incoming arguments.
...
llvm-svn: 24825
2005-12-18 13:33:06 +00:00
8d1db078cb
Push ops list, asm string, and pattern all the way up to InstV8. Move the
...
InstV8 class to the InstrFormats file where it belongs.
llvm-svn: 24824
2005-12-18 08:21:00 +00:00
7cee2c9a5b
Give V8 select_cc, in the spirit of the PPC backend
...
llvm-svn: 24823
2005-12-18 08:13:54 +00:00
9de2958138
remove some unused instructions
...
llvm-svn: 24822
2005-12-18 07:15:17 +00:00
a9f0d108b1
V8 doesn't have FP extload
...
llvm-svn: 24821
2005-12-18 07:13:32 +00:00
d6806875d0
simplifications, fix typo
...
llvm-svn: 24820
2005-12-18 07:09:06 +00:00
c5609aab11
add a node, for completeness
...
llvm-svn: 24819
2005-12-18 07:05:21 +00:00
4492b1b7a0
Add frameindex support
...
Add support for copying (e.g. returning) doubles
Add support for F<->I instructions
llvm-svn: 24818
2005-12-18 06:59:57 +00:00
9dcfe37e76
Tighten up some checks
...
llvm-svn: 24817
2005-12-18 06:40:34 +00:00
c97b7d0be9
Fix a bug Sabre was having where the DAG root was a group. The group dominator
...
needed to be added to the ordering list, not the first member of the group.
llvm-svn: 24816
2005-12-18 04:40:52 +00:00
e220821deb
Groups were not emitted if the dominator node and the node in the ordering list
...
were not the same node. Ultimately the test was bogus.
llvm-svn: 24815
2005-12-18 03:59:21 +00:00
53c1f75090
Since extload can also be used by FP, split STDIntExtLoad into two parts,
...
one for use with extload, one for use with sextload and zextload, which
are integer only.
llvm-svn: 24814
2005-12-18 02:48:48 +00:00
5580e69df6
Add constant pool support, including folding into addresses.
...
Pretty print addresses a bit, to not print [%r1+%g0]: just print [%r1]
llvm-svn: 24813
2005-12-18 02:37:35 +00:00
726075fdf8
Teach the addressing mode stuff to fold "%lo" into 'ri' addressing modes,
...
allowing us to compile this:
to this:
%G1 = external global int
%G2 = external global int
void %test() {
%X = load int* %G1
store int %X, int* %G2
ret void
}
test:
save -96, %sp, %sp
sethi %hi(G1), %l0
ld [%l0+%lo(G1)], %l0
sethi %hi(G2), %l1
st %l0, [%l1+%lo(G2)]
restore %g0, %g0, %g0
retl
nop
instead of this:
test:
save -96, %sp, %sp
sethi %hi(G1), %l0
or %g0, %lo(G1), %l1
ld [%l1+%l0], %l0
sethi %hi(G2), %l1
or %g0, %lo(G2), %l2
st %l0, [%l2+%l1]
restore %g0, %g0, %g0
retl
nop
llvm-svn: 24812
2005-12-18 02:27:00 +00:00
a983c3df1c
Add initial support for global variables, and fix a bug in addr mode selection
...
where we didn't select the operands.
llvm-svn: 24811
2005-12-18 02:10:39 +00:00
a49b652a62
Claiming that branch targets are registers is not very wholesome. Change them
...
to be basic blocks. Also, add uncond branches.
llvm-svn: 24810
2005-12-18 01:46:58 +00:00
b29957500e
Add unordered comparisons
...
llvm-svn: 24809
2005-12-18 01:41:39 +00:00
e58481be36
Add patterns to the rest of the int condbranches and some of the fp branches
...
llvm-svn: 24808
2005-12-18 01:38:19 +00:00
9cf4bb2867
Add initial conditional branch support. This doesn't actually work yet due
...
to a bug in the scheduler.
llvm-svn: 24807
2005-12-18 01:20:35 +00:00
cf12118965
Simplify code
...
llvm-svn: 24806
2005-12-18 01:03:46 +00:00
00759eac78
Eliminate CMPri, which is a synonym for SUBCCri
...
llvm-svn: 24805
2005-12-17 23:52:08 +00:00
bf0bd99e03
allow custom expansion of BR_CC
...
llvm-svn: 24804
2005-12-17 23:46:46 +00:00
5a6b03c1b8
add fneg,fabs,fsqrt instructions
...
llvm-svn: 24803
2005-12-17 23:20:27 +00:00
32f19262d5
Add patterns for fround/fextend and the funny fsmuld instruction
...
llvm-svn: 24802
2005-12-17 23:14:30 +00:00
06952dfced
Add FP +,-,*,/
...
llvm-svn: 24801
2005-12-17 23:10:46 +00:00
89078880f2
Give patterns to F3_3 instructions
...
llvm-svn: 24800
2005-12-17 23:05:35 +00:00
829572cdca
Implement 64-bit add/sub, make sure to receive and return 64-bit args with
...
the right halves in the right regs
llvm-svn: 24799
2005-12-17 22:55:57 +00:00
ebfa06a2de
implement div and rem
...
llvm-svn: 24798
2005-12-17 22:39:19 +00:00
8eaf9f4cb3
implement MULHU/MULHS for 64-bit multiplies
...
llvm-svn: 24797
2005-12-17 22:30:00 +00:00
4abe9528f9
Add patterns for multiply, simplify Y register handling stuff, add RDY instruction
...
llvm-svn: 24796
2005-12-17 22:22:53 +00:00
2616a0b56f
Make the addressing modes smarter
...
llvm-svn: 24795
2005-12-17 21:25:27 +00:00
19ff62dc67
remove some unused instructions
...
llvm-svn: 24794
2005-12-17 21:13:50 +00:00
e39ab718c0
add andn/orn/xorn patterns. This allows us to compile this:
...
long %test(ubyte, short, long %X, long %Y) {
%A = xor long %X, -1
%B = and long %Y, %A
ret long %B
}
to this:
test:
save -96, %sp, %sp
andn %i4, %i2, %i0
andn %i5, %i3, %i1
restore %g0, %g0, %g0
retl
nop
instead of this:
test:
save -96, %sp, %sp
xor %i2, -1, %l0
xor %i3, -1, %l1
and %i4, %l0, %i0
and %i5, %l1, %i1
restore %g0, %g0, %g0
retl
nop
The simpleisel emits: :(
test:
save -96, %sp, %sp
or %g0, -1, %l0
or %g0, -1, %l0
or %g0, -1, %l0
or %g0, -1, %l1
xor %i2, %l0, %l0
xor %i3, %l1, %l1
and %i4, %l0, %i0
and %i5, %l1, %i1
restore %g0, %g0, %g0
retl
nop
llvm-svn: 24793
2005-12-17 21:05:49 +00:00
ea752cc50a
Add support for 64-bit arguments
...
llvm-svn: 24792
2005-12-17 20:59:06 +00:00
6be83f9959
Sparc doesn't have sext_inreg
...
llvm-svn: 24791
2005-12-17 20:50:42 +00:00
d10995cb26
add patterns for FP stores
...
llvm-svn: 24790
2005-12-17 20:47:16 +00:00
490a6edf52
Add [reg+reg] integer stores
...
llvm-svn: 24789
2005-12-17 20:44:36 +00:00
b57bb13253
Add store patterns
...
llvm-svn: 24788
2005-12-17 20:42:55 +00:00
233e044738
add truncstore
...
llvm-svn: 24787
2005-12-17 20:42:29 +00:00
7e7c355154
add fp load patterns, switch rest of loads and stores to use addrmodes
...
llvm-svn: 24786
2005-12-17 20:32:47 +00:00
c4f3a7adea
Add integer load[r+r] forms.
...
llvm-svn: 24785
2005-12-17 20:26:45 +00:00
1c02c45f18
Rename load/store instructions to include an RI suffix
...
llvm-svn: 24784
2005-12-17 20:18:49 +00:00
4fa86e1d55
Add patterns for the rest of the loads. Add 'ri' suffixes to the load and store insts
...
llvm-svn: 24783
2005-12-17 20:18:24 +00:00
5d15f9ed60
Add basic addressing mode support and one load.
...
llvm-svn: 24782
2005-12-17 20:04:49 +00:00
db8e888fb5
eliminate some redundancy
...
llvm-svn: 24781
2005-12-17 19:47:05 +00:00
5e68639009
Use a combination of sethi and or to build arbitrary immediates.
...
llvm-svn: 24780
2005-12-17 19:41:43 +00:00
8546257435
Use sethi to build large immediates with zeros at the bottom
...
llvm-svn: 24779
2005-12-17 19:37:00 +00:00
7b6f2e879d
Add shift and small immediate support
...
llvm-svn: 24778
2005-12-17 19:07:57 +00:00
30f924e3ca
Add some basic reg-reg instructions
...
llvm-svn: 24777
2005-12-17 18:53:33 +00:00
2edb4b7f99
Add empty patterns to all F3_1 instructions
...
llvm-svn: 24776
2005-12-17 18:49:14 +00:00
1d71248392
Darwin API issue: indirect load of external and weak symbols.
...
llvm-svn: 24775
2005-12-17 09:13:43 +00:00
866cef563b
Add some simple integer patterns. This allows us to compile this:
...
int %test(int %A) {
%B = add int %A, 1
%C = xor int %B, 123
ret int %C
}
into this:
test:
save -96, %sp, %sp
add %i0, 1, %l0
xor %l0, 123, %i0
restore %g0, %g0, %g0
retl
nop
for example. I guess it would make sense to add reg/reg versions too.
llvm-svn: 24774
2005-12-17 08:26:38 +00:00
80a3875bc1
Implement ret with operand, giving us this:
...
int %test(int %A) {
ret int %A
}
llvm-svn: 24773
2005-12-17 08:15:09 +00:00
1136b7a2e0
Add a pattern for 'ret'. This now compiles:
...
void %test() { ret void }
:)
llvm-svn: 24772
2005-12-17 08:08:42 +00:00
1549e4d590
Add empty patterns for F3_2 instructions
...
llvm-svn: 24771
2005-12-17 08:06:43 +00:00
9f1c860e1e
Implement LowerArguments, at least for the first 6 integer args
...
llvm-svn: 24770
2005-12-17 08:03:24 +00:00
4f34e9f7ff
Add the framework for a dag-dag isel
...
llvm-svn: 24769
2005-12-17 07:47:01 +00:00
f3b16bc5a0
Remove a few lines of dead code.
...
llvm-svn: 24768
2005-12-17 07:18:44 +00:00
69b5d17f92
asmprinter done, added crucial missing step
...
llvm-svn: 24767
2005-12-17 07:17:59 +00:00
55f9dbe1ea
Use the AsmPrinter for global variable init printing. This eliminates a
...
bunch of code and causes V8 to start using the fancy .asciz directive that
the sun assembler supports.
llvm-svn: 24766
2005-12-17 07:17:08 +00:00
fb7fd98cd4
Switch constant pool printing over to use the Shared AsmPrinter version
...
llvm-svn: 24765
2005-12-17 07:11:43 +00:00
b808c8e2e4
Use the shared AsmPrinter code for some basic stuff. No functionality
...
change except for fewer .section directives emitted
llvm-svn: 24764
2005-12-17 07:04:29 +00:00
7087cd275b
Added an idea about any_extend for performance tuning.
...
llvm-svn: 24763
2005-12-17 06:54:43 +00:00
9e2af046e4
Convert the remaining instructions over, branches and calls. Fix a couple
...
minor bugs
llvm-svn: 24762
2005-12-17 06:54:41 +00:00
6b669e2680
convert FP instructions to use an asmstring and operand list, allowing FP
...
programs to work on V8 again
llvm-svn: 24761
2005-12-17 06:32:52 +00:00
bc7708c0e8
Added truncate.
...
llvm-svn: 24760
2005-12-17 02:02:50 +00:00
b06925d1dd
Added anyext, modelled as zext on X86.
...
llvm-svn: 24759
2005-12-17 01:47:57 +00:00
6b76009393
Added some isel ideas.
...
llvm-svn: 24757
2005-12-17 01:25:19 +00:00
cb19390ead
Added support for cmp, test, and conditional move instructions.
...
llvm-svn: 24756
2005-12-17 01:24:02 +00:00
0f68322992
Only lower SELECT when using DAG based isel.
...
llvm-svn: 24755
2005-12-17 01:22:13 +00:00
225a4d0d6d
X86 lowers SELECT to a cmp / test followed by a conditional move.
...
llvm-svn: 24754
2005-12-17 01:21:05 +00:00
7c462768ed
Added source file/line correspondence for dwarf (PowerPC only at this point.)
...
llvm-svn: 24748
2005-12-16 22:45:29 +00:00
887af88ce3
Weak and linkonce global vars should still have a .globl emitted for them
...
llvm-svn: 24747
2005-12-16 21:46:14 +00:00
672578bd94
Add a second vector type to the VRRC register class, and fix some patterns
...
so that tablegen can infer all types.
llvm-svn: 24746
2005-12-16 09:19:13 +00:00
9f2c3a7c4e
add some notes
...
llvm-svn: 24745
2005-12-16 07:20:53 +00:00
fa55745cbc
Add a couple more instrs
...
llvm-svn: 24744
2005-12-16 07:18:48 +00:00
e082426ae7
remove some dead code
...
llvm-svn: 24743
2005-12-16 07:16:02 +00:00
70310906e7
asmprint pseudo instrs
...
llvm-svn: 24742
2005-12-16 07:13:26 +00:00
68d064a3a6
Autogenerate asmprinter for F3_2 instructions
...
llvm-svn: 24741
2005-12-16 07:10:02 +00:00
1e777082a0
Switch F3_1 instructions over to use AsmStrings
...
llvm-svn: 24740
2005-12-16 06:52:00 +00:00
4870224a56
Plug in basic hooks for an autogenerated asm printer to fill in.
...
llvm-svn: 24739
2005-12-16 06:34:17 +00:00
34e80f0114
Add operand info for F3_[12] instructions, getting V8 back to basic functionality.
...
With this, Regression/CodeGen/SparcV8/basictest.ll now passes. Lets hear it
for regression tests :)
llvm-svn: 24738
2005-12-16 06:25:42 +00:00
b527f48acd
Remove JIT support, which doesn't work.
...
llvm-svn: 24736
2005-12-16 06:06:07 +00:00
1e1ca1e9a5
add some simple operand info
...
llvm-svn: 24735
2005-12-16 06:02:58 +00:00
575751151c
Update the darwin handling of linkonce & weak functions and GV stubs. This
...
should work in all permutations.
llvm-svn: 24728
2005-12-16 00:22:14 +00:00
9f62a2a51d
Don't globalize internal functions
...
llvm-svn: 24727
2005-12-16 00:07:30 +00:00
74151ba279
* Promote all 1 bit entities to 8 bit.
...
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.
llvm-svn: 24726
2005-12-15 19:49:23 +00:00
83e4407379
Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support
...
if after legalize. This fixes IA64 failures.
llvm-svn: 24725
2005-12-15 19:02:38 +00:00
305c6a73b5
Added frameindex, constpool, globaladdr, and externalsym as root nodes of
...
leaaddr.
llvm-svn: 24724
2005-12-15 08:31:04 +00:00
a2ebc62862
Added constpool, frameindex, and externalsym nodes.
...
llvm-svn: 24723
2005-12-15 08:29:48 +00:00
00fcb0017e
Handling zero extension of 1 bit value.
...
llvm-svn: 24722
2005-12-15 01:02:48 +00:00
bc9344477e
Use MOV8rm to load 1 bit value.
...
llvm-svn: 24721
2005-12-15 00:59:17 +00:00
808f7a8abb
Remove a now unused statistic.
...
llvm-svn: 24720
2005-12-14 22:56:16 +00:00
e37cb604c1
Use the new predicate support that Evan Cheng added to remove some code
...
from the DAGToDAG cpp file. This adds pattern support for vector and
scalar fma, which passes test/Regression/CodeGen/PowerPC/fma.ll, and
does the right thing in the presence of -disable-excess-fp-precision.
Allows us to match:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = mul <4 x float> %tmp1, %tmp1
%tmp3 = add <4 x float> %tmp2, %tmp1
store <4 x float> %tmp3, <4 x float> *%a
ret void
}
As:
_foo:
li r2, 0
lvx v0, r2, r3
vmaddfp v0, v0, v0, v0
stvx v0, r2, r3
blr
Or, with llc -disable-excess-fp-precision,
_foo:
li r2, 0
lvx v0, r2, r3
vxor v1, v1, v1
vmaddfp v1, v0, v0, v1
vaddfp v0, v1, v0
stvx v0, r2, r3
blr
llvm-svn: 24719
2005-12-14 22:54:33 +00:00
023aef2f31
Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/14/2005 hbd failure.
...
llvm-svn: 24717
2005-12-14 22:28:18 +00:00
3db275d996
Added predicate !NoExcessFPPrecision to FMADD, FMADDS, FMSUB, and FMSUBS.
...
llvm-svn: 24716
2005-12-14 22:07:12 +00:00
d296a43f96
Added support to specify predicates.
...
llvm-svn: 24715
2005-12-14 22:02:59 +00:00
b8be9d1596
Fixed extload type profile. The 4th operand is a ValueType node with type
...
OtherVT, it cannot be compare to type of 1st operand which is an integer type.
llvm-svn: 24713
2005-12-14 19:40:54 +00:00
d39c60fcc8
When folding loads into ops, immediately replace uses of the op with the
...
load. This reduces number of worklist iterations and avoid missing optimizations
depending on folding of things into sext_inreg nodes (which aren't supported by
all targets).
Tested by Regression/CodeGen/X86/extend.ll:test2
llvm-svn: 24712
2005-12-14 19:25:30 +00:00
7dac1083da
Fix the (zext (zextload)) case to trigger, similarly for sign extends.
...
Allow (zext (truncate)) to apply after legalize if the target supports
AND (which all do).
This compiles
short %foo() {
%tmp.0 = load ubyte* %X ; <ubyte> [#uses=1]
%tmp.3 = cast ubyte %tmp.0 to short ; <short> [#uses=1]
ret short %tmp.3
}
to:
_foo:
movzbl _X, %eax
ret
instead of:
_foo:
movzbl _X, %eax
movzbl %al, %eax
ret
thanks to Evan for pointing this out.
llvm-svn: 24709
2005-12-14 19:05:06 +00:00
8c9e14620f
Fix Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll, a crash on undefined
...
behavior in 126.gcc on big-endian systems.
llvm-svn: 24708
2005-12-14 17:23:59 +00:00
f753d1a574
Fix a miscompilation in crafty due to a recent patch
...
llvm-svn: 24706
2005-12-14 07:58:38 +00:00
c273900dd8
Added sext and zext patterns.
...
llvm-svn: 24705
2005-12-14 02:22:27 +00:00
683d8515b1
Added sextld + zextld DAG nodes.
...
llvm-svn: 24703
2005-12-14 02:21:01 +00:00
bce7c47306
Fold (zext (load x) to (zextload x).
...
llvm-svn: 24702
2005-12-14 02:19:23 +00:00
40f081d8e0
Add support for fmul node of type v4f32.
...
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = mul <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
Is selected to:
_foo:
li r2, 0
lvx v0, r2, r3
vxor v1, v1, v1
vmaddfp v0, v0, v0, v1
stvx v0, r2, r3
blr
llvm-svn: 24701
2005-12-14 00:34:09 +00:00
69caef2b78
Prepare support for AltiVec multiply, divide, and sqrt.
...
llvm-svn: 24700
2005-12-13 22:55:22 +00:00
6796b48e51
Adjust the constructor to the Linker class to take an argument that names
...
the module being constructed. This is used to correctly name the module.
Previously the name of the linker tool was used which produces confusing
output when the module identifier is used in an error message.
llvm-svn: 24699
2005-12-13 20:00:37 +00:00
175613adf6
Improve ResolveFunctions to:
...
a) use better local variable names (OldMT -> OldFT) where "M" is used to
mean "Function" (perhaps it was previously "Method"?)
b) print out the module identifier in a warning message so that it is
possible to track down in which module the error occurred.
llvm-svn: 24698
2005-12-13 19:56:51 +00:00
5d4e61dd87
Don't lump the filename and working dir together
...
llvm-svn: 24697
2005-12-13 17:40:33 +00:00
229f0ee6d7
Add load + store folding srl and sra patterns.
...
llvm-svn: 24696
2005-12-13 07:24:22 +00:00
87079884d1
Use the shared asmprinter code for printing special llvm globals
...
llvm-svn: 24695
2005-12-13 06:32:50 +00:00
f0e9aef954
Add a couple more fields, move ctor init list to .cpp file, add support
...
for emitting the ctor/dtor list for common targets.
llvm-svn: 24694
2005-12-13 06:32:10 +00:00
4d80f6e52e
Add ELF and darwin support for static ctors and dtors
...
llvm-svn: 24693
2005-12-13 04:53:51 +00:00
54a11df95d
reindent a loop, unswitch a loop. No functionality changes
...
llvm-svn: 24692
2005-12-13 04:33:58 +00:00
956aef45c9
Lowering constant pool entries on ppc exposed a bug in the recently added
...
ConstantVec legalizing code, which would return constantpool nodes that
were not of the target's pointer type.
llvm-svn: 24691
2005-12-13 03:03:23 +00:00
acec857b1a
Beautify a few patterns.
...
llvm-svn: 24690
2005-12-13 02:40:18 +00:00
89c6db4baf
Some shl patterns which do load + store folding.
...
llvm-svn: 24689
2005-12-13 02:34:51 +00:00
108beceb0f
A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility.
...
llvm-svn: 24688
2005-12-13 01:57:51 +00:00
ddd5ae5a22
Add and, or, and xor patterns which fold load + stores.
...
llvm-svn: 24687
2005-12-13 01:41:36 +00:00
e5a94a03e2
Add inc + dec patterns which fold load + stores.
...
llvm-svn: 24686
2005-12-13 01:02:47 +00:00
bde9e6fca6
Add neg and not patterns which fold load + stores.
...
llvm-svn: 24685
2005-12-13 00:54:44 +00:00
c414d563f0
Missed a couple redundant explicit type casts.
...
llvm-svn: 24684
2005-12-13 00:25:07 +00:00
62e6808aa5
Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc.
...
llvm-svn: 24683
2005-12-13 00:14:11 +00:00
86b2cf22d2
* Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands.
...
This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.
llvm-svn: 24682
2005-12-13 00:01:09 +00:00
3e52756928
Add some integer mul patterns.
...
llvm-svn: 24681
2005-12-12 23:47:46 +00:00
9e8b633ec1
Accept and ignore prefetches for now
...
llvm-svn: 24678
2005-12-12 22:51:16 +00:00
b42ce7ca63
Fix CodeGen/Generic/2005-12-12-ExpandSextInreg.ll
...
llvm-svn: 24677
2005-12-12 22:27:43 +00:00
af3fe8217a
Add some sub patterns.
...
llvm-svn: 24675
2005-12-12 21:54:05 +00:00
67ed58e22b
When SelectLEAAddr() fails, it shouldn't cause the side effect of having the
...
base or index operands being selected.
llvm-svn: 24674
2005-12-12 21:49:40 +00:00
bfd259a2b7
For ISD::RET, if # of operands >= 2, try selection the real data dep. operand
...
first before the chain.
e.g.
int X;
int foo(int x)
{
x += X + 37;
return x;
}
If chain operand is selected first, we would generate:
movl X, %eax
movl 4(%esp), %ecx
leal 37(%ecx,%eax), %eax
rather than
movl $37, %eax
addl 4(%esp), %eax
addl X, %eax
which does not require %ecx. (Due to ADD32rm not matching.)
llvm-svn: 24673
2005-12-12 20:32:18 +00:00
cd54254af3
fix FP selects
...
llvm-svn: 24672
2005-12-12 20:30:09 +00:00
d6b17765e4
remove some never-completed and now-obsolete code.
...
llvm-svn: 24671
2005-12-12 20:12:20 +00:00
e80248b378
Add a few more add / store patterns. e.g. ADD32mi8.
...
llvm-svn: 24670
2005-12-12 19:45:23 +00:00
b8296181e0
restore a more restricted select
...
llvm-svn: 24668
2005-12-12 17:43:52 +00:00
3b0a62d8a5
Implement a little hack for parity with GCC on crafty. This speeds up
...
186.crafty by about 16% (from 15.109s to 13.045s) on my system.
This turns allocas with unions/casts into scalars. For example crafty has
something like this:
union doub {
unsigned short i[4];
long long d;
};
int f(long long a) {
return ((union doub){.d=a}).i[1];
}
Instead of generating loads and stores to an alloca, we now promote the
whole thing to a scalar long value.
This implements: Transforms/ScalarRepl/AggregatePromote.ll
llvm-svn: 24667
2005-12-12 07:19:13 +00:00
a4c6cc5af4
Fix typo :(
...
llvm-svn: 24664
2005-12-11 18:43:13 +00:00
f1a54c0d14
Minor tweak to get isel opt
...
llvm-svn: 24663
2005-12-11 09:05:13 +00:00
254e0a842f
add selectcc
...
llvm-svn: 24662
2005-12-11 08:35:54 +00:00
090eed0483
Remove type casts that are no longer needed
...
llvm-svn: 24661
2005-12-11 07:45:47 +00:00
e6f2c82073
Realize the constant pool & global addrs must always be ptr type
...
llvm-svn: 24660
2005-12-11 07:45:04 +00:00
3d9559fedc
Fix the JIT failures from last night.
...
llvm-svn: 24659
2005-12-11 07:37:41 +00:00
20d0b81c04
FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself
...
llvm-svn: 24658
2005-12-11 03:54:31 +00:00
4e56db674c
Add support for TargetConstantPool nodes to the dag isel emitter, and use
...
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.
llvm-svn: 24657
2005-12-10 02:36:00 +00:00
3c5198336c
Use SDTCisPtrTy type property for store address.
...
llvm-svn: 24656
2005-12-10 01:59:36 +00:00
0d6cfee704
* Added X86 store patterns.
...
* Added X86 dec patterns.
llvm-svn: 24654
2005-12-10 00:48:20 +00:00
dadc1057ac
Added new getNode and getTargetNode variants for X86 stores.
...
llvm-svn: 24653
2005-12-10 00:37:58 +00:00
ade6f9a255
Add support patterns to many load and store instructions which will
...
hopefully use patterns in the near future.
llvm-svn: 24651
2005-12-09 23:54:18 +00:00
27656ac89c
Add SDTCisPtrTy and use it for loads, to indicate that the operand of a load
...
must be a pointer. This removes a type check out of the code generated by
tblgen for load matching.
llvm-svn: 24650
2005-12-09 22:58:42 +00:00
275a3ed80c
Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al
...
llvm-svn: 24648
2005-12-09 22:48:48 +00:00
a6f835f5a0
Avoid emitting two tabs when switching to a named section
...
llvm-svn: 24646
2005-12-09 19:28:49 +00:00
e0f5f8e43c
Teach the PPC backend about the ctor and dtor list when not using __main and
...
linking the entire program into one bc file.
llvm-svn: 24645
2005-12-09 18:24:29 +00:00
268d457b69
Teach legalize how to promote sext_inreg to fix a problem Andrew pointed
...
out to me.
llvm-svn: 24644
2005-12-09 17:32:47 +00:00
87bf2234b5
it helps if your conditionals are not reversed
...
llvm-svn: 24641
2005-12-09 00:45:42 +00:00
be73d6eece
improve code insertion in two ways:
...
1. Only forward subst offsets into loads and stores, not into arbitrary
things, where it will likely become a load.
2. If the source is a cast from pointer, forward subst the cast as well,
allowing us to fold the cast away (improving cases when the cast is
from an alloca or global).
This hasn't been fully tested, but does appear to further reduce register
pressure and improve code. Lets let the testers grind on it a bit. :)
llvm-svn: 24640
2005-12-08 08:00:12 +00:00
29e6c3dbf9
Add another important case we miss
...
llvm-svn: 24639
2005-12-08 07:13:28 +00:00
790af6d18f
Added support for ComplexPattern.
...
llvm-svn: 24638
2005-12-08 04:28:48 +00:00
f039648614
Added explicit type field to ComplexPattern.
...
llvm-svn: 24637
2005-12-08 02:15:07 +00:00
c9fab31098
* Added intelligence to X86 LEA addressing mode matching routine so it returns
...
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.
llvm-svn: 24635
2005-12-08 02:01:35 +00:00
ae89d862f5
Fix a crash where ConstantVec nodes were being generated with the wrong
...
type when the target did not support them. Also teach Legalize how to
expand ConstantVecs.
This allows us to generate
_test:
lwz r2, 12(r3)
lwz r4, 8(r3)
lwz r5, 4(r3)
lwz r6, 0(r3)
addi r2, r2, 4
addi r4, r4, 3
addi r5, r5, 2
addi r6, r6, 1
stw r2, 12(r3)
stw r4, 8(r3)
stw r5, 4(r3)
stw r6, 0(r3)
blr
For:
void %test(%v4i *%P) {
%T = load %v4i* %P
%S = add %v4i %T, <int 1, int 2, int 3, int 4>
store %v4i %S, %v4i * %P
ret void
}
On PowerPC.
llvm-svn: 24633
2005-12-07 19:48:11 +00:00
57c882edf8
Only transform (sext (truncate x)) -> (sextinreg x) if before legalize or
...
if the target supports the resultant sextinreg
llvm-svn: 24632
2005-12-07 18:02:05 +00:00
3225733e65
X86 doesn't support sextinreg for 8-bit things either.
...
llvm-svn: 24631
2005-12-07 17:59:14 +00:00
cbd3d01a43
Teach the dag combiner to turn a truncate/sign_extend pair into a sextinreg
...
when the types match up. This allows the X86 backend to compile:
sbyte %toggle_value(sbyte* %tmp.1) {
%tmp.2 = load sbyte* %tmp.1
ret sbyte %tmp.2
}
to this:
_toggle_value:
mov %EAX, DWORD PTR [%ESP + 4]
movsx %EAX, BYTE PTR [%EAX]
ret
instead of this:
_toggle_value:
mov %EAX, DWORD PTR [%ESP + 4]
movsx %EAX, BYTE PTR [%EAX]
movsx %EAX, %AL
ret
noticed in Shootout/objinst.
-Chris
llvm-svn: 24630
2005-12-07 07:11:03 +00:00
26473b6b58
fix divide and remainder
...
llvm-svn: 24628
2005-12-06 23:27:39 +00:00
de085f0165
Silence another annoying GCC warning
...
llvm-svn: 24627
2005-12-06 20:56:18 +00:00
973cd1c845
more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp
...
llvm-svn: 24625
2005-12-06 20:43:30 +00:00
29b7ef0065
OK, this does wonders for broken stuff
...
llvm-svn: 24624
2005-12-06 20:40:34 +00:00
a69fcbdeb8
Collapsing node if variable length struct with final field of length zero
...
llvm-svn: 24621
2005-12-06 18:04:30 +00:00
d490d4f023
Fix test/Regression/Linker/2005-12-06-AppendingZeroLengthArrays.ll and
...
PR662. Thanks to Markus for providing me with a ton of files to
reproduce the problem!
llvm-svn: 24619
2005-12-06 17:30:58 +00:00
41b1cdc771
Teach the SelectionDAG ISel how to turn ConstantPacked values into
...
constant nodes with vector types. Also teach the asm printer how to print
ConstantPacked constant pool entries. This allows us to generate altivec
code such as the following, which adds a vector constantto a packed float.
LCPI1_0: <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 >
.space 4
.space 4
.space 4
.long 1065353216 ; float 1
.text
.align 4
.globl _foo
_foo:
lis r2, ha16(LCPI1_0)
la r2, lo16(LCPI1_0)(r2)
li r4, 0
lvx v0, r4, r2
lvx v1, r4, r3
vaddfp v0, v1, v0
stvx v0, r4, r3
blr
For the llvm code:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 >
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
llvm-svn: 24616
2005-12-06 06:18:55 +00:00
fea33f7e64
Use new PPC-specific nodes to represent shifts which require the 6-bit
...
amount handling that PPC provides. These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits. This fixes a miscompilation of crafty with
the new front-end.
llvm-svn: 24615
2005-12-06 02:10:38 +00:00
e788bbf6ef
added instructions with inverted immediates
...
llvm-svn: 24614
2005-12-06 00:33:53 +00:00
08c4a775e6
yea, it helps to have your path set right when testing
...
llvm-svn: 24613
2005-12-05 23:41:45 +00:00
3c7c4d7508
These never trigger, but whatever
...
llvm-svn: 24612
2005-12-05 23:19:44 +00:00
c0c190239d
Remove unnecessary let hasCtrlDep=1 now it can be inferred.
...
llvm-svn: 24611
2005-12-05 23:09:43 +00:00
5bfcd1e63a
move this over to the dag
...
llvm-svn: 24609
2005-12-05 20:50:53 +00:00
077200737c
getRawValue zero extens for unsigned values, use getsextvalue so that we
...
know that small negative values fit into the immediate field of addressing
modes.
llvm-svn: 24608
2005-12-05 18:23:57 +00:00
9410433966
fix constant pool loads
...
llvm-svn: 24607
2005-12-05 17:51:02 +00:00
3539778883
Fix the #1 code quality problem that I have seen on X86 (and it also affects
...
PPC and other targets). In a particular, consider code like this:
struct Vector3 { double x, y, z; };
struct Matrix3 { Vector3 a, b, c; };
double dot(Vector3 &a, Vector3 &b) {
return a.x * b.x + a.y * b.y + a.z * b.z;
}
Vector3 mul(Vector3 &a, Matrix3 &b) {
Vector3 r;
r.x = dot( a, b.a );
r.y = dot( a, b.b );
r.z = dot( a, b.c );
return r;
}
void transform(Matrix3 &m, Vector3 *x, int n) {
for (int i = 0; i < n; i++)
x[i] = mul( x[i], m );
}
we compile transform to a loop with all of the GEP instructions for indexing
into 'm' pulled out of the loop (9 of them). Because isel occurs a bb at a time
we are unable to fold the constant index into the loads in the loop, leading to
PPC code that looks like this:
LBB3_1: ; no_exit.preheader
li r2, 0
addi r6, r3, 64 ;; 9 values live across the loop body!
addi r7, r3, 56
addi r8, r3, 48
addi r9, r3, 40
addi r10, r3, 32
addi r11, r3, 24
addi r12, r3, 16
addi r30, r3, 8
LBB3_2: ; no_exit
lfd f0, 0(r30)
lfd f1, 8(r4)
fmul f0, f1, f0
lfd f2, 0(r3) ;; no constant indices folded into the loads!
lfd f3, 0(r4)
lfd f4, 0(r10)
lfd f5, 0(r6)
lfd f6, 0(r7)
lfd f7, 0(r8)
lfd f8, 0(r9)
lfd f9, 0(r11)
lfd f10, 0(r12)
lfd f11, 16(r4)
fmadd f0, f3, f2, f0
fmul f2, f1, f4
fmadd f0, f11, f10, f0
fmadd f2, f3, f9, f2
fmul f1, f1, f6
stfd f0, 0(r4)
fmadd f0, f11, f8, f2
fmadd f1, f3, f7, f1
stfd f0, 8(r4)
fmadd f0, f11, f5, f1
addi r29, r4, 24
stfd f0, 16(r4)
addi r2, r2, 1
cmpw cr0, r2, r5
or r4, r29, r29
bne cr0, LBB3_2 ; no_exit
uh, yuck. With this patch, we now sink the constant offsets into the loop, producing
this code:
LBB3_1: ; no_exit.preheader
li r2, 0
LBB3_2: ; no_exit
lfd f0, 8(r3)
lfd f1, 8(r4)
fmul f0, f1, f0
lfd f2, 0(r3)
lfd f3, 0(r4)
lfd f4, 32(r3) ;; much nicer.
lfd f5, 64(r3)
lfd f6, 56(r3)
lfd f7, 48(r3)
lfd f8, 40(r3)
lfd f9, 24(r3)
lfd f10, 16(r3)
lfd f11, 16(r4)
fmadd f0, f3, f2, f0
fmul f2, f1, f4
fmadd f0, f11, f10, f0
fmadd f2, f3, f9, f2
fmul f1, f1, f6
stfd f0, 0(r4)
fmadd f0, f11, f8, f2
fmadd f1, f3, f7, f1
stfd f0, 8(r4)
fmadd f0, f11, f5, f1
addi r6, r4, 24
stfd f0, 16(r4)
addi r2, r2, 1
cmpw cr0, r2, r5
or r4, r6, r6
bne cr0, LBB3_2 ; no_exit
This is much nicer as it reduces register pressure in the loop a lot. On X86,
this takes the function from having 9 spilled registers to 2. This should help
some spec programs on X86 (gzip?)
This is currently only enabled with -enable-gep-isel-opt to allow perf testing
tonight.
llvm-svn: 24606
2005-12-05 07:10:48 +00:00
7d4d93c52c
Add a flag to Module::getGlobalVariable to allow it to return vars with
...
internal linkage.
Patch provided by Evan Jones, thanks!
llvm-svn: 24604
2005-12-05 05:30:21 +00:00
165998207e
Wrap a long line, never internalize llvm.used.
...
llvm-svn: 24602
2005-12-05 05:07:38 +00:00
3c0b8f577d
Several things:
...
1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly. The port number really
*is* a 16-bit value, but the patterns should only match if the number
is 0-255. Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
i8, not an i16 as they were believed to be before. This previous fib
stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.
llvm-svn: 24599
2005-12-05 02:40:25 +00:00
282c2af4d8
On some targets (e.g. X86), shift amounts are not the same as the value
...
being shifted. Don't assume they are.
llvm-svn: 24598
2005-12-05 02:37:26 +00:00
c54cddd25b
Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted.
...
llvm-svn: 24595
2005-12-05 02:34:29 +00:00
f3322af5c6
Add some explicit type casts so that tblgen knows the type of the shift
...
amount, which is not necessarily the same as the type being shifted.
llvm-svn: 24594
2005-12-05 02:34:05 +00:00
efc86f5f7a
The basic fneg cases are already autogen'd
...
llvm-svn: 24592
2005-12-04 19:04:38 +00:00
f979794717
Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen
...
improvements.
llvm-svn: 24591
2005-12-04 19:01:59 +00:00
fd857daa0d
Finish moving uncond br over to .td file, remove from .cpp file.
...
llvm-svn: 24590
2005-12-04 18:48:01 +00:00
d9d18aff6a
Define BR in the .td file now that Evan made tblgen smarter.
...
llvm-svn: 24589
2005-12-04 18:42:54 +00:00
95cb763818
Added isel patterns for RET, JMP, and WRITEPORT.
...
llvm-svn: 24588
2005-12-04 08:19:43 +00:00
e8531381e2
* Added instruction property hasCtrlDep for those which r/w control-flow
...
chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.
llvm-svn: 24586
2005-12-04 08:13:17 +00:00
7e79292fef
Fix PR672 another way which should be more robust
...
llvm-svn: 24585
2005-12-04 06:03:50 +00:00
8782b782cd
dbg.stoppoint returns a value, don't forget to init it
...
llvm-svn: 24583
2005-12-03 18:50:48 +00:00
2820b8c855
Fix SimplifyCFG/2005-12-03-IncorrectPHIFold.ll
...
llvm-svn: 24581
2005-12-03 18:25:58 +00:00
ecfc7e56c5
Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.
...
This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on. Given a clean nightly tester run, we should be able to turn it
on by default!
llvm-svn: 24578
2005-12-03 07:15:55 +00:00
f9b27d7011
bah, must generate all results
...
llvm-svn: 24574
2005-12-02 06:08:08 +00:00
73420b3795
cycle counter fix
...
llvm-svn: 24573
2005-12-02 04:56:24 +00:00
986cb40953
add a note
...
llvm-svn: 24572
2005-12-02 00:11:20 +00:00
0142afd6c1
Don't remove two operand, two result nodes from the binary ops map. These
...
should come from the arbitrary ops map.
This fixes Regression/CodeGen/PowerPC/2005-12-01-Crash.ll
llvm-svn: 24571
2005-12-01 23:14:50 +00:00
05b0b4575b
Promote line and column number information for our friendly 64-bit targets.
...
llvm-svn: 24568
2005-12-01 18:21:35 +00:00
93feffb4ed
IA64 doesn't support the LOCATION node, and for some reason the ISelPattern
...
stuff isn't using ISelLowering.cpp
llvm-svn: 24567
2005-12-01 18:19:53 +00:00
df9287836e
Make sure these get added into the codegenmap when appropriate
...
llvm-svn: 24566
2005-12-01 18:09:22 +00:00
9d0d715e83
This is a bugfix for SelectNodeTo. In certain situations, we could be
...
selecting a node and use a mix of getTargetNode() and SelectNodeTo. Because
SelectNodeTo didn't check the CSE maps for a preexisting node and didn't insert
its result into the CSE maps, we would sometimes miss a CSE opportunity.
This is extremely rare, but worth fixing for completeness.
llvm-svn: 24565
2005-12-01 18:00:57 +00:00
7bb09912c8
major think-o
...
llvm-svn: 24564
2005-12-01 17:48:51 +00:00
006bb04f3a
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
...
work. This change has no effect on generated code.
llvm-svn: 24563
2005-12-01 04:51:06 +00:00
aa5f8f2a26
Cosmetic change, better reflects actual values
...
llvm-svn: 24562
2005-12-01 04:48:26 +00:00
bd099102f0
Fix a regression caused by a patch earlier today
...
llvm-svn: 24561
2005-12-01 03:50:19 +00:00
ce68ef8073
Flags where I think I need them, quick, before the nightly tester starts
...
llvm-svn: 24560
2005-12-01 01:53:10 +00:00
4b02426130
Proper support for shifts with register shift value.
...
llvm-svn: 24559
2005-12-01 00:43:55 +00:00
d94aa71e1a
Use a getCopyToReg() variant to generate a flaggy CopyToReg node.
...
llvm-svn: 24558
2005-12-01 00:41:50 +00:00
4b25924d2a
SelectNodeTo now returns its result, we must pay attention to it.
...
llvm-svn: 24552
2005-11-30 23:04:38 +00:00
a75694aa16
Pay attn to the node returned by SelectNodeTo
...
llvm-svn: 24551
2005-11-30 23:02:08 +00:00
af2e0373dd
SelectNodeTo now returns its result, we must pay attention to it.
...
llvm-svn: 24550
2005-11-30 22:59:19 +00:00
e318977940
SelectNodeTo now returns N. Use it instead of return N directly.
...
llvm-svn: 24549
2005-11-30 22:53:06 +00:00
be5dd5da19
Make SelectNodeTo return N
...
llvm-svn: 24548
2005-11-30 22:45:14 +00:00
3713e6b49c
Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
...
llvm-svn: 24547
2005-11-30 20:40:54 +00:00
dc4ffef633
Fix a bug where we didn't realize that vaarg reads memory. This fixes
...
Transforms/DeadStoreElimination/2005-11-30-vaarg.ll
llvm-svn: 24545
2005-11-30 19:38:22 +00:00
11695c0537
Fix a typo in my latest change
...
llvm-svn: 24542
2005-11-30 18:57:39 +00:00
6f8c1ace6e
No longer track value types for asm printer operands, and remove them as
...
an argument to every operand printing function. Requires some slight
tweaks to x86, the only user.
llvm-svn: 24541
2005-11-30 18:54:35 +00:00
c174048430
CALLSEQ_START/END nodes don't get memoized, do not add them in when
...
replaceAllUses'ing.
llvm-svn: 24539
2005-11-30 18:20:52 +00:00
7ffe3affda
remove redundant code
...
llvm-svn: 24538
2005-11-30 17:14:11 +00:00
6ee8566cae
At long last, you can say that f32 isn't supported for setcc
...
llvm-svn: 24537
2005-11-30 17:12:26 +00:00
ede966e8ee
Make typesafe that which isn't: FCMOVxx
...
llvm-svn: 24536
2005-11-30 17:11:20 +00:00
873ed82a36
FPSelect and more custom lowering
...
llvm-svn: 24535
2005-11-30 16:10:29 +00:00
1064d6ec43
First chunk of actually generating vector code for packed types. These
...
changes allow us to generate the following code:
_foo:
li r2, 0
lvx v0, r2, r3
vaddfp v0, v0, v0
stvx v0, r2, r3
blr
for this llvm:
void %foo(<4 x float>* %a) {
entry:
%tmp1 = load <4 x float>* %a
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float>* %a
ret void
}
llvm-svn: 24534
2005-11-30 08:22:07 +00:00
6db615df14
All sorts of stuff.
...
Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy. They should be custom lowered though.
Lots more stuff compiles now (go go single source!). Of course, none of it
probably works, but that is what the nightly tester can find out :)
llvm-svn: 24533
2005-11-30 07:19:56 +00:00
8d17c70171
add support for custom lowering SINT_TO_FP
...
llvm-svn: 24531
2005-11-30 06:43:03 +00:00
3fd1b4c9bf
Fix a problem with llvm-ranlib that (on some platforms) caused the archive
...
file to become corrupted due to interactions between mmap'd memory segments
and file descriptors closing. The problem is completely avoiding by using
a third temporary file.
Patch provided by Evan Jones
llvm-svn: 24527
2005-11-30 05:21:10 +00:00
9c7af08bc9
Fix a bug in a recent patch that broke shifts
...
llvm-svn: 24526
2005-11-30 05:11:18 +00:00
4eb7af9bc9
Added support to STORE and shifts to DAG to DAG isel.
...
llvm-svn: 24525
2005-11-30 02:51:20 +00:00
11d61613af
Fixed a bug introduced by my last commit: TargetGlobalValues should key on
...
GlobalValue * and index pair. Update getGlobalAddress() for symmetry.
llvm-svn: 24524
2005-11-30 02:49:21 +00:00
0e0de2f3f0
Added an index field to GlobalAddressSDNode so it can represent X+12, etc.
...
llvm-svn: 24523
2005-11-30 02:04:11 +00:00
d2cb70513d
Fixed a minor bug: - -offset != offset iff offset == MININT
...
llvm-svn: 24522
2005-11-30 01:59:00 +00:00
048b26387b
Represent the encoding of the SPR instructions as they actually are, so
...
that we can use the correct SPR numbers in the InstrInfo.td file. This is
necessary to support VRsave.
llvm-svn: 24521
2005-11-29 22:42:50 +00:00
72ab335858
Add more X86 ISel patterns.
...
llvm-svn: 24520
2005-11-29 19:38:52 +00:00
3e7db9c6d5
Hook up one type, v4f32, to the VR RegisterClass for now.
...
llvm-svn: 24517
2005-11-29 08:17:20 +00:00
c138118cdb
Add the remainder of the AltiVec 4 x float instructions. Further
...
enhancements will be necessary to teach the code generator that since
there is no fmul, it will have to do vmaddfp, adding +0.0.
llvm-svn: 24516
2005-11-29 08:04:45 +00:00
435b402e1f
Add support for a new STRING and LOCATION node for line number support, patch
...
contributed by Daniel Berlin, with a few cleanups here and there by me.
llvm-svn: 24515
2005-11-29 06:21:05 +00:00
9c415364cf
No targets support line number info yet.
...
llvm-svn: 24513
2005-11-29 06:16:21 +00:00
89b049af90
Add the majority of the vector machien value types we expect to support,
...
and make a few changes to the legalization machinery to support more than
16 types.
llvm-svn: 24511
2005-11-29 05:45:29 +00:00
1d4af53444
Fixed a comment bug:
...
createPPCPatternInstructionSelector -> createPPCISelPattern
llvm-svn: 24510
2005-11-29 04:59:46 +00:00
c418b5d938
refix typo
...
llvm-svn: 24505
2005-11-29 00:42:30 +00:00
7a18a25d33
don't say this is i128, because it isn't yet. Hopefully nate will change
...
this to be something sane, but in the mean time it is unused, so safe to
make something bogus.
llvm-svn: 24504
2005-11-29 00:41:40 +00:00
d3bc8cb26d
revert my change for the time being, which broke the build
...
llvm-svn: 24503
2005-11-29 00:24:08 +00:00
50986909dc
fix a typo :)
...
llvm-svn: 24501
2005-11-28 22:42:15 +00:00
d251192910
a few more comments on the interfaces and functions
...
llvm-svn: 24500
2005-11-28 18:10:59 +00:00
517caef495
Added documented rsprofiler interface. Also remove new profiler passes, the
...
old ones have been updated to implement the interface.
llvm-svn: 24499
2005-11-28 18:00:38 +00:00
7ff44ec372
Fix VC++ warning.
...
llvm-svn: 24496
2005-11-28 06:45:57 +00:00
820c94e467
Add a missed optimization
...
llvm-svn: 24495
2005-11-28 04:52:39 +00:00
93e59f6032
Random sampling (aka Arnold and Ryder) profiling. This is still preliminary, but it works on spec on x86 and alpha. The idea is to allow profiling passes to remember what profiling they inserted, then a random sampling framework is inserted which consists of duplicated basic blocks (without profiling), such that at each backedge in the program and entry into every function, the framework chooses whether to use the instrumented code or the instrumentation free code. The goal of such a framework is to make it reasonably cheap to do random sampling of very expensive profiling products (such as load-value profiling).
...
The code is organized into 3 parts (2 passes)
1) a linked set of profiling passes, which implement an analysis group (linked, like alias analysis are). These insert profiling into the program, and remember what they inserted, so that at a later time they can be queried about any instruction.
2) a pass that handles inserting the random sampling framework. This also has options to control how random samples are choosen. Currently implemented are Global counters, register allocated global counters, and read cycle counter (see? there was a reason for it).
The profiling passes are almost identical to the existing ones (block, function, and null profiling is supported right now), and they are valid passes without the sampling framework (hence the existing passes can be unified with the new ones, not done yet).
Some things are a bit ugly still, but that should be fixed up soon enough.
Other todo? making the counter values not "magic 2^16 -1" values, but dynamically choosable.
llvm-svn: 24493
2005-11-28 00:58:09 +00:00
11fd6b22b1
Small tweaks noticed while on the plane.
...
llvm-svn: 24492
2005-11-26 22:39:34 +00:00
5fc3794e71
since reg2mem requires it, might as well mention that it preserves it
...
llvm-svn: 24491
2005-11-25 16:04:54 +00:00
0c88f150c6
add support for dynamic_stackalloc to the dag isel (thanks andrew ;)
...
next up: support argument passing in memory, not just registers
llvm-svn: 24490
2005-11-25 07:49:25 +00:00
8492fd30ab
Some first bits of AltiVec stuff: Instruction Formats, Encodings, and
...
Registers. Apologies to Jim if the scheduling info so far isn't accurate.
There's a few more things like VRsave support that need to be finished up
in my local tree before I can commit code that Does The Right Thing for
turning 4 x float into the various altivec packed float instructions.
llvm-svn: 24489
2005-11-23 05:29:52 +00:00
061029dee2
Reg2Mem is something a pass may depend on, so allow that
...
llvm-svn: 24488
2005-11-22 22:14:23 +00:00
71b09bbb07
turns out, demotion and invokes and critical edges don't mix
...
llvm-svn: 24487
2005-11-22 21:45:19 +00:00
d6a0308470
Fix warning, the better way. Really, this is what this instruction is for, so use it
...
llvm-svn: 24486
2005-11-22 20:59:00 +00:00
03390557fa
Fix warning
...
llvm-svn: 24485
2005-11-22 20:56:05 +00:00
d37c13154a
Check in code to scalarize arbitrarily wide packed types for some simple
...
vector operations (load, add, sub, mul).
This allows us to codegen:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
on ppc as:
_foo:
lfs f0, 12(r3)
lfs f1, 8(r3)
lfs f2, 4(r3)
lfs f3, 0(r3)
fadds f0, f0, f0
fadds f1, f1, f1
fadds f2, f2, f2
fadds f3, f3, f3
stfs f0, 12(r3)
stfs f1, 8(r3)
stfs f2, 4(r3)
stfs f3, 0(r3)
blr
llvm-svn: 24484
2005-11-22 18:16:00 +00:00
0294e33ea4
massive DAGISel patch. lots and lots more stuff compiles now
...
llvm-svn: 24483
2005-11-22 04:20:06 +00:00
07890bbec4
Rather than attempting to legalize 1 x float, make sure the SD ISel never
...
generates it. Make MVT::Vector expand-only, and remove the code in
Legalize that attempts to legalize it.
The plan for supporting N x Type is to continually epxand it in ExpandOp
until it gets down to 2 x Type, where it will be scalarized into a pair of
scalars.
llvm-svn: 24482
2005-11-22 01:29:36 +00:00
ac6cb46429
Use HasDotTypeDotSizeDirective instead of forELF
...
llvm-svn: 24481
2005-11-21 23:06:54 +00:00
78161dbc84
Remove a level of indentation by using a continue.
...
llvm-svn: 24479
2005-11-21 22:48:18 +00:00
40f8c8450d
Simplify the subtarget info, allow the asmwriter to do some target sensing
...
based on TargetType.
llvm-svn: 24478
2005-11-21 22:43:58 +00:00
99be8f766f
Use subtarget information computed by X86Subtarget instead of rolling our own.
...
llvm-svn: 24477
2005-11-21 22:39:40 +00:00
3eb876117a
Make the X86 subtarget compute the basic target type: ELF, Cygwin, Darwin,
...
or native Win32
llvm-svn: 24476
2005-11-21 22:31:58 +00:00
ebc39f5a9c
Add a forELF flag, allowing the removal of forCygwin and simplification of
...
conditionals.
llvm-svn: 24475
2005-11-21 22:19:48 +00:00
7df25ab429
simplify and genericize this code
...
llvm-svn: 24473
2005-11-21 19:50:31 +00:00
8edbf805d7
add support for div/rem to the dag->dag isel. yay.
...
llvm-svn: 24472
2005-11-21 14:14:54 +00:00
f28b3bd8b4
I think I know what you meant here, but just to be safe I'll let you
...
do it. :)
<_sabre_> excuses excuses
llvm-svn: 24471
2005-11-21 14:09:40 +00:00
b9db67a045
Eliminate unneeded intermediate class. Move doFinalizeMethod to bottom of
...
file.
llvm-svn: 24470
2005-11-21 08:40:17 +00:00
b55de47595
Start using shared asmprinter Constant Pool emitter, use shorter cpi names.
...
llvm-svn: 24469
2005-11-21 08:38:26 +00:00
4a7eb5132b
prune #include
...
llvm-svn: 24468
2005-11-21 08:33:17 +00:00
8a5f3c1b68
Switch to using the shared constant pool printer, along with using shorter
...
CPI ids
llvm-svn: 24467
2005-11-21 08:32:23 +00:00
882b9fa977
Switch to using the generic constant pool emitter impl, use shorter
...
CPI names
llvm-svn: 24466
2005-11-21 08:29:17 +00:00
ef83ebd45d
Use generic constant pool emission code in the AsmPrinter class.
...
llvm-svn: 24465
2005-11-21 08:26:15 +00:00
f2991cee1f
Allow target to customize directive used to switch to arbitrary section in SwitchSection,
...
add generic constant pool emitter
llvm-svn: 24464
2005-11-21 08:25:09 +00:00
ffbfa71866
Use the FunctionNumber provided by the AsmPrinter class
...
llvm-svn: 24462
2005-11-21 08:14:07 +00:00
08adbd13ff
increment the function number in SetupMachineFunction
...
llvm-svn: 24461
2005-11-21 08:13:27 +00:00
dd3bf8e4a2
Use CommentString where possible, fix a bug where aix mode wouldn't assemble
...
due to basic blocks being misnamed.
llvm-svn: 24459
2005-11-21 08:02:41 +00:00
a0222a1698
unify the darwin and aix constant pool printers
...
llvm-svn: 24458
2005-11-21 07:57:37 +00:00
bb644e39c0
Adjust to capitalized asmprinter method names
...
llvm-svn: 24457
2005-11-21 07:51:36 +00:00
99946fb63f
Adjust to capitalized AsmPrinter method names
...
llvm-svn: 24456
2005-11-21 07:51:23 +00:00
d365627d3e
Use PrivateGlobalPrefix for basic block labels. This allows the x86 darwin
...
port to properly use L for the bb prefix instead of .
llvm-svn: 24454
2005-11-21 07:43:59 +00:00
c2bc19af57
use PrivateGlobalPrefix for basic blocks
...
llvm-svn: 24453
2005-11-21 07:41:05 +00:00
2b53ea99b0
Use PrivateGlobalPrefix for basic block labels
...
llvm-svn: 24452
2005-11-21 07:39:22 +00:00
9885c97088
Use PrivateGlobalPrefix for basic blocks
...
llvm-svn: 24451
2005-11-21 07:38:08 +00:00
a43b832f7f
Switch to the new shared SwitchSection
...
llvm-svn: 24450
2005-11-21 07:30:28 +00:00
2bccd73dbb
Start using SwitchSection, allowing globals and functions to be emitted
...
to specific sections. Delete some dead functions copied from the X86 backend.
llvm-svn: 24449
2005-11-21 07:26:04 +00:00
050bf2faf8
convert the rest of this over to use SwitchSection
...
llvm-svn: 24448
2005-11-21 07:16:34 +00:00
024e32e118
Start using the AsmPrinter shared SwitchSection code. This allows the X86
...
backend to implement global variables in sections.
llvm-svn: 24447
2005-11-21 07:11:11 +00:00
b650241f8b
This is now implemented in common codegen code
...
llvm-svn: 24446
2005-11-21 07:06:58 +00:00
2ea5c99eca
Add section switching to common code generator code. Add a couple of
...
asserts.
llvm-svn: 24445
2005-11-21 07:06:27 +00:00
2c0b435ba6
Rename SwitchSection -> switchSection to avoid conflicting with a future
...
change.
llvm-svn: 24443
2005-11-21 06:55:27 +00:00
8a4995e42a
Start using PrivateGlobalPrefix correctly
...
llvm-svn: 24442
2005-11-21 06:51:52 +00:00
41cb115afb
set PrivateGlobalPrefix on darwin, use it when printing out CP references
...
llvm-svn: 24441
2005-11-21 06:47:58 +00:00
618981fd03
Naturally align doubles in the constant pool, set PrivateGlobalPrefix on
...
darwin, use it when printing the constant pool indices so the labels are
appropriately private, emit cp entries to .const instead of .data on darwin
and only emit a single .section for the constant pool, not one for each
entry.
llvm-svn: 24440
2005-11-21 06:46:22 +00:00
6c1ca888d4
Lower READCYCLECOUNTER correctly, preserving the chain result
...
llvm-svn: 24438
2005-11-20 22:57:19 +00:00
44c28c22b7
Legalize MERGE_VALUES, expand READCYCLECOUNTER correctly, so it doesn't
...
break control dependence.
llvm-svn: 24437
2005-11-20 22:56:56 +00:00
d1061ac8d1
encode rdtsc correctly
...
llvm-svn: 24435
2005-11-20 22:13:18 +00:00
6df9e11989
use chain operands to ensure the copies don't wander from the rdtsc instruction.
...
llvm-svn: 24434
2005-11-20 22:01:40 +00:00
0bf68ae434
The second patch of X86 support for read cycle counter.
...
llvm-svn: 24430
2005-11-20 21:41:10 +00:00
627cbd49b1
The first patch of X86 support for read cycle counter
...
llvm-svn: 24429
2005-11-20 21:32:07 +00:00
a8d37d748f
more progress towards bug 291 being finished. Patch by Owen Anderson,
...
HAVE_GV case fixed up by me.
llvm-svn: 24428
2005-11-20 03:45:52 +00:00
19baba67b5
Unbreak codegen of bools. This should fix the llc/jit/llc-beta failures
...
from last night.
llvm-svn: 24427
2005-11-19 18:40:42 +00:00
377bdbff91
Improve Selection DAG printer portability. Patch by Owen Anderson!
...
llvm-svn: 24425
2005-11-19 07:44:09 +00:00
d7102c4980
Teach the x86 backend about the register constraints of its addressing mode.
...
Patch by Evan Cheng
llvm-svn: 24423
2005-11-19 07:01:30 +00:00
252d88c68e
Capture more operand info, patch by Evan Cheng
...
llvm-svn: 24422
2005-11-19 07:00:10 +00:00
a22eae0163
Teach the graph viewer to handle register operands that are zero.
...
llvm-svn: 24421
2005-11-19 06:58:46 +00:00
301015a703
Silence a bogus warning
...
llvm-svn: 24420
2005-11-19 05:51:46 +00:00
3f0f71b92b
Add load and other support to the dag-dag isel. Patch contributed by Evan
...
Cheng!
llvm-svn: 24419
2005-11-19 02:11:08 +00:00
f090f7eb0e
Add some method variants, patch by Evan Cheng
...
llvm-svn: 24418
2005-11-19 01:44:53 +00:00
b2e089c31b
Teach LLVM how to scalarize packed types. Currently, this only works on
...
packed types with an element count of 1, although more generic support is
coming. This allows LLVM to turn the following code:
void %foo(<1 x float> * %a) {
entry:
%tmp1 = load <1 x float> * %a;
%tmp2 = add <1 x float> %tmp1, %tmp1
store <1 x float> %tmp2, <1 x float> *%a
ret void
}
Into:
_foo:
lfs f0, 0(r3)
fadds f0, f0, f0
stfs f0, 0(r3)
blr
llvm-svn: 24416
2005-11-19 00:36:38 +00:00
9c37f23645
Fix a crash building 176.gcc due to my recent patch, which only fixed
...
half the problem.
llvm-svn: 24414
2005-11-18 18:30:47 +00:00
6bc51c6f34
prevent latent switch creation
...
llvm-svn: 24413
2005-11-18 13:57:03 +00:00
127321b14c
Split out the shift code from visitBinary.
...
llvm-svn: 24412
2005-11-18 07:42:56 +00:00
3e9e8bd25c
Implement a refinement to the mem2reg algorithm for cases where an alloca
...
has a single def. In this case, look for uses that are dominated by the def
and attempt to rewrite them to directly use the stored value.
This speeds up mem2reg on these values and reduces the number of phi nodes
inserted. This should address PR665.
llvm-svn: 24411
2005-11-18 07:31:42 +00:00
31dc3827d3
This needs proper dominance
...
llvm-svn: 24410
2005-11-18 07:29:44 +00:00
b14c41378d
post-dom-frontiers requires proper post-dominance
...
llvm-svn: 24409
2005-11-18 07:28:26 +00:00
f519d1c6ef
This requires proper dominance
...
llvm-svn: 24408
2005-11-18 07:27:53 +00:00
57ce97862d
add more patterns, patch by Evan Cheng.
...
llvm-svn: 24406
2005-11-18 01:04:42 +00:00
227f1bdd2f
Also add the new vector value type here, for completeness.
...
llvm-svn: 24405
2005-11-18 00:53:32 +00:00
cdde9990b7
only use dyld stubs if not in ppc-static mode. This completes support for
...
non-static codegen.
llvm-svn: 24403
2005-11-17 19:40:30 +00:00
bca0be812d
This was checking the wrong GEP expression. Fixing this fixes a gccas crash
...
compiling mysql reported by Ted Kremenek.
llvm-svn: 24402
2005-11-17 19:35:42 +00:00
6ab87fa360
refactor call operand handling to eliminate special cases from printOp.
...
llvm-svn: 24401
2005-11-17 19:25:59 +00:00
bd9efdb64c
disentangle call operands from branch operands a bit
...
llvm-svn: 24400
2005-11-17 19:16:08 +00:00
3570cf456b
add an option to generate completely non-pic code, corresponding to what
...
gcc -static produces on PPC. This is used for building kexts and other things.
With this, materializing the address of a global looks like:
lis r2, ha16(L_H$non_lazy_ptr)
la r3, lo16(L_H$non_lazy_ptr)(r2)
we're still emitting stubs for functions, which is wrong. That is next.
llvm-svn: 24399
2005-11-17 18:55:48 +00:00
8f8ed28a64
Fix a bug that resistor on IRC hit where we tried to create token factor
...
nodes of load results, not of their chain results.
llvm-svn: 24398
2005-11-17 18:30:17 +00:00
5aba6ae3b3
Enable global address legalization, fixing a todo and allowing the removal
...
of some code. This exposes the implicit load from the stubs to the DAG, allowing
them to be optimized by the dag combiner. It also moves darwin specific stuff
out of the isel into the legalizer, and allows more to be moved to the .td file.
llvm-svn: 24397
2005-11-17 18:26:56 +00:00
0fe88e3f32
Teach the selector to fold lo(g) into load instruction immediate fields
...
llvm-svn: 24396
2005-11-17 18:02:16 +00:00
4b11fa284d
Generate LA and ADDIS when possible.
...
llvm-svn: 24395
2005-11-17 17:52:01 +00:00
3648c20472
Use the right accessor to create this node
...
llvm-svn: 24394
2005-11-17 17:51:38 +00:00
595088aa0f
Add an initial hack at legalizing GlobalAddress into the appropriate nodes
...
on Darwin to remove smarts from the isel. This is currently disabled by
default (uncomment setOperationAction(ISD::GlobalAddress to enable it).
tblgen needs to become smarter about tglobaladdr nodes and bigger patterns
needed to be added to the .td file. However, we can currently emit stuff like
this: :)
li r2, lo16(L_x$non_lazy_ptr)
lis r3, ha16(L_x$non_lazy_ptr)
lwzx r2, r3, r2
The obvious improvements will follow.
llvm-svn: 24390
2005-11-17 07:30:41 +00:00
840458276c
Add globaladdress and targetglobaladdress nodes for dag patterns
...
llvm-svn: 24389
2005-11-17 07:20:15 +00:00
63ed749ce0
LI could theoretically be used for the lo-part of a global address, just like
...
lis can be used for the high part.
llvm-svn: 24388
2005-11-17 07:04:43 +00:00
45ca1c0194
Allow targets to custom legalize leaf nodes like GlobalAddress.
...
llvm-svn: 24387
2005-11-17 06:41:44 +00:00
b7025749e1
When lowering direct calls, lower them to use a targetglobaladress directly
...
instead of a globaladdress. This has no effect on the generated code at all.
llvm-svn: 24386
2005-11-17 05:56:14 +00:00
4ff65ec745
Teach legalize about targetglobaladdress
...
llvm-svn: 24385
2005-11-17 05:52:24 +00:00
2bf458af92
Add patterns for some 16-bit immediate instructions, patch contributed by
...
Evan Cheng.
llvm-svn: 24384
2005-11-17 02:01:55 +00:00
5930d3df3d
Add patterns for several simple instructions that take i32 immediates.
...
Patch contributed by Evan Cheng!
llvm-svn: 24382
2005-11-16 22:59:19 +00:00
59eefd4787
who would have thought you would want to write into globals too
...
llvm-svn: 24381
2005-11-16 21:15:53 +00:00
f2b62f317c
when debugging lower dbg intrinsics to calls
...
llvm-svn: 24377
2005-11-16 07:22:30 +00:00
168fe79229
tell selectiondag when we're debugging
...
llvm-svn: 24376
2005-11-16 07:21:47 +00:00
fdc8b19ad6
indicate when a tool is a debug build.
...
llvm-svn: 24374
2005-11-16 06:36:47 +00:00
6b41edb30f
* Fix DerivedType::dropAllTypeUses to not change the number of types in a
...
type when it gets refined. This allows us to hash on this crucial value.
* Fix several issues in TypeMap::RefineAbstractType that prevent it from
handling hash values that change correctly.
* Define hashTypeStructure to not always return 0. :)
This last part (which depends on the first two) speeds up gccld time on eon
from 3.78s to 2.75s with a release build (a 28% speedup!). This resolves
PR474.
llvm-svn: 24372
2005-11-16 06:09:47 +00:00
655e7dfd0d
initial step at adding a dag-to-dag isel for X86 backend. Patch contributed
...
by Evan Cheng!
llvm-svn: 24371
2005-11-16 01:54:32 +00:00
a171f6b20c
Patch to clean up function call pseudos and support the BLA instruction,
...
which branches to an absolute address. This is required to support objc
direct dispatch.
llvm-svn: 24370
2005-11-16 00:48:01 +00:00
63985e2892
Make sure to use SwitchSection to switch sections so that we don't accidentally emit
...
functions into the .const section. Whoops.
llvm-svn: 24363
2005-11-15 01:45:01 +00:00
7c727b2736
Fix handling of multiple unnamed globals with the same type
...
llvm-svn: 24362
2005-11-15 01:32:03 +00:00
76ac068568
Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
...
contributed by Evan Cheng.
llvm-svn: 24358
2005-11-15 00:40:23 +00:00
bba9c372c1
Remove extraneous parents around constants when using a constant expr cast.
...
llvm-svn: 24357
2005-11-15 00:03:16 +00:00
1a4adc7aee
Handle globals with explicit alignment requests
...
llvm-svn: 24355
2005-11-14 19:00:30 +00:00
dd8eeed096
Teach emitAlignment to handle explicit alignment requests by globals.
...
llvm-svn: 24354
2005-11-14 19:00:06 +00:00
0aacd2ab9b
Teach the PPC asmwriter to honor globals with explicit section requests.
...
llvm-svn: 24353
2005-11-14 18:52:46 +00:00
16cbc6a177
instead of using mstats, use malloc_zone_statistics which returns numbers
...
that actually make sense.
llvm-svn: 24352
2005-11-14 07:27:56 +00:00
698fa760f4
Teach -track-memory to work on darwin. Looking at sbrk doesn't work because
...
the default allocator uses mmap.
llvm-svn: 24349
2005-11-14 07:00:29 +00:00
76034f95f6
add FP select. next up - divide!
...
llvm-svn: 24346
2005-11-14 01:17:30 +00:00
0333e68f72
Add some dummy method impls
...
llvm-svn: 24345
2005-11-13 03:26:33 +00:00
06b453b2dc
Move some methods around. Refactor the parts of TypeMap that do not depend
...
on its template arguments into a base class so that the code isn't duplicated
5 times.
llvm-svn: 24343
2005-11-13 03:14:09 +00:00
5c28b96304
Split the type refinement case completely out of the type-becomes-concrete
...
case, simplifying the code.
llvm-svn: 24340
2005-11-13 01:58:06 +00:00
54c8fcf303
unbreak the build
...
llvm-svn: 24339
2005-11-13 01:45:23 +00:00
708bb251d8
Separate the type-became-concrete case from the type-is-resolved case, the
...
former of which takes much less work than the later. This speeds up linking
eon from 3.749 to 3.637s with a release build (about 3%).
llvm-svn: 24338
2005-11-13 01:27:50 +00:00
ab72424488
enable LSR by default on alpha
...
llvm-svn: 24337
2005-11-12 19:21:08 +00:00
2ba45d1ee9
fix more regressions
...
llvm-svn: 24335
2005-11-12 19:06:28 +00:00
56526ec1a9
fix READCYCLECOUNTER
...
llvm-svn: 24334
2005-11-12 19:04:09 +00:00
026a5ef177
trivial cleanup
...
llvm-svn: 24330
2005-11-12 18:34:09 +00:00
b264c5d4dc
Fix reading LLVM 1.3 bc files.
...
llvm-svn: 24329
2005-11-12 18:31:54 +00:00
11ca4d636b
regenerate
...
llvm-svn: 24328
2005-11-12 18:22:38 +00:00
bce7ca8a73
refactor grammar to eliminate shift-reduce conflict. Move alignment checking
...
code out of all of the clients and into OptAlign/OptCAlign
llvm-svn: 24327
2005-11-12 18:21:21 +00:00
f2794fa073
Unswitch a loop, add more assertions, eliminate use of removeUserFromConcrete.
...
llvm-svn: 24324
2005-11-12 08:39:48 +00:00
11edcc19da
Tiny speedup, improve comments and code organization.
...
llvm-svn: 24323
2005-11-12 08:22:41 +00:00
8e1e6117d0
Read and write section info from/to .bc files
...
llvm-svn: 24321
2005-11-12 01:33:40 +00:00
045f096b18
Wrap long line.
...
llvm-svn: 24320
2005-11-12 01:01:50 +00:00
93b3d8f415
Fix VC++ warning that bools cannot be ORed.
...
llvm-svn: 24319
2005-11-12 00:59:39 +00:00
cf1f782a2f
Fix operator precedence bug caught by VC++.
...
llvm-svn: 24318
2005-11-12 00:59:01 +00:00
a0c20b4f8b
regenerate
...
llvm-svn: 24316
2005-11-12 00:11:49 +00:00
9da804d8e9
add a token
...
llvm-svn: 24315
2005-11-12 00:11:30 +00:00
71b936cab9
Parse section info
...
llvm-svn: 24314
2005-11-12 00:11:10 +00:00
4b96c540f6
print section info
...
llvm-svn: 24313
2005-11-12 00:10:19 +00:00
97e8207a05
fix yet more regressions
...
llvm-svn: 24308
2005-11-11 23:08:46 +00:00
fab772045e
generate chain result
...
llvm-svn: 24307
2005-11-11 23:02:55 +00:00
de1b5d6baa
added a chain output
...
llvm-svn: 24306
2005-11-11 22:48:54 +00:00
5b3b9d7052
Fix a bunch more alpha regressions
...
llvm-svn: 24304
2005-11-11 19:52:25 +00:00
5278ca3fa2
prevent cse of readcyclecounter
...
llvm-svn: 24303
2005-11-11 19:02:54 +00:00
01aa56397d
continued readcyclecounter support
...
llvm-svn: 24300
2005-11-11 16:47:30 +00:00
ecc301df17
Fix the optimized code handling of user asm strings
...
llvm-svn: 24296
2005-11-10 23:24:26 +00:00
fafff9ba1d
Make BB and CPI labels use the function number, not the function name as a
...
uniquing id. This makes things happy when the function name is quoted,
preventing labels like LBB"foo"_2.
llvm-svn: 24295
2005-11-10 21:59:25 +00:00
86164e6e9e
speedup the common case where nothing needs to be quoted
...
llvm-svn: 24294
2005-11-10 21:47:01 +00:00
e1d34bac0b
Allow per-character control over what target assemblers allow in symbol
...
names. This also changes the default to allow all of "$_." in addition
to letters and numbers as symbol names. If you don't want this, use
markCharUnacceptable to remove one of these or markCharAcceptable to add
to the set. This corresponds with what GAS accepts by default.
Also, this includes some minor speedups
llvm-svn: 24293
2005-11-10 21:40:01 +00:00
4b3b9192b2
do not allow '.' in symbol names
...
llvm-svn: 24292
2005-11-10 21:39:29 +00:00
d9c13b1336
the pain isn't gone unless the phinodes are spilled too
...
llvm-svn: 24288
2005-11-10 19:39:09 +00:00
9eb7dfa15a
Darwin supports quoted labels. This implements:
...
test/Regression/CodeGen/PowerPC/darwin-labels.ll
llvm-svn: 24287
2005-11-10 19:33:43 +00:00
4b155fa5c3
Add a new option for targets that accept quoted labels.
...
llvm-svn: 24283
2005-11-10 19:30:07 +00:00
9fa3bcc8b4
remove the M instance var
...
llvm-svn: 24281
2005-11-10 19:02:18 +00:00
369b61f068
Call this method with the object we have
...
llvm-svn: 24279
2005-11-10 18:53:25 +00:00
4f827446da
nuke blank line
...
llvm-svn: 24278
2005-11-10 18:49:46 +00:00
12b0831295
Make this more efficient of the common case where we are only mangling globals.
...
Do not mangle internal global names that do not collide with anything.
This gives us strings that now look like this:
__2E_str_1: ; '.str_1'
.asciz "foo"
instead of this:
l1__2E_str_1: ; '.str_1'
.asciz "foo"
llvm-svn: 24277
2005-11-10 18:48:58 +00:00
c0a1eba0ab
Get rid of casts by #including the right header
...
llvm-svn: 24275
2005-11-10 18:36:17 +00:00
59e44ff3d3
Make the aix asm printer interface properly with the parent class
...
llvm-svn: 24274
2005-11-10 18:20:29 +00:00
747960d21e
Compile C strings to:
...
l1__2E_str_1: ; '.str_1'
.asciz "foo"
not:
.align 0
l1__2E_str_1: ; '.str_1'
.asciz "foo"
llvm-svn: 24273
2005-11-10 18:09:27 +00:00
55a6d9067b
add support for .asciz, and enable it by default. If your target assemblerdoesn't support .asciz, just set AscizDirective to null in your asmprinter.
...
This compiles C strings to:
l1__2E_str_1: ; '.str_1'
.asciz "foo"
instead of:
l1__2E_str_1: ; '.str_1'
.ascii "foo\000"
llvm-svn: 24272
2005-11-10 18:06:33 +00:00
8e66c0c8a9
this works with backedges to the existing entry block alot better
...
llvm-svn: 24270
2005-11-10 17:35:34 +00:00
e373163e95
fix a bunch of regressions
...
llvm-svn: 24269
2005-11-10 16:59:55 +00:00
4130a4f061
The pass everyone has been waiting for!
...
Reg2Mem
for fun you can opt -reg2mem -mem2reg
llvm-svn: 24267
2005-11-10 01:58:38 +00:00
625b9c8765
Force vectors to be a power of two in size
...
llvm-svn: 24265
2005-11-10 01:42:43 +00:00
d7dbb856b9
Force packed vectors to be a power of two in length.
...
llvm-svn: 24264
2005-11-10 01:40:59 +00:00
bf4f233214
Switch the allnodes list from a vector of pointers to an ilist of nodes.This eliminates the vector, allows constant time removal of a node froma graph, and makes iteration over the all nodes list stable when adding
...
nodes to the graph.
llvm-svn: 24263
2005-11-09 23:47:37 +00:00
cd6f0f47f2
Refactor intrinsic lowering stuff out of visitCall
...
llvm-svn: 24261
2005-11-09 19:44:01 +00:00
97a7fcfd2b
whatever. Intermediate patch to see what breaks. Seems ok.
...
llvm-svn: 24260
2005-11-09 19:17:08 +00:00
af3aefa10e
Handle the trivial (but common) two-op case more efficiently
...
llvm-svn: 24259
2005-11-09 18:48:57 +00:00
619dfaa42b
Nuke noop copies.
...
llvm-svn: 24258
2005-11-09 18:22:42 +00:00
41fd6d5d27
Fix CodeGen/X86/shift-folding.ll:test3 on X86
...
llvm-svn: 24256
2005-11-09 16:50:40 +00:00
35ecaa76fa
Disable some overly-aggressive checking code. This speeds up the local
...
allocator from 23s to 11s on kc++ in debug mode.
llvm-svn: 24255
2005-11-09 05:28:45 +00:00
b7cad90e55
Avoid creating a token factor node in trivially redundant cases. This
...
eliminates almost one node per block in common cases.
llvm-svn: 24254
2005-11-09 05:03:03 +00:00
43535a19b1
Handle GEP's a bit more intelligently. Fold constant indices early and
...
turn power-of-two multiplies into shifts early to improve compile time.
llvm-svn: 24253
2005-11-09 04:45:33 +00:00
c4d6050db6
Allocate the right amount of memory for this vector up front.
...
llvm-svn: 24252
2005-11-08 23:32:44 +00:00
88fa11c3d5
Change the ValueList array for each node to be shared instead of individuallyallocated. Further, in the common case where a node has a single value, justreference an element from a small array. This is a small compile-time win.
...
llvm-svn: 24251
2005-11-08 23:30:28 +00:00
7e4b5d33cb
Switch the operandlist/valuelist from being vectors to being just an array.This saves 12 bytes from SDNode, but doesn't speed things up substantially
...
(our graphs apparently already fit within the cache on my g5). In any case
this reduces memory usage.
llvm-svn: 24249
2005-11-08 22:07:03 +00:00
3ba38cba64
Explicitly initialize some instance vars
...
llvm-svn: 24247
2005-11-08 21:54:57 +00:00
aba48dd34c
Clean up RemoveDeadNodes significantly, by eliminating the need for a temporary
...
set and eliminating the need to iterate whenever something is removed (which
can be really slow in some cases). Thx to Jim for pointing out something silly
I was getting stuck on. :)
llvm-svn: 24241
2005-11-08 18:52:27 +00:00
88e234dd49
Add a new option to indicate we want the code generator to emit code quickly,
...
not spending tons of time microoptimizing it. This is useful for an -O0
style of build.
llvm-svn: 24235
2005-11-08 02:12:47 +00:00
b28f214033
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
...
llvm-svn: 24233
2005-11-08 02:11:51 +00:00
1d2f26adcc
Let's try ignoring resource utilization on the backward pass.
...
llvm-svn: 24231
2005-11-07 19:08:53 +00:00
3c1c8c55c3
add support for storing and returning bools
...
llvm-svn: 24228
2005-11-07 03:11:02 +00:00
629ba44e50
Always compute max align.
...
llvm-svn: 24227
2005-11-06 17:43:20 +00:00
4a30d4a460
just some random hacking - calls (particularly indirect) need a lot of
...
love (especially with -sched=simple)
llvm-svn: 24225
2005-11-06 13:43:30 +00:00
3ee3e69556
Add the necessary support to the ISel to allow targets to codegen the new
...
alignment information appropriately. Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack. Support for
arbitrarily aligned dynamic allocas coming soon.
llvm-svn: 24224
2005-11-06 09:00:38 +00:00
c5455bcbd2
minor clarity changes, no functionality difference.
...
llvm-svn: 24223
2005-11-06 08:23:17 +00:00
05c64d1496
don't misencode CC#'s
...
llvm-svn: 24219
2005-11-06 07:46:13 +00:00
49d1908af1
encode/decode function alignment in bc files
...
llvm-svn: 24218
2005-11-06 07:43:39 +00:00
547f20c63e
Read/write global variable alignments if present
...
llvm-svn: 24216
2005-11-06 07:11:04 +00:00
f8a974d169
print alignment info for globals and functions
...
llvm-svn: 24212
2005-11-06 06:48:53 +00:00
840f789433
regenerate
...
llvm-svn: 24211
2005-11-06 06:46:53 +00:00
d57ed893e1
Allow globals to have an alignment specified. Switch to using isPowerOf2_32
...
at Jim's request for the checking code.
llvm-svn: 24210
2005-11-06 06:46:28 +00:00
86c352b782
regenerate
...
llvm-svn: 24208
2005-11-06 06:34:34 +00:00
c7de836a77
factor optional alignment
...
llvm-svn: 24207
2005-11-06 06:34:12 +00:00
4645db0948
ask for 16-byte aligned jmpbufs. This should unbreak C++ on IA64 (and
...
a bunch of other things) but is currently ignored by the code
generator.
llvm-svn: 24206
2005-11-06 04:29:30 +00:00
575e828aa5
Write/read allocation instruction alignment info to .bc files.
...
llvm-svn: 24203
2005-11-05 22:08:14 +00:00
79b8c79242
verify that alignments are always a power of 2
...
llvm-svn: 24200
2005-11-05 21:57:54 +00:00
b467a4fb29
regenerate
...
llvm-svn: 24199
2005-11-05 21:54:23 +00:00
6318dc5691
Verify that alignment amounts are a power of 2
...
llvm-svn: 24198
2005-11-05 21:54:03 +00:00
7aeee3aff8
fix printing the alignment directive
...
llvm-svn: 24197
2005-11-05 21:20:34 +00:00
Chris Lattner