c2254f6b98
Skip identical instruction while calculating DBG_VALUE range.
...
llvm-svn: 105340
2010-06-02 19:05:13 +00:00
2d35a9e810
Rename canCombinedSubRegIndex method to something more grammatically correct
...
and tidy up the comment describing it.
llvm-svn: 105339
2010-06-02 18:54:47 +00:00
21ccf05b4c
Use local small vector.
...
llvm-svn: 105332
2010-06-02 16:42:51 +00:00
848548300d
Not all entries in the range will have an SUnit. Check for that when looking
...
for debug information.
llvm-svn: 105324
2010-06-02 15:29:36 +00:00
c08ecba597
Remove uses of getCalleeSavedRegClasses from outside the
...
backends and removes the virtual declaration. With that out of the way
I should be able to cleanup one backend at a time.
llvm-svn: 105321
2010-06-02 12:39:06 +00:00
a2da22734f
Enable machine cse of instructions which define physical registers.
...
llvm-svn: 105308
2010-06-02 01:08:27 +00:00
f4a34b97b8
Fix an obvious mistake: don't change the operands until all of them have been
...
checked and it is safe to proceed with the changes.
llvm-svn: 105304
2010-06-02 00:16:08 +00:00
12ac8f0352
Update debug information when breaking anti-dependencies. rdar://7759363
...
llvm-svn: 105300
2010-06-01 23:48:44 +00:00
7b0ac865a4
Properly compose subregister indices when coalescing.
...
The comment about ordering of subreg indices is no longer true.
This exposed a bug in the new substVirtReg method that is also fixed.
llvm-svn: 105294
2010-06-01 22:39:25 +00:00
d43e0ca916
Ignore line number of debug value in undefined register.
...
llvm-svn: 105292
2010-06-01 21:43:09 +00:00
b0c76394a3
Keep track of incoming debug value of unused argument.
...
Radar 7927666.
llvm-svn: 105285
2010-06-01 19:59:01 +00:00
b782caa393
Fill in missing support for ISD::FEXP, ISD::FPOWI, and friends.
...
llvm-svn: 105283
2010-06-01 18:35:14 +00:00
b24d5c6ce2
Add a FIXME
...
llvm-svn: 105282
2010-06-01 18:06:35 +00:00
74d8345512
When processing function arguments when splitting live ranges across invokes,
...
handle structs passed by value via an extract/insert pair, as a bitcast
won't work on a struct. rdar://7742824
llvm-svn: 105280
2010-06-01 18:04:09 +00:00
14c46517b5
fix PR6623: when optimizing for size, don't inline memcpy/memsets
...
that are too large. This causes the freebsd bootloader to be too
large apparently.
It's unclear if this should be an -Os or -Oz thing. Thoughts welcome.
llvm-svn: 105228
2010-05-31 17:30:14 +00:00
b4a773b452
the 'limit' argument to FindOptimalMemOpLowering is unsigned, not uint64_t.
...
llvm-svn: 105226
2010-05-31 17:12:23 +00:00
a97311f152
Use `llvm::next' instead of `next' to make VC++ 2010 happy.
...
llvm-svn: 105168
2010-05-30 13:14:21 +00:00
4db93c9700
Reorder some code in SelectionDAGBuilder.
...
llvm-svn: 105105
2010-05-29 17:53:24 +00:00
d16aa541af
SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValue
...
shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set
doesn't needs its EnableFastISel argument.
llvm-svn: 105101
2010-05-29 17:03:36 +00:00
c488e92f0b
Remove unused function.
...
llvm-svn: 105100
2010-05-29 14:03:51 +00:00
707b7cc429
Remove schedule-livein-copies. It's not being used.
...
llvm-svn: 105095
2010-05-29 02:23:39 +00:00
ab6223949e
Handle composed subreg indices when processing REQ_SEQUENCE instructions.
...
llvm-svn: 105066
2010-05-29 00:14:14 +00:00
032f3261a2
Doh. Machine LICM is re-initializing the CSE map over and over. Patch by Anna Zaks. rdar://8037934.
...
llvm-svn: 105065
2010-05-29 00:06:36 +00:00
cc2efe11db
Fix some latency computation bugs: if the use is not a machine opcode do not just return zero.
...
llvm-svn: 105061
2010-05-28 23:26:21 +00:00
64824ea99f
Add a TargetRegisterInfo::composeSubRegIndices hook with a default
...
implementation that is correct for most targets. Tablegen will override where
needed.
Add MachineOperand::subst{Virt,Phys}Reg methods that correctly handle existing
subreg indices when sustituting registers.
llvm-svn: 104985
2010-05-28 18:18:53 +00:00
c1e216583f
Revert 104841, 104842, 104876 due to buildbot failures. Radar 7424645.
...
llvm-svn: 104953
2010-05-28 16:41:07 +00:00
2140a74979
Eliminate the restriction that the array size in an alloca must be i32.
...
This will help reduce the amount of casting required on 64-bit targets.
llvm-svn: 104911
2010-05-28 01:14:11 +00:00
b613ae2c89
Add a -regalloc=default option that chooses a register allocator based on the -O
...
optimization level.
This only really affects llc for now because both the llvm-gcc and clang front
ends override the default register allocator. I intend to remove that code later.
llvm-svn: 104904
2010-05-27 23:57:25 +00:00
faa3abbe39
Update the saved stack pointer in the sjlj function context following either
...
an alloca() or an llvm.stackrestore(). rdar://8031573
llvm-svn: 104900
2010-05-27 23:49:24 +00:00
c9f532dddc
back out 104862/104869. Can reuse stacksave after all. Very cool.
...
llvm-svn: 104897
2010-05-27 23:11:57 +00:00
7a9dedf0ab
Do not drop location info for inlined function args.
...
llvm-svn: 104884
2010-05-27 20:25:04 +00:00
b68dfb45f5
hook ISD::STACKADDR to an intrinsic
...
llvm-svn: 104869
2010-05-27 18:52:11 +00:00
5e6b71ce34
inlined function's arguments need a label to mark the start point because they are not directly attached to current function.
...
llvm-svn: 104848
2010-05-27 16:47:30 +00:00
8e99e50d08
Support for nested functions/classes in debug output. Radar 7424645.
...
llvm-svn: 104841
2010-05-27 16:16:54 +00:00
6b9a9fe207
Simplify. Eliminate unneeded debug_loc entry.
...
llvm-svn: 104785
2010-05-26 23:55:23 +00:00
ddee3cb163
Add FIXME comment to remove this.
...
llvm-svn: 104749
2010-05-26 21:53:50 +00:00
b33dfbcba4
MC: Add TargetMachine support for setting the value of MCRelaxAll with
...
-filetype=obj.
llvm-svn: 104747
2010-05-26 21:48:55 +00:00
acc32a5c19
There is no need to force an line number entry (using previous location) for a temp label at unknown location.
...
llvm-svn: 104740
2010-05-26 21:23:46 +00:00
27311269cb
Add "setjmp_syscall", "savectx", "qsetjmp", "vfork", "getcontext" to the list of
...
usual suspects that could "return twice".
llvm-svn: 104737
2010-05-26 20:39:00 +00:00
c98892fdaa
Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry in
...
ISD::. No functional change.
llvm-svn: 104734
2010-05-26 20:22:18 +00:00
1b08572a66
Update debug info when live-in reg is copied into a vreg.
...
llvm-svn: 104732
2010-05-26 20:18:50 +00:00
0c3bfd3fb0
Move the check for "calls setjmp" to SelectionDAGISel so that it can be used by
...
more than just the stack slot coloring algorithm.
llvm-svn: 104722
2010-05-26 19:46:12 +00:00
002d54ddc9
Identify instructions, that needs a label to mark debug info entity, in advance. This simplifies beginScope().
...
llvm-svn: 104720
2010-05-26 19:37:24 +00:00
52c2738324
Eliminate the use of PriorityQueue and just use a std::vector,
...
implementing pop with a linear search for a "best" element. The priority
queue was a neat idea, but in practice the comparison functions depend
on dynamic information.
llvm-svn: 104718
2010-05-26 18:52:00 +00:00
1e5d0b0456
Delete an unused function.
...
llvm-svn: 104716
2010-05-26 18:34:12 +00:00
95fcc96752
Remove dead code.
...
llvm-svn: 104706
2010-05-26 17:42:50 +00:00
5a5e0bc3b5
Do not construct location list backword!
...
llvm-svn: 104705
2010-05-26 17:29:32 +00:00
e805ea9e39
Temporarily revert r104655 as it's breaking the bots.
...
llvm-svn: 104664
2010-05-26 01:59:55 +00:00
7c00576a62
Change push_all to a non-virtual function and implement it in the
...
base class, since all the implementations are the same.
llvm-svn: 104659
2010-05-26 01:10:55 +00:00
3701b3928e
Trim #include.
...
llvm-svn: 104657
2010-05-26 00:55:59 +00:00
c5222d6c38
Dale and Evan suggested putting the "check for setjmp" much earlier in the
...
machine code generation. That's a good idea, so I made it so.
llvm-svn: 104655
2010-05-26 00:32:40 +00:00
9fc11706e3
First cut at supporting .debug_loc section.
...
This is used to track variable information.
llvm-svn: 104649
2010-05-25 23:40:22 +00:00
388f638511
Constify function.
...
llvm-svn: 104646
2010-05-25 22:02:22 +00:00
ce3269b815
Do one map lookup instead of two.
...
llvm-svn: 104645
2010-05-25 21:59:42 +00:00
f3925438e5
Move the verbose asm output up a bit so it can be used in the special cases
...
as well.
llvm-svn: 104642
2010-05-25 21:49:43 +00:00
b04ef0cfbc
Okay, bear with me here...
...
If you have a setjmp/longjmp situation, it's possible for stack slot coloring to
reuse a stack slot before it's really dead. For instance, if we have something
like this:
1: y = g;
x = sigsetjmp(env, 0);
switch (x) {
case 1:
/* ... */
goto run;
case 0:
run:
do_run(); /* marked as "no return" */
break;
case 3:
if (...) {
/* ... */
goto run;
}
/* ... */
break;
}
2: g = y;
"y" may be put onto the stack, so the expression "g = y" is relying upon the
fact that the stack slot containing "y" isn't modified between (1) and (2). But
it can be, because of the "no return" calls in there. A longjmp might come back
with 3, modify the stack slot, and then go to case 0. And it's perfectly
acceptable to reuse the stack slot there because there's no CFG flow from case 3
to (2).
The fix is to disable certain optimizations in these situations. Ideally, we'd
disable them for all "returns twice" functions. But we don't support that
attribute. Check for "setjmp" and "sigsetjmp" instead.
llvm-svn: 104640
2010-05-25 21:44:26 +00:00
19a4b843cc
Add support for initialized global data for darwin tls. Update comments
...
and testcases accordingly.
llvm-svn: 104635
2010-05-25 21:28:50 +00:00
1ad0d5e25b
Print symbolic SubRegIndex names on machine operands.
...
llvm-svn: 104628
2010-05-25 19:49:38 +00:00
60fe2cdc4f
Fix another variant of PR 7191. Also add a testcase
...
Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite. 8023512.
llvm-svn: 104624
2010-05-25 18:47:23 +00:00
ff384ad981
Fix PR 7191. I have been unable to create a .ll file that fails, sorry.
...
(oye, a word which should be better known to people writing tree
traversals, means grandchild.)
llvm-svn: 104619
2010-05-25 17:50:03 +00:00
adff18518a
Disable invalid coalescer assertion.
...
llvm-svn: 104574
2010-05-25 00:15:18 +00:00
0b7488e8d5
Print out the name of the function during SSC.
...
llvm-svn: 104572
2010-05-24 23:16:04 +00:00
1b79babdec
Avoid adding duplicate function live-in's.
...
llvm-svn: 104560
2010-05-24 21:33:37 +00:00
51b37e0bd8
Do not emit line number entries for unknown debug values.
...
This fixes recent regression in store.exp from gdb testsuite.
llvm-svn: 104524
2010-05-24 18:26:49 +00:00
c5327226e4
Encode the Caml frametable by following what the comment says: the number of descriptors
...
is first emitted, and StackOffsets are emitted in 16 bits.
llvm-svn: 104488
2010-05-24 12:24:11 +00:00
3ff1a06de6
MC: Add an MCLoggingStreamer, for use in debugging integrated-as mismatches.
...
llvm-svn: 104463
2010-05-23 17:44:06 +00:00
168ced94d8
Implement @llvm.returnaddress. rdar://8015977.
...
llvm-svn: 104421
2010-05-22 01:47:14 +00:00
bd9485db63
Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.
...
Followups: docs patch for the builtin and eh.sjlj.setjmp cleanup to match
longjmp.
llvm-svn: 104419
2010-05-22 01:06:18 +00:00
6fdea1bda8
Add full bss data support for darwin tls variables.
...
llvm-svn: 104414
2010-05-22 00:10:22 +00:00
4a8e6e83dc
Collect variable information during endFunction() instead of beginFunction().
...
llvm-svn: 104412
2010-05-22 00:04:14 +00:00
61438fe064
Clean up extra whitespace.
...
llvm-svn: 104410
2010-05-21 23:53:55 +00:00
53ff992dde
Make this LookAheadLimit, not the uninitialized LookAheadLeft.
...
Evan please verify!
llvm-svn: 104408
2010-05-21 23:40:03 +00:00
2c8bdead9e
Allow machine cse to cse instructions which define physical registers. Controlled by option -machine-cse-phys-defs.
...
llvm-svn: 104385
2010-05-21 21:22:19 +00:00
51d9ee3ff6
Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements
...
so that it will continue to test what it was meant to test when I commit a
separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon.
Fix a DAG combiner crash exposed by this test change.
llvm-svn: 104380
2010-05-21 21:05:32 +00:00
3858451e09
- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs
...
that are aliases of the specified register.
- Rename modifiesRegister to definesRegister since it's looking a def of the
specific register or one of its super-registers. It's not looking for def of a
sub-register or alias that could change the specified register.
- Added modifiesRegister to look for defs of aliases.
llvm-svn: 104377
2010-05-21 20:53:24 +00:00
7d7f604321
Add MachineInstr::readsWritesVirtualRegister() to determine if an instruction
...
reads or writes a register.
This takes partial redefines and undef uses into account.
Don't actually use it yet. That caused miscompiles.
llvm-svn: 104372
2010-05-21 20:02:01 +00:00
1782aae355
Simplify
...
llvm-svn: 104338
2010-05-21 18:49:09 +00:00
a81e1cab04
constify accessor.
...
llvm-svn: 104325
2010-05-21 17:47:50 +00:00
b4e1687270
Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a register is read."
...
This reverts r104322. I think it was causing miscompilations.
llvm-svn: 104323
2010-05-21 17:36:32 +00:00
8e8e090301
Use MachineInstr::readsWritesVirtualRegister to determine if a register is read.
...
This correctly handles partial redefines and undef uses.
llvm-svn: 104322
2010-05-21 16:42:30 +00:00
a648c6a757
Teach VirtRegRewriter to handle spilling in instructions that have multiple
...
definitions of the virtual register.
This happens when spilling the registers produced by REG_SEQUENCE:
%reg1047:5<def>, %reg1047:6<def>, %reg1047:7<def> = VLD3d8 %reg1033, 0, pred:14, pred:%reg0
The rewriter would spill the register multiple times, dead store elimination
tried to keep up, but ended up cutting the branch it was sitting on.
llvm-svn: 104321
2010-05-21 16:36:13 +00:00
1f3801062d
If the first definition of a virtual register is a partial redef, add an
...
<imp-def> operand for the full register. This ensures that the full physical
register is marked live after register allocation.
llvm-svn: 104320
2010-05-21 16:32:16 +00:00
725211e948
Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid.
...
llvm-svn: 104306
2010-05-21 00:42:32 +00:00
fbd6c45e06
Simplify.
...
llvm-svn: 104302
2010-05-21 00:10:20 +00:00
4401f8873c
Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.
...
llvm-svn: 104293
2010-05-20 23:26:43 +00:00
490c8ab76d
Refactor.
...
llvm-svn: 104265
2010-05-20 19:57:06 +00:00
63d4f68df4
Remove dbg_value workaround and associated command line option
...
llvm-svn: 104254
2010-05-20 18:34:01 +00:00
e1c53f29d3
Split DbgVariable. Eventually, variable info will be communicated through frame index, or DBG_VALUE instruction, or collection of DBG_VALUE instructions. Plus each DbgVariable may not need a label.
...
llvm-svn: 104233
2010-05-20 16:36:41 +00:00
bdd062dae0
Add a hybrid bottom up scheduler that reduce register usage while avoiding
...
pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot
of long latency instructions so a strict register pressure reduction
scheduler does not work well.
Early experiments show this speeds up some NEON loops by over 30%.
llvm-svn: 104216
2010-05-20 06:13:19 +00:00
c53cc4f8bf
Fix typo in comment.
...
llvm-svn: 104209
2010-05-20 03:30:09 +00:00
27e7ffc7d4
Partial code for emitting thread local bss data.
...
llvm-svn: 104197
2010-05-20 00:49:07 +00:00
42603958fb
Optimize away insertelement of an undef value. This shows up in
...
test/Codegen/ARM/reg_sequence.ll but it doesn't affect the generated code
because the coalescer cleans it up. Radar 7998853.
llvm-svn: 104185
2010-05-19 23:42:58 +00:00
f98511473e
Enable preserving debug information through post-RA scheduling
...
llvm-svn: 104175
2010-05-19 22:57:47 +00:00
604560c5fe
Fix the post-RA instruction scheduler to handle instructions referenced by
...
more than one dbg_value instruction. rdar://7759363
llvm-svn: 104174
2010-05-19 22:57:06 +00:00
70e506e18a
Code clean up.
...
llvm-svn: 104173
2010-05-19 22:42:23 +00:00
a08130864e
Revert r104165.
...
llvm-svn: 104172
2010-05-19 21:58:28 +00:00
e0eddb21f5
Add support for partial redefs to the fast register allocator.
...
A partial redef now triggers a reload if required. Also don't add
<imp-def,dead> operands for physical superregisters.
Kill flags are still treated as full register kills, and <imp-use,kill> operands
are added for physical superregisters as before.
llvm-svn: 104167
2010-05-19 21:36:05 +00:00
0fe341e2e2
There is no need to maintain InsnsBeginScopeSet separately.
...
llvm-svn: 104165
2010-05-19 21:26:53 +00:00
5d4c134a94
Add MachineInstr::readsVirtualRegister() in preparation for proper handling of
...
partial redefines.
We are going to treat a partial redefine of a virtual register as a
read-modify-write:
%reg1024:6 = OP
Unless the register is fully clobbered:
%reg1024:6 = OP, %reg1024<imp-def>
MachineInstr::readsVirtualRegister() knows the difference. The first case is a
read, the second isn't.
llvm-svn: 104149
2010-05-19 20:36:22 +00:00
738e920edf
Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.
...
llvm-svn: 104147
2010-05-19 20:19:50 +00:00
e11cdf8cc8
TwoAddressInstructionPass doesn't really know how to merge live intervals when
...
lowering REG_SEQUENCE instructions.
Insert copies for REG_SEQUENCE sources not killed to avoid breaking later passes.
llvm-svn: 104146
2010-05-19 20:08:00 +00:00
6a1bfd282b
When expanding a vector_shuffle, the element type may not be legal and may
...
need to be promoted. The BUILD_VECTOR and EXTRACT_VECTOR_ELT nodes generated
here already allow the promoted type to be used without further changes, so
just do the promotion. This fixes part of pr7167.
llvm-svn: 104141
2010-05-19 18:48:32 +00:00
abd0ad54a4
Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction.
...
The trouble arises when the result of a vector cmp + sext is then and'ed with all ones. Instcombine will turn it into a vector cmp + zext, dag combiner will miss turning it into a vsetcc and hell breaks loose after that.
Teach dag combine to turn a vector cpm + zest into a vsetcc + and 1. This fixes rdar://7923010.
llvm-svn: 104094
2010-05-19 01:08:17 +00:00
055c01d9dc
Fix a crash when debugging the coalescer. DebugValue instructions are not
...
in the coalescer's instruction map.
llvm-svn: 104086
2010-05-18 23:19:42 +00:00
430b6e40ab
Remember to update VirtRegLastUse when spilling without killing before a call.
...
llvm-svn: 104074
2010-05-18 22:20:09 +00:00
f19384d54a
Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649
...
llvm-svn: 104060
2010-05-18 21:31:17 +00:00
663543b4d7
Properly handle multiple definitions of a virtual register in the same
...
instruction.
This can happen on ARM:
>> %reg1035:5<def>, %reg1035:6<def> = VLD1q16 %reg1028, 0, pred:14, pred:%reg0
Regs: Q0=%reg1032* R0=%reg1028* R1=%reg1029* R2 R3=%reg1031*
Killing last use: %reg1028
Allocating %reg1035 from QPR
Assigning %reg1035 to Q1
<< %D2<def>, %D3<def> = VLD1q16 %R0<kill>, 0, pred:14, pred:%reg0, %Q1<imp-def>
llvm-svn: 104056
2010-05-18 21:10:50 +00:00
45b3f702ab
Continuously refine the register class of REG_SEQUENCE def with all the source registers and sub-register indices.
...
llvm-svn: 104051
2010-05-18 20:07:47 +00:00
e7fc64a5c9
Fix PR7162: Use source register classes and sub-indices to determine the correct register class of the definitions of REG_SEQUENCE.
...
llvm-svn: 104050
2010-05-18 20:03:28 +00:00
4843178d6b
Teach the machine code verifier to use getSubRegisterRegClass().
...
The old approach was wrong. It had an off-by-one error.
llvm-svn: 104034
2010-05-18 17:31:12 +00:00
62bc96a1a5
llc (et al): Add support for --show-encoding and --show-inst.
...
llvm-svn: 104029
2010-05-18 17:22:19 +00:00
48f0de96d6
FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)).
...
llvm-svn: 104004
2010-05-18 00:03:40 +00:00
1e4f55200d
Fix PR7175. Insert copies of a REG_SEQUENCE source if it is used by other REG_SEQUENCE instructions.
...
llvm-svn: 103994
2010-05-17 23:24:12 +00:00
02d3368831
- Set the "HasCalls" flag after instruction selection is finished.
...
- Change the logic DisableFramePointerElim() to check for the
-disable-non-leaf-fp-elim before -disable-fp-elim.
llvm-svn: 103990
2010-05-17 23:09:50 +00:00
9635b3da6b
More data/parsing support for tls directives. Add a few more testcases
...
and cleanup comments as well.
llvm-svn: 103985
2010-05-17 22:53:55 +00:00
f2c9a96f3c
Fix PR7156. If the sources of a REG_SEQUENCE are all IMPLICIT_DEF's. Replace it with an IMPLICIT_DEF rather than deleting it or else it would be left without a def.
...
llvm-svn: 103984
2010-05-17 22:09:49 +00:00
585792738b
Pull the UsedInInstr.test() calls into calcSpillCost() and remember aliases.
...
This fixes the miscompilations of MultiSource/Applications/JM/l{en,de}cod.
Clang now successfully self hosts in a debug build with the fast register allocator.
llvm-svn: 103975
2010-05-17 21:02:08 +00:00
bf79238599
Add some section and constant support for darwin TLS.
...
llvm-svn: 103974
2010-05-17 21:02:07 +00:00
29c463862e
Careful with reg_sequence coalescing to not to overwrite sub-register indices.
...
llvm-svn: 103971
2010-05-17 20:57:12 +00:00
70563bbba5
Remove debug option. Add comment on spill order determinism.
...
llvm-svn: 103961
2010-05-17 20:01:22 +00:00
176a9c4272
Avoid allocating the same physreg to multiple virtregs in one instruction.
...
While that approach works wonders for register pressure, it tends to break
everything.
This should unbreak the arm-linux builder and fix a number of miscompilations.
llvm-svn: 103946
2010-05-17 17:18:59 +00:00
f5e8c86424
Minor optimizations. DenseMap::begin() is surprisingly slow on an empty map.
...
llvm-svn: 103940
2010-05-17 15:30:37 +00:00
6649cdaa23
Extract spill cost calculation to a new method, and use definePhysReg() to clear
...
out aliases when allocating. Clean up allocVirtReg().
Use calcSpillCost() to allow more aggressive hinting. Now the hint is always
taken unless blocked by a reserved register. This leads to more coalescing,
lower register pressure, and less spilling.
llvm-svn: 103939
2010-05-17 15:30:32 +00:00
188855abef
Remove unused member variable.
...
llvm-svn: 103936
2010-05-17 09:47:55 +00:00
7d22a81b61
Only use clairvoyance when defining a register, and then only if it has one use.
...
This makes allocation independent on the ordering of use-def chains.
llvm-svn: 103935
2010-05-17 04:50:57 +00:00
f915d14955
Eliminate a hash table probe when killing virtual registers.
...
llvm-svn: 103934
2010-05-17 03:26:09 +00:00
edd3d9db13
Execute virtreg kills immediately instead of after processing all uses.
...
This is safe to do because the physreg has been marked UsedInInstr and the kill flag will be set on the last operand using the virtreg if there are more then one.
llvm-svn: 103933
2010-05-17 03:26:06 +00:00
e07a408afc
Sprinkle superregister <imp-def> and <imp-kill> operands when dealing with subregister indices.
...
llvm-svn: 103931
2010-05-17 02:49:21 +00:00
1069a09691
Now that we don't keep live registers across calls, there is not reason to go
...
through the very long list of call-clobbered registers. We just assume all
registers are clobbered.
llvm-svn: 103930
2010-05-17 02:49:18 +00:00
397068de06
Boldly attempt consistent capitalization. Functional changes unintended.
...
llvm-svn: 103929
2010-05-17 02:49:15 +00:00
8044c989d1
Spill and kill all virtual registers across a call.
...
Debug code doesn't use callee saved registers anyway, and the code is simpler this way. Now spillVirtReg always kills, and the isKill parameter is not needed.
llvm-svn: 103927
2010-05-17 02:07:32 +00:00
d2ef1fbc82
Reduce hashtable probes by using DenseMap::insert() for lookup.
...
llvm-svn: 103926
2010-05-17 02:07:29 +00:00
fb43e065a4
Make MBB a class member instead of passing it around everywhere.
...
llvm-svn: 103925
2010-05-17 02:07:22 +00:00
166a7993ba
Yes, if the redef is a copy, update the old val# with the copy. But make sure to clear the copy field if the redef is not a copy.
...
llvm-svn: 103922
2010-05-17 01:47:47 +00:00
3a366a88f2
Fix uint64->{float, double} conversion to do rounding correctly in 32-bit.
...
The implementation in LegalizeIntegerTypes to handle this as
sint64->float + appropriate power of 2 is subject to double rounding,
considered incorrect by numerics people. Use this implementation only
when it is safe. This leads to using library calls in some cases
that produced inline code before, but it's correct now.
(EVTToAPFloatSemantics belongs somewhere else, any suggestions?)
Add a correctly rounding (though not particularly fast) conversion
that uses X87 80-bit computations for x86-32.
7885399, 5901940. This shows up in gcc.c-torture/execute/ieee/rbug.c
in the gcc testsuite on some platforms.
llvm-svn: 103883
2010-05-15 18:51:12 +00:00
bb4656c05e
Improve assertion messages.
...
llvm-svn: 103882
2010-05-15 18:38:02 +00:00
93cd0f1c89
improve portability to systems that don't have powf/modf (e.g. solaris 9)
...
patch by Evzen Muller!
llvm-svn: 103876
2010-05-15 17:10:24 +00:00
75142e6bfc
Fix an GCC warning that seems to have actually caught a bug (!!!) in
...
a condition's grouping. Every other use of Allocatable.test(Hint) groups it the
same way as it is indented, so move the parentheses to agree with that
grouping.
llvm-svn: 103869
2010-05-15 10:23:23 +00:00
84ce290822
Calculate liveness on the fly for local registers.
...
When working top-down in a basic block, substituting physregs for virtregs, the use-def chains are kept up to date. That means we can recognize a virtreg kill by the use-def chain becoming empty.
This makes the fast allocator independent of incoming kill flags.
llvm-svn: 103866
2010-05-15 06:09:08 +00:00
e26e56e72b
A partial re-def instruction may be a copy.
...
llvm-svn: 103850
2010-05-15 01:35:44 +00:00
8c2d062ea6
Teach two-address pass to do some coalescing while eliminating REG_SEQUENCE
...
instructions.
e.g.
%reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0
%reg1027<def> = EXTRACT_SUBREG %reg1026, 6
%reg1028<def> = EXTRACT_SUBREG %reg1026<kill>, 5
...
%reg1029<def> = REG_SEQUENCE %reg1028<kill>, 5, %reg1027<kill>, 6, %reg1028, 7, %reg1027, 8, %reg1028, 9, %reg1027, 10, %reg1030<kill>, 11, %reg1032<kill>, 12
After REG_SEQUENCE is eliminated, we are left with:
%reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0
%reg1029:6<def> = EXTRACT_SUBREG %reg1026, 6
%reg1029:5<def> = EXTRACT_SUBREG %reg1026<kill>, 5
The regular coalescer will not be able to coalesce reg1026 and reg1029 because it doesn't
know how to combine sub-register indices 5 and 6. Now 2-address pass will consult the
target whether sub-registers 5 and 6 of reg1026 can be combined to into a larger
sub-register (or combined to be reg1026 itself as is the case here). If it is possible,
it will be able to replace references of reg1026 with reg1029 + the larger sub-register
index.
llvm-svn: 103835
2010-05-14 23:21:14 +00:00
88fb253562
Fast ISel trivially coalesces away no-op casts, so check for this when
...
setting kill flags.
llvm-svn: 103832
2010-05-14 22:53:18 +00:00
089e9421d2
Don't bother spilling before a return
...
llvm-svn: 103831
2010-05-14 22:40:43 +00:00
cdef6bc8de
RegAllocLocal can count copies too
...
llvm-svn: 103830
2010-05-14 22:40:40 +00:00
b16013936b
Track allocatable instead of reserved regs, and never take an unallocatable hint.
...
llvm-svn: 103828
2010-05-14 22:02:56 +00:00
2f277c866d
Don't set kill flags for instructions which the scheduler has cloned.
...
llvm-svn: 103827
2010-05-14 22:01:14 +00:00
e68b814c8c
Avoid scanning the long tail of physreg operands on calls
...
llvm-svn: 103823
2010-05-14 21:55:52 +00:00
36debf8046
Do not forget to mark prcessed arguments.
...
llvm-svn: 103822
2010-05-14 21:55:50 +00:00
6c038e33e9
Count coalesced copies
...
llvm-svn: 103821
2010-05-14 21:55:50 +00:00
33af4fcdea
Allow virtreg redefines when verifying for RegAllocFast
...
llvm-svn: 103820
2010-05-14 21:55:44 +00:00
866b74ba8b
Remove trailing whitespace
...
llvm-svn: 103807
2010-05-14 21:20:46 +00:00
d772bdeb7e
80 column and trailing whitespace cleanup
...
llvm-svn: 103806
2010-05-14 21:19:48 +00:00
25749ad5c2
add cmd line option to leave dbgvalues in during post-RA sceduling. Useful
...
while debugging what's mishandled about them in the post-RA pass.
llvm-svn: 103805
2010-05-14 21:18:04 +00:00
95f6ebcb37
Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
...
the variable actually tracks.
N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.
llvm-svn: 103802
2010-05-14 21:14:32 +00:00
e0a94bfe9f
Add support to preserve type info for the variables that are removed by the optimizer.
...
llvm-svn: 103798
2010-05-14 21:01:35 +00:00
670492c8ee
When verifying two-address instructions, check the following:
...
- Kill is implicit when use and def registers are identical.
- Only virtual registers can differ.
Add a -verify-fast-regalloc to run the verifier before the fast allocator.
llvm-svn: 103797
2010-05-14 20:28:32 +00:00
4d5c1061e3
Simplify the handling of physreg defs and uses in RegAllocFast.
...
This adds extra security against using clobbered physregs, and it adds kill
markers to physreg uses.
llvm-svn: 103784
2010-05-14 18:03:25 +00:00
148e876ac2
XFAIL the test I added with vg_leak, apparently it is the first and only llc
...
-filetype=obj test, and -filetype=obj leaks a few objects. Added a FIXME, we
need to sort out the ownership model for the various MC objects.
llvm-svn: 103769
2010-05-14 07:47:51 +00:00
3439ed6324
Inline Asm: Ensure buffer is newline terminated to match how the text is printed.
...
- This is a hack, but I can't decide the best place to handle this. Chris?
llvm-svn: 103765
2010-05-14 04:31:50 +00:00
ceb5a7ada2
Enable opportunistic coalescing
...
llvm-svn: 103764
2010-05-14 04:30:51 +00:00
68c235bd4d
Trust kill flags from isel and later passes.
...
llvm-svn: 103748
2010-05-14 00:02:23 +00:00
41f8dc897e
Fix an embarrassing runtime regression for RegAllocFast.
...
This loop is quadratic in the capacity for a DenseMap:
while(!map.empty())
map.erase(map.begin());
Instead we now do a normal begin() - end() iteration followed by map.clear().
That also has the nice sideeffect of shrinking the map capacity on demand.
llvm-svn: 103747
2010-05-14 00:02:20 +00:00
1ae94b9394
Implement a correct ui64->f32 conversion. The old
...
one was subject to double rounding in extreme cases.
llvm-svn: 103744
2010-05-13 23:50:42 +00:00
d74a564feb
Clean up RegAllocFast debug output
...
llvm-svn: 103739
2010-05-13 20:43:17 +00:00
c90f51c00b
Teach MachineLICM and MachineSink how to clear kill flags conservatively
...
when they move instructions.
llvm-svn: 103737
2010-05-13 20:34:42 +00:00
7767d2747b
Add a utility function for conservatively clearing kill flags, and make
...
use of it in MachineCSE.
llvm-svn: 103726
2010-05-13 19:24:00 +00:00
5b510c1474
An Instruction has a trivial kill only if its use is in the same
...
basic block.
llvm-svn: 103725
2010-05-13 19:19:32 +00:00
0ba2e2a568
Take allocation hints from copy instructions to/from physregs.
...
This causes way more identity copies to be generated, ripe for coalescing.
llvm-svn: 103686
2010-05-13 00:19:43 +00:00
680b74941f
More asserts around physreg uses
...
llvm-svn: 103685
2010-05-13 00:19:39 +00:00
4aab8b5425
If REG_SEQUENCE source is livein, copy it first. Also, update livevariables information when a copy is introduced.
...
llvm-svn: 103680
2010-05-13 00:00:35 +00:00
ecf0166012
Do not attempt copy coalescing if the source and dest sub-register indices do not match.
...
llvm-svn: 103679
2010-05-12 23:59:42 +00:00
955a0e71e9
Make sure to add kill flags to the last use of a virtreg when it is redefined.
...
The X86 floating point stack pass and others depend on good kill flags.
llvm-svn: 103635
2010-05-12 18:46:03 +00:00
2576db727b
Remove unused variable. Tweak a comment while there.
...
llvm-svn: 103586
2010-05-12 07:11:33 +00:00
76a07580ad
updated support for the COFF .linkonce
...
Now, the .linkonce directive is emitted as part of MCSectionCOFF::PrintSwitchToSection instead of AsmPrinter::EmitLinkage since it is an attribute of the section the symbol was placed into not the symbol itself.
llvm-svn: 103568
2010-05-12 04:26:09 +00:00
d593448643
Teach local regalloc about virtual registers with sub-indices.
...
llvm-svn: 103539
2010-05-12 01:29:36 +00:00
0c6ebc7d95
Code clean up.
...
llvm-svn: 103538
2010-05-12 01:27:49 +00:00
f98a355f9b
Avoid scoping issues, fix buildbots
...
llvm-svn: 103530
2010-05-12 00:11:19 +00:00
1a1b51ff59
Add initial kill flag support to FastISel.
...
llvm-svn: 103529
2010-05-11 23:54:07 +00:00
69b8f42400
Make Clang happy.
...
llvm-svn: 103528
2010-05-11 23:53:13 +00:00
11f1ba1535
Store the Dirty bit in the LiveReg structure instead of a bit vector.
...
llvm-svn: 103522
2010-05-11 23:24:47 +00:00
132668102e
Keep track of the last place a live virtreg was used.
...
This allows us to add accurate kill markers, something the scavenger likes.
Add some more tests from ARM that needed this.
llvm-svn: 103521
2010-05-11 23:24:45 +00:00
afd2b8bbb7
Don't set kill flags on uses of CopyFromReg nodes. InstrEmitter doesn't
...
create separate virtual registers for CopyFromReg values, so uses of
them don't necessarily kill the value.
llvm-svn: 103519
2010-05-11 21:59:14 +00:00
f25be99109
Silence warning
...
llvm-svn: 103508
2010-05-11 20:51:04 +00:00
3f0241e0f9
Simplify the tracking of used physregs to a bulk bitor followed by a transitive
...
closure after allocating all blocks.
Add a few more test cases for -regalloc=fast.
llvm-svn: 103500
2010-05-11 20:30:28 +00:00
6c5e4355bb
I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it
...
to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is
the opposite, for future use by dragonegg.
llvm-svn: 103495
2010-05-11 20:16:09 +00:00
9132c59d43
Trim #includes and forward declarations.
...
llvm-svn: 103489
2010-05-11 19:11:43 +00:00
f1b3029a54
Mostly rewrite RegAllocFast.
...
Sorry for the big change. The path leading up to this patch had some TableGen
changes that I didn't want to commit before I knew they were useful. They
weren't, and this version does not need them.
The fast register allocator now does no liveness calculations. Instead it relies
on kill flags provided by isel. (Currently those kill flags are also ignored due
to isel bugs). The allocation algorithm is supposed to work with any subset of
valid kill flags. More kill flags simply means fewer spills inserted.
Registers are allocated from a working set that contains no aliases. That means
most allocations can be done directly without expensive alias checks. When the
working set runs out of registers we do the full alias check to find new free
registers.
llvm-svn: 103488
2010-05-11 18:54:45 +00:00
bb919dfb6b
Implement a bunch more TargetSelectionDAGInfo infrastructure.
...
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
llvm-svn: 103481
2010-05-11 17:31:57 +00:00
6739a89117
Fixes for Microsoft Visual Studio 2010, from Steven Watanabe!
...
llvm-svn: 103457
2010-05-11 06:17:44 +00:00
1ef0660836
It's not safe eliminate copies where src and dst have different sub-register indices.
...
llvm-svn: 103450
2010-05-11 00:20:03 +00:00
b58b6f9a85
Ensure REG_SEQUENCE source operands are unique.
...
llvm-svn: 103449
2010-05-11 00:04:31 +00:00
ffb9f18dfe
Indentation.
...
llvm-svn: 103441
2010-05-10 23:08:19 +00:00
1a0df9a80e
Enable multiple Compile Units in one module.
...
This means now 'llvm-ld a.bc b.bc' will preserve debug info appropriately.
llvm-svn: 103439
2010-05-10 22:49:55 +00:00
d6908dc4a2
It's not safe to propagate implicit_def that defines part of a register.
...
llvm-svn: 103436
2010-05-10 21:25:30 +00:00
9d55b23425
Clear RegSequences vector after eliminating REG_SEQUENCE instructions.
...
llvm-svn: 103435
2010-05-10 21:24:55 +00:00
02947a4551
Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869.
...
llvm-svn: 103419
2010-05-10 19:03:57 +00:00
faef5d0281
Re-defined valno is always valno even for partial re-def's.
...
llvm-svn: 103410
2010-05-10 17:33:49 +00:00
01fcdaa7f5
Fix PR7096. When a block containing multiple defs is tail duplicated, the
...
SSAUpdater for the value from the first def may see uses of undefined values,
because the later defs will not have been updated yet.
llvm-svn: 103407
2010-05-10 17:14:26 +00:00
e4d6670f6b
Add an assertion to catch attempts to access off the end of the array.
...
Based on a patch by Javier Martinez.
llvm-svn: 103391
2010-05-10 04:54:28 +00:00
0625af2a88
Instead of just verifying compile unit, verify entire type, variable, namespace etc..
...
llvm-svn: 103327
2010-05-07 23:33:41 +00:00
cbe7a8508a
Remove DIGlobal.
...
llvm-svn: 103325
2010-05-07 23:19:07 +00:00
7de01ec2c9
SDDbgValues are apparently not being legalized. Fix a symptom of the problem,
...
and not the real problem itself, by dropping debug info for i128 values.
rdar://7958162.
llvm-svn: 103310
2010-05-07 22:19:08 +00:00
2ae3397536
Verify variable directly.
...
llvm-svn: 103305
2010-05-07 22:04:20 +00:00
028449325b
add COFF support for COMDAT sections, patch by Nathan Jeffords!
...
llvm-svn: 103304
2010-05-07 21:49:09 +00:00
8d6a2b7428
Verify entire type descriptor not just tag.
...
llvm-svn: 103303
2010-05-07 21:45:47 +00:00
51c1695a0a
Fix PR 7087, and probably other things, by extending
...
getConstantFP to accept the two supported long double
target types. This was not the original intent, but
there are other places that assume this works and it's
easy enough to do.
llvm-svn: 103299
2010-05-07 21:35:53 +00:00
32cc43c242
Wrap const MDNode * inside DIDescriptor.
...
llvm-svn: 103295
2010-05-07 20:54:48 +00:00
cfa8e9d45f
Avoid DIDescriptor::getNode(). Use overloaded operators instead.
...
llvm-svn: 103272
2010-05-07 18:11:54 +00:00
87cffa9498
switch MCSectionCOFF from a syntactic to semantic representation,
...
patch by Peter Housel!
llvm-svn: 103267
2010-05-07 17:17:41 +00:00
45f530db39
Revert r103133 and add testcase from PR7066.
...
llvm-svn: 103233
2010-05-07 01:45:38 +00:00
e6d40166a8
Transfer debug location information from PHI nodes to resulting
...
lowered copies.
llvm-svn: 103228
2010-05-07 01:10:20 +00:00
e7dff14d5d
Print debug information for SDNodes.
...
llvm-svn: 103227
2010-05-07 01:09:21 +00:00
7421ae48bf
Disable the new unknown-location code for now. It causes a major
...
increase in the debug line info section, and it's causing
regressions in a gdb testsuite.
llvm-svn: 103226
2010-05-07 01:08:53 +00:00
779c69bbc5
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
...
doesn't have to guess.
llvm-svn: 103194
2010-05-06 20:33:48 +00:00
efb126a665
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
...
llvm-svn: 103193
2010-05-06 19:06:44 +00:00
f0ac19a6d5
80 col violation.
...
llvm-svn: 103185
2010-05-06 16:33:12 +00:00
c0255bac1d
Fixes a coalescer bug that caused llc to crash on 2009-11-30-LiveVariablesBug.ll
...
with the fix in 103157.
%reg1039:1<def> = VMOVS %S1<kill>, pred:14, pred:%reg0
is not coalescable since none of the super-registers of S1 are in reg1039's
register class: DPR_VFP2. But it is still a legal copy instruction so it should
not assert.
llvm-svn: 103170
2010-05-06 06:23:31 +00:00
47d04e3e41
Update LabelsBeforeInsn also, when creating unknown-position labels.
...
llvm-svn: 103145
2010-05-06 00:29:41 +00:00
35096e82c5
Fix PR7054 - Assertion `Symbol->isUndefined() && "Cannot define a symbol twice!"' failed.
...
Users can write broken code that emits the same label twice with asm renaming,
detect this and emit a fatal backend error instead of aborting.
llvm-svn: 103140
2010-05-06 00:05:37 +00:00
a7c717d8d4
In bottom-up mode, defer the materialization of local constant values.
...
llvm-svn: 103139
2010-05-06 00:02:14 +00:00
ffcb590b0f
Add an "IsBottomUp" member function to FastISel, which will be used to
...
support a new bottom-up mode.
llvm-svn: 103138
2010-05-05 23:58:35 +00:00
50849c63e4
Emit debug info for MachineInstrs with unknown debug locations, instead
...
of just letting them inherit the debug locations of adjacent instructions.
Debug info should aim to be either accurate or absent.
llvm-svn: 103135
2010-05-05 23:41:32 +00:00
1b6f698e85
Fix PR6520. An earlyclobber physreg must not be allocated to anything else.
...
llvm-svn: 103133
2010-05-05 23:07:41 +00:00
92b21cad5d
Use getValue() for PHINodes when direct NodeMap access does not work.
...
llvm-svn: 103126
2010-05-05 22:29:00 +00:00
4b6abd8c2b
Move REG_SEQUENCE removal to 2addr pass.
...
llvm-svn: 103109
2010-05-05 18:45:40 +00:00
38d9a6f805
Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g.
...
80 %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0
. . .
120 %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0
llvm-svn: 103102
2010-05-05 18:27:40 +00:00
d1b38e317d
Combine the implementations of the core part of the SSAUpdater and
...
MachineSSAUpdater to avoid duplicating all the code.
llvm-svn: 103060
2010-05-04 23:18:19 +00:00
4c908f4181
Teach PHI elimination to remove REG_SEQUENCE instructions and update references of the source operands with references of the destination with subreg indices. e.g.
...
%reg1029<def>, %reg1030<def> = VLD1q16 %reg1024<kill>, ...
%reg1031<def> = REG_SEQUENCE %reg1029<kill>, 5, %reg1030<kill>, 6
=>
%reg1031:5<def>, %reg1031:6<def> = VLD1q16 %reg1024<kill>, ...
PHI elimination now does more than phi elimination. It is really a de-SSA pass.
llvm-svn: 103039
2010-05-04 20:26:52 +00:00
a5c0cc329e
Rename variables for consistency.
...
llvm-svn: 103013
2010-05-04 17:12:26 +00:00
075e9b5d66
Set DW_AT_APPLE_omit_frame_ptr in endFunction() where MachineFunction is available all the time.
...
llvm-svn: 103001
2010-05-04 06:15:30 +00:00
55869af998
Instruction selection optimizations may have moved the def of a function argument out of the entry block. rdar://7937489
...
llvm-svn: 102993
2010-05-04 00:58:39 +00:00
f869d9adf2
Teach scheduler about REG_SEQUENCE.
...
llvm-svn: 102984
2010-05-04 00:22:40 +00:00
0e79c864c3
Re-enable isel kill flags, now that the local allocator is ignoring them.
...
llvm-svn: 102981
2010-05-04 00:12:15 +00:00
b944b39887
Remove preexisting kill flags in RegAllocLocal, just like LiveVariables does.
...
This should make it possible to start producing kill flags in isel without
breaking stuff.
llvm-svn: 102976
2010-05-03 23:49:20 +00:00
626b5d8e0c
Factor out FastISel's code for materializing constants and other values
...
in registers into a separate function to de-couple it from the
top-down-specific logic in getRegForValue.
llvm-svn: 102975
2010-05-03 23:36:34 +00:00
f4e4e84115
Check that subregisters don't have independent values in RemoveCopyByCommutingDef().
...
This fixes PR6941.
llvm-svn: 102970
2010-05-03 22:40:32 +00:00
1e679cbfff
Reword a comment slightly.
...
llvm-svn: 102966
2010-05-03 22:18:49 +00:00
c936b56871
Print basic block numbers in live interval debug output. Since the rest of the
...
debug output is showing machine instructions, the IR-level basic block names
aren't very meaningful, and because multiple machine basic blocks may be
derived from one IR-level BB, they're also not unique.
llvm-svn: 102960
2010-05-03 21:38:11 +00:00
2ad68de4aa
Fix a bug which prevented tail merging of return instructions in
...
beneficial cases. See the changes in test/CodeGen/X86/tail-opts.ll and
test/CodeGen/ARM/ifcvt2.ll for details.
The fix is to change HashEndOfMBB to hash at most one instruction,
instead of trying to apply heuristics about when it will be profitable to
consider more than one instruction. The regular tail-merging heuristics
are already prepared to handle the same cases, and they're more precise.
Also, make test/CodeGen/ARM/ifcvt5.ll and
test/CodeGen/Thumb2/thumb2-branch.ll slightly more complex so that they
continue to test what they're intended to test.
And, this eliminates the problem in
test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll, the testcase from
PR5204. Update it accordingly.
llvm-svn: 102907
2010-05-03 14:35:47 +00:00
1ebb395cee
Don't count debug info as instructions. This was
...
preventing the emission of the NOP on Darwin for a
function with no actual code. From timberwolfmc
with TEST=optllcdbg.
llvm-svn: 102843
2010-05-01 16:41:11 +00:00
737718d4f4
Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),
...
when needed. This fixes PR7001
llvm-svn: 102838
2010-05-01 12:52:34 +00:00
ec74444d3e
Remove the code for special-casing byval for fast-isel. SelectionDAG
...
handles argument lowering anyway, so there's no need for special
casing here.
llvm-svn: 102828
2010-05-01 02:44:23 +00:00
4959cf19b2
Re-disable kill flags, as there is more trouble.
...
llvm-svn: 102826
2010-05-01 01:57:56 +00:00
77ef6f6a17
Re-enable kill flags from SelectionDAGISel, with a fix: don't
...
try to put a kill flag on a DBG_INFO instruction.
llvm-svn: 102820
2010-05-01 00:50:53 +00:00
3dca8f3da3
Fix a bug where debug info affected stack slot coloring.
...
Seen in SingleSrc/Benchmarks/Misc/flops with TEST=optllcdbg.
7929951.
llvm-svn: 102819
2010-05-01 00:41:15 +00:00
096619eb52
Fix whitespace.
...
llvm-svn: 102817
2010-05-01 00:33:28 +00:00
63f31115cd
Don't pass SDValues by non-const reference unless they may be
...
modified.
llvm-svn: 102816
2010-05-01 00:33:16 +00:00
5d059718c9
Reorgnaize more switch code lowering to clean up some tricky
...
code, and to eliminate the need for the SelectionDAGBuilder
state to be live during CodeGenAndEmitDAG calls.
Call SDB->clear() before CodeGenAndEmitDAG calls instead of
before it, and move the CurDAG->clear() out of SelectionDAGBuilder,
which doesn't own the DAG, and into CodeGenAndEmitDAG.
llvm-svn: 102814
2010-05-01 00:25:44 +00:00
f0514717cd
Delete the EdgeMapping variable itself.
...
llvm-svn: 102810
2010-05-01 00:02:20 +00:00
25c1653700
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
...
changes before doing phi lowering for switches.
llvm-svn: 102809
2010-05-01 00:01:06 +00:00
de4b225093
EXTRACT_VECTOR_ELT of an INSERT_VECTOR_ELT may have the same index, but the
...
indexes could be of a different value type. Or not even using the same SDNode
for the constant (weird, I know). Compare the actual values instead of the
pointers.
llvm-svn: 102791
2010-04-30 22:19:17 +00:00
09452cecd8
Remove this debug output. The MachineFunction will be printed once all of
...
instruction selection is done; it's confusing to see parts of it printed,
while other parts are omitted, along the way.
llvm-svn: 102771
2010-04-30 21:21:21 +00:00
9afed0f98b
The local register allocator has to spill dirty callee saved registers before a
...
call that might throw. The landing pad assumes that all registers are in stack
slots.
We used to spill those dirty CSRs after the call, and the stack slots would be
wrong when arriving at the landing pad.
llvm-svn: 102770
2010-04-30 21:19:29 +00:00
b4e3b9025c
Attach AT_APPLE_optimized attribute to optimized function's debug info.
...
llvm-svn: 102743
2010-04-30 19:38:23 +00:00
8acc8f7dfd
EmitDbgValue doesn't need its EdgeMapping argument.
...
llvm-svn: 102742
2010-04-30 19:35:33 +00:00
408459ffa6
Don't use floating point in SimpleRegisterCoalescing.
...
Rounding differences causes tests to fail on Linux.
llvm-svn: 102729
2010-04-30 18:28:11 +00:00
e82c25e878
Apply a patch from Jan Sjodin to fix a compiler abort on vector
...
comparisons sign-extended to a different bitwidth than the
comparison operands.
llvm-svn: 102721
2010-04-30 17:19:19 +00:00
587e0800e5
Temporarily disable SelectionDAG kill flags, which are causing trouble.
...
llvm-svn: 102680
2010-04-30 00:32:51 +00:00
ac55510c4e
Set register kill flags on the SelectionDAG path, at least in the
...
easy cases.
llvm-svn: 102678
2010-04-30 00:08:21 +00:00
8d4214578d
Reject really weird coalescer case when trying to merge identical subregisters
...
of different register classes. e.g.
%reg1048:3<def> = EXTRACT_SUBREG %RAX<kill>, 3
Where %reg1048 is a GR32 register. This is not impossible to handle, but it is
pretty hard and very rare.
This should unbreak the dragonegg builder.
llvm-svn: 102672
2010-04-29 23:47:46 +00:00
35cd68c888
Fix typos in assertion strings.
...
llvm-svn: 102666
2010-04-29 23:25:34 +00:00
e2550f4f93
Slightly verboser debug spew from coalescer
...
llvm-svn: 102663
2010-04-29 22:21:48 +00:00
0395553e35
Refactor.
...
llvm-svn: 102661
2010-04-29 20:40:36 +00:00
6feac8a39b
Make naked functions work on PPC.
...
llvm-svn: 102657
2010-04-29 19:32:19 +00:00
080e4fb2f0
Print variable scope name in DEBUG_VALUE comment. Useful in some cases. e.g.
...
##DEBUG_VALUE: runOnMachineFunction:this <- RDI+0
##DEBUG_VALUE: runOnMachineFunction:fn <- RSI+0
##DEBUG_VALUE: DeadDefs <- undef ## SimpleRegisterCoalescing.cpp:2706
##DEBUG_VALUE: getRegInfo:this <- [%rsp+$56]+$0
##DEBUG_VALUE: getTarget:this <- [%rsp+$56]+$0
llvm-svn: 102655
2010-04-29 18:52:10 +00:00
6e7ca24907
Remove DBG_VALUE which reference dead stack slots.
...
llvm-svn: 102654
2010-04-29 18:51:00 +00:00
a46953d281
DO not push DBG_VALUE machine instructions for inlined fuction arguments in entry block.
...
llvm-svn: 102653
2010-04-29 18:50:36 +00:00
5c864b42b2
Add comment.
...
llvm-svn: 102606
2010-04-29 06:58:53 +00:00
923679f929
Re-enable 102565 with fixes.
...
llvm-svn: 102602
2010-04-29 06:33:38 +00:00
d65a1e782b
Temporarily disable my changes to unbreak the build.
...
llvm-svn: 102590
2010-04-29 03:34:19 +00:00
5fb45a2b85
Do not generate duplicate dbg_value instructions for function arguments.
...
llvm-svn: 102585
2010-04-29 01:40:30 +00:00
d9e7322c9a
Fix missing #include.
...
llvm-svn: 102584
2010-04-29 01:39:13 +00:00
70a0145d7c
Avoid emitting a dbg_value machineinstr that's not going to be inserted into entry block.
...
llvm-svn: 102581
2010-04-29 01:23:55 +00:00
f4336ebb2a
Check Reg against zero.
...
llvm-svn: 102573
2010-04-29 00:59:34 +00:00
a5a8f76cea
- Really preserve dbg_value instructions when the register is spilled.
...
- Also, update dbg_value is the value is being re-matted from a frame slot, e.g. fixed slots for arguments.
llvm-svn: 102565
2010-04-28 23:52:26 +00:00
bb728e17d3
tidy up.
...
llvm-svn: 102558
2010-04-28 23:24:13 +00:00
6e822459ed
Replace r102368 with code that's less fragile. This creates DBG_VALUE instructions for function arguments early and insert them after instruction selection is done.
...
llvm-svn: 102554
2010-04-28 23:08:54 +00:00
d4d1a51895
Pretty print DBG_VALUE machine instructions.
...
Before:
DBG_VALUE %RSI, 0, !-1; dbg:SimpleRegisterCoalescing.cpp:2707
Now:
DBG_VALUE %RSI, 0, !"this"; dbg:SimpleRegisterCoalescing.cpp:2707
llvm-svn: 102518
2010-04-28 20:03:13 +00:00
08e9e72fa9
Rework global alignment computation again. Now we do round up
...
alignment of globals to the preferred alignment, but only when
there is no section specified on the global (by far the common
case).
llvm-svn: 102515
2010-04-28 19:58:07 +00:00
888c17073a
While lowering dbg_declare, emit DBG_VALUE machine instruction if alloca matching llvm.dbg.declare intrinsic is missing.
...
llvm-svn: 102513
2010-04-28 19:27:33 +00:00
06e7242d32
Recompute kill flags from live intervals after coalescing instead of trying to
...
update them. Computing kill flags is notoriously difficult, and the coalescer
would get it wrong sometimes, and it would completely skip physical registers.
Now we simply remove kill flags based on the live intervals after coalescing.
This is a few percent slower, but now we get correct kill flags for physical
registers after coalescing.
llvm-svn: 102510
2010-04-28 18:28:39 +00:00
f100557c9a
Try operation promotion only if regular dag combine and target-specific ones failed to do anything.
...
llvm-svn: 102492
2010-04-28 07:10:39 +00:00
50c9431203
Emit debug info for byval parameters.
...
llvm-svn: 102486
2010-04-28 01:39:28 +00:00
a3facc5cb5
further simplify EmitAlignment by eliminating the
...
ForcedAlignBits argument, tweaking the single client of it.
llvm-svn: 102484
2010-04-28 01:08:40 +00:00
72bdee4c10
remove a dead argument to EmitAlignment.
...
llvm-svn: 102483
2010-04-28 01:06:02 +00:00
9e06e53fc6
remove some default arguments to EmitAlignment.
...
llvm-svn: 102482
2010-04-28 01:05:45 +00:00
173b2b9d05
Refactor.
...
llvm-svn: 102481
2010-04-28 01:03:09 +00:00
cfc76fdaf1
Use isReg(), isImm() and isFPImm().
...
llvm-svn: 102470
2010-04-27 22:04:41 +00:00
1f34c2727d
Check operand type first.
...
llvm-svn: 102468
2010-04-27 21:49:04 +00:00
1a0bbe25e3
Ignore DBG_VALUE instructions that points to undef values.
...
llvm-svn: 102463
2010-04-27 20:54:45 +00:00
e813690b7a
- When legal, promote a load to zextload rather than ext load.
...
- Catch more further dag combine opportunities as result of operand promotion, e.g. (i32 anyext (i16 trunc (i32 x))) -> (i32 x)
llvm-svn: 102455
2010-04-27 19:48:13 +00:00
6c74a872a8
Identify when a lexical scope is split in to multiple instruction ranges. Emit such ranges using DW_AT_ranges.
...
This patch fixes bug (PR6894) introduced by previous version of this patch.
llvm-svn: 102454
2010-04-27 19:46:33 +00:00
eb828b6391
Do not count kill, implicit_def instructions as printed instructions.
...
llvm-svn: 102453
2010-04-27 19:38:45 +00:00
64d43d80be
round zero-byte .zerofill directives up to 1 byte. This
...
should fix some "g++.dg-struct-layout-1" failures,
rdar://7886017
llvm-svn: 102421
2010-04-27 07:41:44 +00:00
eb61a7d616
Revert a small part of 102372; this fixes at least one
...
of the dbg testsuite regressions. I don't think this is
really the right fix; this change exposed an existing problem
upstream somewhere.
llvm-svn: 102410
2010-04-27 02:10:05 +00:00
3af635a296
add a comment in verbose-asm mode indicating why a noop is being generated.
...
llvm-svn: 102401
2010-04-26 23:41:43 +00:00
6a5e706e3c
on darwin empty functions need to codegen into something of non-zero length,
...
otherwise labels get incorrectly merged. We handled this by emitting a
".byte 0", but this isn't correct on thumb/arm targets where the text segment
needs to be a multiple of 2/4 bytes. Handle this by emitting a noop. This
is more gross than it should be because arm/ppc are not fully mc'ized yet.
This fixes rdar://7908505
llvm-svn: 102400
2010-04-26 23:37:21 +00:00
a1e343095f
Avoid adding a null MD node operand, which crashes with "-debug" when trying
...
to print the operand.
llvm-svn: 102395
2010-04-26 22:56:56 +00:00
bd798ce8dd
Use DW_AT_entry_pc instead of DW_AT_low_pc/DW_AT_high_pc pair. This simplifies debug range entries.
...
llvm-svn: 102394
2010-04-26 22:54:28 +00:00
59a438560c
Remove crufty comments.
...
llvm-svn: 102380
2010-04-26 20:48:54 +00:00
e098352ed1
Add DBG_VALUE handling for byval parameters; this
...
produces a comment on targets that support it, but
the Dwarf writer is not hooked up yet.
llvm-svn: 102372
2010-04-26 20:06:49 +00:00
0e6fc61f21
Insert dbg_value instructions for function entry block liveins (i.e. function arguments).
...
llvm-svn: 102368
2010-04-26 19:16:00 +00:00
f740a8ceeb
fix PR6921 a different way. Intead of increasing the
...
alignment of globals with a specified alignment, we fix
common variables to obey their alignment. Add a comment
explaining why this behavior is important.
llvm-svn: 102365
2010-04-26 18:46:46 +00:00
c72d8a7dad
Re-enable 102323 with fix: do not update dbg_value's with incorrect frame indices when the live interval are being re-materialized.
...
llvm-svn: 102361
2010-04-26 18:37:21 +00:00
e80442aa6d
Revert r102300/102301, which serious broke objc apps.
...
llvm-svn: 102359
2010-04-26 18:30:45 +00:00
d561daf520
Update MachineSSAUpdater with the same changes I made for the IR-level
...
SSAUpdater. I'm going to try to refactor this to share most of the code
between them.
llvm-svn: 102353
2010-04-26 17:40:49 +00:00
5ad3cc1d5e
Temporary disable spiller modifying dbg_value. It's breaking build.
...
llvm-svn: 102327
2010-04-26 08:24:07 +00:00
ed69b382ea
- Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue.
...
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.
llvm-svn: 102323
2010-04-26 07:38:55 +00:00
582565e991
Stop abusing EmitInstrWithCustomInserter for target-dependent
...
form of DEBUG_VALUE, as it doesn't have reasonable default
behavior for unsupported targets. Add a new hook instead.
No functional change.
llvm-svn: 102320
2010-04-25 21:33:54 +00:00
1fc01985a3
Add comment re byval args. Doesn't actually work this way yet.
...
xs
llvm-svn: 102316
2010-04-25 21:03:54 +00:00
386a220f70
Fix PR6921: globals were not getting correctly rounded up to their
...
preferred alignment unless they were common or some other special
case.
llvm-svn: 102300
2010-04-25 05:30:43 +00:00
0abb54d631
When a load operand is promoted to an extload, replace other uses with uses of extload result truncated.
...
llvm-svn: 102236
2010-04-24 04:43:44 +00:00
5544b0c588
Apply a fix for a vector setcc dagcombine from Jan Sjodin. No
...
testcase yet, as the testcase now fails downstream.
llvm-svn: 102228
2010-04-24 01:17:30 +00:00
b9ff130d47
Code refactoring.
...
llvm-svn: 102202
2010-04-23 19:10:30 +00:00
6e9a8fcc28
Move FastISel's HandlePHINodesInSuccessorBlocks call down into FastISel
...
itself too.
llvm-svn: 102176
2010-04-23 15:29:50 +00:00
e9135cb3fb
Revert 102135, 102129, 102127, 102106, 102104, 102102, 102012, 102004,
...
because 102004 causes codegen to emit invalid assembly on at least
x86_64-unknown-gnu-linux.
llvm-svn: 102155
2010-04-23 01:18:53 +00:00
6adc5620ab
Add comment.
...
llvm-svn: 102129
2010-04-22 20:56:35 +00:00
5b43aa0ddd
Sink SelectionDAGBuilder's HandlePHINodesInSuccessorBlocks down
...
into SelectionDAGBuilder itself.
llvm-svn: 102128
2010-04-22 20:55:53 +00:00
ea2744f4dc
Adjust debug range offsets for isWeakForLinker() functions.
...
llvm-svn: 102127
2010-04-22 20:52:00 +00:00
c594eab10f
Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel
...
and into SelectionDAGBuilder and FastISel.
llvm-svn: 102123
2010-04-22 20:46:50 +00:00
f1223bdec0
- It's not safe to promote rotates (at least not trivially).
...
- Some code refactoring.
llvm-svn: 102111
2010-04-22 20:19:46 +00:00
e149e9896c
Fix a comment.
...
llvm-svn: 102110
2010-04-22 20:06:42 +00:00
fd81254190
Move PHINodesToUpdate out of SelectionDAGBuilder and into
...
FunctionLoweringInfo, as it isn't SelectionDAG-specific. This isn't
completely natural, as PHI node state is not per-function but rather
per-basic-block, however there's currently no other convenient
per-basic-block state to group it with.
llvm-svn: 102109
2010-04-22 19:55:20 +00:00
0fde4aeedd
Rename InsnAfterLabelMap and InsnBeforeLabelMap.
...
llvm-svn: 102106
2010-04-22 18:43:35 +00:00
53f530d44c
Keep track of MCSymbol used to mark beginning of a function.
...
llvm-svn: 102104
2010-04-22 18:39:21 +00:00
bae14a1cab
At this point Start and End are not null.
...
llvm-svn: 102102
2010-04-22 18:28:58 +00:00
14b1d758c6
Run LiveVariables instead of computing liveness locally in -regalloc=fast.
...
This actually makes everything slower, but the plan is to have isel add <kill>
flags the way it is already adding <dead> flags. Then LiveVariables can be
removed again.
When ignoring the time spent in LiveVariables, -regalloc=fast is now twice as
fast as -regalloc=local.
llvm-svn: 102034
2010-04-21 23:18:07 +00:00
02e816b317
Do not try to optimize a copy that has already been marked for deletion.
...
llvm-svn: 102027
2010-04-21 20:57:54 +00:00
1a6e399874
Add command line option to disable debug info printing in .s file. This option does not impact debug info generation and preservation through earlier compile starges.
...
llvm-svn: 102012
2010-04-21 19:08:53 +00:00
8a070a540d
Add fast register allocator, enabled with -regalloc=fast.
...
So far this is just a clone of -regalloc=local that has been lobotomized to run
25% faster. It drops the least-recently-used calculations, and is just plain
stupid when it runs out of registers.
The plan is to make this go even faster for -O0 by taking advantage of the short
live intervals in unoptimized code. It should not be necessary to calculate
liveness when most virtual registers are killed 2-3 instructions after they are
born.
llvm-svn: 102006
2010-04-21 18:02:42 +00:00
0940a8085e
Identify when a lexical scope is split in to multiple instruction ranges. Emit such ranges using DW_AT_ranges.
...
llvm-svn: 102004
2010-04-21 16:32:19 +00:00
4158a0ff6b
Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
...
optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181
llvm-svn: 101984
2010-04-21 03:18:23 +00:00
57c732b032
Add more const qualifiers on TargetMachine and friends.
...
llvm-svn: 101977
2010-04-21 01:34:56 +00:00
cc5e6528a5
Update CMakeLists.txt.
...
llvm-svn: 101976
2010-04-21 01:32:29 +00:00
450aa64fc1
Move several SelectionDAG-independent utility functions out of the
...
SelectionDAG directory and into a new Analysis.cpp file.
llvm-svn: 101975
2010-04-21 01:22:34 +00:00
2034d9f2da
- Clean up some crappy code which deals with coalescing of copies which look at
...
extract_subreg / insert_subreg, etc.
- Add support for more aggressive insert_subreg coalescing.
llvm-svn: 101971
2010-04-21 00:44:22 +00:00
4b2ef56ad2
Rewrite machine cse to avoid recursion.
...
llvm-svn: 101964
2010-04-21 00:21:07 +00:00
ad33d33719
Add another variant of this test which found a place where
...
CodeGen's ComputeMaskedBits was being over-conservative when computing
bits for an ADD.
llvm-svn: 101963
2010-04-21 00:19:28 +00:00
0522b90cdb
Because of the EMMS problem, right now we have to support
...
user-defined operations that use MMX register types, but
the compiler shouldn't generate them on its own. This adds
a Synthesizable abstraction to represent this, and changes
the vector widening computation so it won't produce MMX types.
(The motivation is to remove noise from the ABI compatibility
part of the gcc test suite, which has some breakage right now.)
llvm-svn: 101951
2010-04-20 22:34:09 +00:00
011207a0ae
When MachineLICM is hoisting a physical register after regalloc, make sure the
...
register is not killed in the loop.
This fixes 188.ammp on ARM where the post-ra scheduler would grab a register
that looked available but wasn't.
A testcase would be huge and fragile, sorry.
llvm-svn: 101930
2010-04-20 18:45:47 +00:00
4019d571d9
Typo.
...
llvm-svn: 101914
2010-04-20 17:27:38 +00:00
950fe784be
Sink the CopyToExportRegsIfNeeded calls out of SelectionDAGISel
...
into SelectionDAGBuilder. This avoids a separate pass over the
instructions, and has the side effect of providing debug location
information to the copy.
llvm-svn: 101906
2010-04-20 15:03:56 +00:00
f41ad478ca
Don't send PHI nodes down to SelectionDAGBuilder of FastISel, since
...
they end up doing nothing.
llvm-svn: 101904
2010-04-20 15:00:41 +00:00
7c845e4ea4
Sink this use_empty() check into isUsedOutsideOfDefiningBlock.
...
llvm-svn: 101902
2010-04-20 14:50:13 +00:00
7b7f0883fe
If a PHI node somehow has debug info, propogate it to the MachineInstr PHI.
...
llvm-svn: 101901
2010-04-20 14:48:02 +00:00
0f055d3f56
Don't iterate through the whole block just to find the PHI nodes.
...
llvm-svn: 101900
2010-04-20 14:46:25 +00:00
27b3d55194
use abstract accessors to CallInst
...
llvm-svn: 101899
2010-04-20 13:13:04 +00:00
5100367ff3
Bill's change in r95336 broke empty aggregates embedded
...
in other types. fix this by only bumping zero-byte globals
up to a single byte if the *entire global* is zero size,
fixing PR6340.
This also fixes empty arrays etc to be handled correctly,
and only does this on subsection-via-symbols targets (aka
darwin) which is the only place where this matters.
llvm-svn: 101879
2010-04-20 06:20:21 +00:00
0c862a86fa
Delete a redundant return statement.
...
llvm-svn: 101860
2010-04-20 01:58:20 +00:00
467e6c2deb
The visitXOR method can return the same SDNode. If so, we don't want to delete
...
it as it's not dead.
llvm-svn: 101855
2010-04-20 01:25:01 +00:00
eadc04badc
Remove this debug output; it isn't that useful, and it's incomplete
...
in the case where a basic block is split.
llvm-svn: 101850
2010-04-20 00:56:44 +00:00
e450d7444d
Sink DebugLoc handling out of SelectionDAGISel into FastISel and
...
SelectionDAGBuilder, where it doesn't have to be as complicated.
llvm-svn: 101848
2010-04-20 00:48:35 +00:00
3df671a81c
Remove MachineFunction's DefaultDebugLoc member, and make DwarfDebug.cpp
...
responsible for figuring out what that's supposed to be on its own.
llvm-svn: 101844
2010-04-20 00:37:27 +00:00
ca35aa1122
Reapply the removal of SelectionDAGISel's BB, with a fix for the case
...
where multiple blocks are emitted; functions which do this need to return
the new BB so that their callers can stay current.
llvm-svn: 101843
2010-04-20 00:29:35 +00:00
be2e727a38
Revert 101825, which is causing trouble.
...
llvm-svn: 101832
2010-04-19 23:34:15 +00:00
35bc4d46cb
Make BreakAntiDependencies' SUnits argument const, and make the Begin
...
and End arguments by-value rather than by-reference.
llvm-svn: 101830
2010-04-19 23:11:58 +00:00
8cccc542f6
Eliminate SelectionDAGISel's "current block" member. Just pass it as
...
an argument to things that need it.
llvm-svn: 101825
2010-04-19 22:51:14 +00:00
7c0303a059
Eliminate the CurMBB member from SelectionDAGBuilder. For places that
...
need it, just pass around the parent block of the current instruction
explicitly.
llvm-svn: 101822
2010-04-19 22:41:47 +00:00
e19aa5cc52
More progress on promoting i16 operations to i32 for x86. Work in progress.
...
llvm-svn: 101808
2010-04-19 19:29:22 +00:00
1e95790fd4
Give SelectionDAG a TargetMachine too, rather than having it
...
fetch one from the MachineFunction.
llvm-svn: 101807
2010-04-19 19:22:07 +00:00
e7c21a4242
More 80 col violation.
...
llvm-svn: 101806
2010-04-19 19:17:44 +00:00
6188093cca
Add DW_AT_APPLE_omit_frame_ptr to encode -fomit-frame-pointer flag.
...
llvm-svn: 101805
2010-04-19 19:14:02 +00:00
c334960f16
Code that needs a TargetMachine should have access to one directly, rather
...
than just getting one through a TargetLowering.
llvm-svn: 101802
2010-04-19 19:05:59 +00:00
a91754da67
Move isInTailCallPosition out of SelectionDAGBuilder, as it isn't
...
SelectionDAG-specific.
llvm-svn: 101801
2010-04-19 18:41:46 +00:00
1f0f2142cc
Fix -Wcast-qual warnings.
...
llvm-svn: 101655
2010-04-17 17:42:52 +00:00
53d4a08d2b
Add const qualifiers to TargetLoweringObjectFile usage.
...
llvm-svn: 101640
2010-04-17 16:44:48 +00:00
88f7f6aeda
Use const_cast instead of a C-style cast to cast away const.
...
llvm-svn: 101639
2010-04-17 16:43:55 +00:00
4fee6f3bdd
Start function numbering at 0.
...
llvm-svn: 101638
2010-04-17 16:29:15 +00:00
8422e57baa
Delete now-unnecessary const_casts.
...
llvm-svn: 101637
2010-04-17 15:32:28 +00:00
21cea8ac2e
Use const qualifiers with TargetLowering. This eliminates several
...
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
llvm-svn: 101635
2010-04-17 15:26:15 +00:00
5fdb57cc10
Postra machine licm must add registers defined by loop invariants to *all* of
...
the live-in sets of BBs in the loop. Otherwise later pass may end up using the
registers and override the invariant. rdar://7852937
No reasonablly sized test case possible.
llvm-svn: 101626
2010-04-17 07:07:11 +00:00
4f3aba431e
Fix codegen passes. -disable-ssc shouldn't disable postra machine licm.
...
llvm-svn: 101622
2010-04-17 06:47:47 +00:00
f1bd5fcdb4
More work to allow dag combiner to promote 16-bit ops to 32-bit.
...
llvm-svn: 101621
2010-04-17 06:13:15 +00:00
829c300ce0
Another 80 col violation.
...
llvm-svn: 101620
2010-04-17 06:12:32 +00:00
4e5eb5ae1b
As a temporary workaround for post-RA not handling DebugValue instructions,
...
just remove them all. Radar 7873207 (working around the root problem of
Radar 7759363).
llvm-svn: 101604
2010-04-17 00:49:11 +00:00
71336f213b
Revert "Use a simpler data structure to calculate the least recently used register in RegAllocLocal."
...
This reverts commit 101392. It broke a buildbot.
llvm-svn: 101595
2010-04-17 00:38:36 +00:00
7258dcd77f
Revert 101465, it broke internal OpenGL testing.
...
Probably the best way to know that all getOperand() calls have been handled
is to replace that API instead of updating.
llvm-svn: 101579
2010-04-16 23:37:20 +00:00
12563b3495
Add support to emit dwarf ranges.
...
llvm-svn: 101575
2010-04-16 23:33:45 +00:00
ae372e2ce0
Use a simpler data structure to calculate the least recently used register in RegAllocLocal.
...
This makes the local register allocator about 20% faster.
llvm-svn: 101574
2010-04-16 23:32:37 +00:00
f037f87bde
(i32 sext_in_reg (i32 aext (i16 x)), i16) -> (i32 sext x). No known test case until -promote-16bit is enabled.
...
llvm-svn: 101551
2010-04-16 22:26:19 +00:00
c4759a5b97
Create a new TargetSelectionDAGInfo class. This will eventually acquire
...
SelectionDAG-specific parts of TargetLowering.
llvm-svn: 101537
2010-04-16 21:12:11 +00:00
4d273f4519
Commit this, which should have accompanied 101531.
...
llvm-svn: 101532
2010-04-16 20:22:43 +00:00
954bd598dd
80 col.
...
llvm-svn: 101501
2010-04-16 17:58:41 +00:00
d6b0a7c075
80 col.
...
llvm-svn: 101500
2010-04-16 17:57:59 +00:00
3a7ee8eead
Avoid creating virtual registers for unused values.
...
llvm-svn: 101480
2010-04-16 17:15:02 +00:00
5664b9f1a9
Fix an assertion string.
...
llvm-svn: 101478
2010-04-16 16:55:18 +00:00
4572a9f479
Fix a comment.
...
llvm-svn: 101477
2010-04-16 16:52:37 +00:00
f375520f7b
reapply r101434
...
with a fix for self-hosting
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101465
2010-04-16 15:33:14 +00:00
929f3c0927
The JIT calls TidyLandingPads to tidy up the landing pads. However, because the
...
JIT doesn't use the MC back-end asm printer to emit labels that it uses, the
section for the MCSymbol is never set. And thus the MCSymbol for the EH label
isn't marked as "defined". Because of that, TidyLandingPads removes the needed
landing pads from the JIT output. This breaks EH for every JIT program.
This is a work-around for this limitation. We pass in the label locations
map. If the label has a non-zero value, then it was "emitted" by the JIT and
TidyLandingPads shouldn't remove that label.
A nicer solution would be to mark the MCSymbol as "used" by the JIT and not rely
upon the section being set to determine if it's defined or not.
llvm-svn: 101453
2010-04-16 08:46:10 +00:00
af56facacd
Adding support for dag combiner to promote operations for profit. This requires target specific queries. For example, x86 should promote i16 to i32 when it does not impact load folding.
...
x86 support is off by default. It can be enabled with -promote-16bit.
Work in progress.
llvm-svn: 101448
2010-04-16 06:14:10 +00:00
5563473062
Refine further the scope where the global DebugLoc value is active.
...
llvm-svn: 101443
2010-04-16 05:06:56 +00:00
403e9694f9
back out r101423 and r101397, they break llvm-gcc self-host on darwin10
...
llvm-svn: 101434
2010-04-16 01:16:20 +00:00
cdc3df4888
Avoid sinking machine instructions into a loop.
...
MachineLoopInfo is already available when MachineSinking runs, so the check is
free.
There is no test case because it would require a critical edge into a loop, and
CodeGenPrepare splits those. This check is just to be extra careful.
llvm-svn: 101420
2010-04-15 23:41:02 +00:00
33ae80bff7
reapply r101364, which has been backed out in r101368
...
with a fix
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101397
2010-04-15 20:51:13 +00:00
b642a27525
Fix PR6847. RegScavenger should ignore DebugValues.
...
llvm-svn: 101392
2010-04-15 20:28:39 +00:00
19cd1d84ad
Make sure the initialization of a GC root is after its definition.
...
llvm-svn: 101388
2010-04-15 19:53:35 +00:00
b36d07cb93
prune includes
...
llvm-svn: 101385
2010-04-15 19:44:21 +00:00
b29cda9b3c
Fix a bunch of namespace polution.
...
llvm-svn: 101376
2010-04-15 17:08:50 +00:00
ff3c8b7eaf
typos
...
llvm-svn: 101371
2010-04-15 15:14:46 +00:00
9fd00c7d25
back out r101364, as it trips the linux nightlybot on some clang C++ tests
...
llvm-svn: 101368
2010-04-15 12:46:56 +00:00
aafd209632
rotate CallInst operands, i.e. move callee to the back
...
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101364
2010-04-15 10:49:53 +00:00
3245afdf05
enhance the load/store narrowing optimization to handle a
...
tokenfactor in between the load/store. This allows us to
optimize test7 into:
_test7: ## @test7
## BB#0: ## %entry
movl (%rdx), %eax
## kill: SIL<def> ESI<kill>
movb %sil, 5(%rdi)
ret
instead of:
_test7: ## @test7
## BB#0: ## %entry
movl 4(%esp), %ecx
movl $-65281, %eax ## imm = 0xFFFFFFFFFFFF00FF
andl 4(%ecx), %eax
movzbl 8(%esp), %edx
shll $8, %edx
addl %eax, %edx
movl 12(%esp), %eax
movl (%eax), %eax
movl %edx, 4(%ecx)
ret
llvm-svn: 101355
2010-04-15 06:10:49 +00:00
6ebd8674eb
teach codegen to turn trunc(zextload) into load when possible.
...
This doesn't occur much at all, it only seems to formed in the case
when the trunc optimization kicks in due to phase ordering. In that
case it is saves a few bytes on x86-32.
llvm-svn: 101350
2010-04-15 05:40:59 +00:00
f9b2e3c68a
add a simple dag combine to replace trivial shl+lshr with
...
and. This happens with the store->load narrowing stuff.
llvm-svn: 101348
2010-04-15 05:28:43 +00:00
4041ab6e00
Implement rdar://7860110 (also in target/readme.txt) narrowing
...
a load/or/and/store sequence into a narrower store when it is
safe. Daniel tells me that clang will start producing this sort
of thing with bitfields, and this does trigger a few dozen times
on 176.gcc produced by llvm-gcc even now.
This compiles code like CodeGen/X86/2009-05-28-DAGCombineCrash.ll
into:
movl %eax, 36(%rdi)
instead of:
movl $4294967295, %eax ## imm = 0xFFFFFFFF
andq 32(%rdi), %rax
shlq $32, %rcx
addq %rax, %rcx
movq %rcx, 32(%rdi)
and each of the testcases into a single store. Each of them used
to compile into craziness like this:
_test4:
movl $65535, %eax ## imm = 0xFFFF
andl (%rdi), %eax
shll $16, %esi
addl %eax, %esi
movl %esi, (%rdi)
ret
llvm-svn: 101343
2010-04-15 04:48:01 +00:00
913c998703
Add more const qualifiers for LLVM IR pointers in CodeGen.
...
llvm-svn: 101342
2010-04-15 04:33:49 +00:00
bcaf681cde
Add const qualifiers to CodeGen's use of LLVM IR constructs.
...
llvm-svn: 101334
2010-04-15 01:51:59 +00:00
87b4f7c1aa
More 80 violations.
...
llvm-svn: 101330
2010-04-15 01:25:27 +00:00
8442ef6f89
80 col violations.
...
llvm-svn: 101325
2010-04-15 01:01:55 +00:00
3d6c40c616
Add comment.
...
llvm-svn: 101317
2010-04-15 00:02:49 +00:00
97bdf94da3
There is no need to track compile unit offsets if there is only one compile unit.
...
llvm-svn: 101315
2010-04-14 23:56:24 +00:00
b08ccb62d5
Remove dead code.
...
llvm-svn: 101314
2010-04-14 23:54:13 +00:00
c87b74d913
Delete unneeeded arguments.
...
llvm-svn: 101276
2010-04-14 20:17:22 +00:00
a3918ecdf5
Delete unused arguments.
...
llvm-svn: 101275
2010-04-14 20:05:00 +00:00
7deb447781
Factor out EH landing pad code into a separate function, and constify
...
a bunch of stuff to support it.
llvm-svn: 101273
2010-04-14 19:53:31 +00:00
c2c08d19b8
Reset the debug location even if the instruction was a terminator.
...
llvm-svn: 101272
2010-04-14 19:30:02 +00:00
cacd4f2401
Refine #includes.
...
llvm-svn: 101269
2010-04-14 18:49:17 +00:00
8ebcbe949a
Pull utility routines with no SelectionDAG dependence out of
...
SelectionDAGBuilder. FunctionLoweringInfo isn't an ideal place for
them to live, but it's better than SelectionDAGBuilder for now.
llvm-svn: 101267
2010-04-14 18:31:02 +00:00
f5cca35750
Fix typos in comments.
...
llvm-svn: 101266
2010-04-14 18:24:06 +00:00
fea9ba18ff
Delete an obsolete comment.
...
llvm-svn: 101264
2010-04-14 17:40:25 +00:00
3215eae4a3
Delete an unused function.
...
llvm-svn: 101263
2010-04-14 17:22:02 +00:00
094fc7b09e
Clear the FunctionLoweringInfo object before doing other things that
...
don't need it.
llvm-svn: 101262
2010-04-14 17:13:16 +00:00
ad0b3ea3cc
Move this assert out of SelectionDAGISel into FunctionLoweringInfo, and
...
drop the redundant #ifndef NDEBUG.
llvm-svn: 101261
2010-04-14 17:11:23 +00:00
0f405c8d73
Add a comment.
...
llvm-svn: 101260
2010-04-14 17:09:37 +00:00
2ca8fb229c
Move the code for initialing the entry block livein set out of
...
SelectionDAGISel.
llvm-svn: 101258
2010-04-14 17:05:00 +00:00
4bfb437ec9
Reorgnaize this code to be more tidy and readable.
...
llvm-svn: 101256
2010-04-14 17:02:07 +00:00
1939b5f130
Trim #includes.
...
llvm-svn: 101255
2010-04-14 16:54:39 +00:00
2b79ee8bc8
Move the code for emitting livein copies out of SelectionDAGISel.
...
llvm-svn: 101254
2010-04-14 16:51:49 +00:00
69e8e322d9
Sink landing-pad marking code out of
...
SelectionDAGISel::runOnMachineFunction into FunctionLowering.
llvm-svn: 101252
2010-04-14 16:32:56 +00:00
f57117d166
It's not necessary to recompute EB here.
...
llvm-svn: 101251
2010-04-14 16:30:40 +00:00
5f40d34958
Generalize this code to handle Instructions in addition to ConstantExprs.
...
llvm-svn: 101210
2010-04-14 02:33:23 +00:00
9162fb07be
Reorder the methods of this class to be a little more organized.
...
llvm-svn: 101206
2010-04-14 02:09:45 +00:00
b7eadda495
Clear MachineInstr->MCSymbol maps at the end of a function.
...
llvm-svn: 101202
2010-04-14 01:18:28 +00:00
87585d72a5
Fast path implicit_def check.
...
llvm-svn: 101183
2010-04-13 22:13:34 +00:00
12d150ea43
Do not include types without any definition in pubtypes list.
...
llvm-svn: 101171
2010-04-13 20:35:04 +00:00
cce672c172
Avoid variable shadowing.
...
llvm-svn: 101170
2010-04-13 20:25:29 +00:00
89e74792b6
Expand postra machine licm's capability a little more. If an instruction's register operands are all loop invariants, then it's safe to hoist it.
...
llvm-svn: 101167
2010-04-13 20:21:05 +00:00
20b71e28cc
Teach MachineSinking to handle easy critical edges.
...
Sometimes it is desirable to sink instructions along a critical edge:
x = ...
if (a && b) ...
else use(x);
The 'a && b' condition creates a critical edge to the else block, but we still
want to sink the computation of x into the block. The else block is dominated by
the parent block, so we are not pushing instructions into new code paths.
llvm-svn: 101165
2010-04-13 19:06:14 +00:00
0a2aff2d12
Teach postra machine licm to hoist more obvious invariants, e.g. instructions with no source operands.
...
llvm-svn: 101154
2010-04-13 18:16:00 +00:00
8a2dae57e2
Add a few comments.
...
llvm-svn: 101148
2010-04-13 17:07:06 +00:00
9d2d053e11
Eliminate MachineBasicBlock::const_livein_iterator and make
...
MachineBasicBlock::livein_iterator a const_iterator, because
clients shouldn't ever be using the iterator interface to
mutate the livein set.
llvm-svn: 101147
2010-04-13 16:57:55 +00:00
dcacef3188
Rename MachineFrameInfo variables to MFI, for consistency with
...
the rest of CodeGen.
llvm-svn: 101146
2010-04-13 16:56:45 +00:00
6b1b1e4358
Move MachineRegisterInfo's isLiveIn and isLiveOut out of line.
...
llvm-svn: 101145
2010-04-13 16:55:37 +00:00
39305067ad
Delete an unused member variable.
...
llvm-svn: 101143
2010-04-13 16:51:39 +00:00
5b212a31a2
add llvm codegen support for -ffunction-sections and -fdata-sections,
...
patch by Sylvere Teissier!
llvm-svn: 101106
2010-04-13 00:36:43 +00:00
e4148978b8
Remove a #include.
...
llvm-svn: 101043
2010-04-12 16:26:03 +00:00
d0b5c6cbed
Plug trivial leak.
...
llvm-svn: 101034
2010-04-12 11:38:35 +00:00
250283916d
Enable post regalloc machine licm by default.
...
llvm-svn: 101023
2010-04-12 06:25:28 +00:00
ecd40a34e2
Remove unnecessary parens.
...
llvm-svn: 101010
2010-04-12 02:24:01 +00:00
67dd3a4464
Tidy whitespace.
...
llvm-svn: 100904
2010-04-09 21:38:26 +00:00
541019ddec
Clear InsnsBeginScopeSet and InsnsEndScopeSet at the end of function.
...
llvm-svn: 100867
2010-04-09 16:04:20 +00:00
87f8207c97
Delete this obsolete comment.
...
llvm-svn: 100858
2010-04-09 14:12:01 +00:00
825989ab63
Add a missing dependency to this library when building with CMake.
...
llvm-svn: 100852
2010-04-09 05:55:25 +00:00
d8eeb12120
Use getNumImplicitDefs() and getNumImplicitUses().
...
llvm-svn: 100850
2010-04-09 04:46:43 +00:00
406f270148
Fix up some comments.
...
llvm-svn: 100849
2010-04-09 04:34:03 +00:00
4ce1fb1448
Add variants of ult, ule, etc. which take a uint64_t RHS, for convenience.
...
llvm-svn: 100824
2010-04-08 23:03:40 +00:00
80c345927e
delete a forwarding function.
...
llvm-svn: 100815
2010-04-08 21:34:17 +00:00
5418dd5fda
move elf section uniquing to MCContext. Along the way
...
merge XCore's section into MCSectionELF
llvm-svn: 100812
2010-04-08 21:26:26 +00:00
433d40695b
remove the TargetLoweringObjectFileMachO::getMachoSection
...
api and update clients to use MCContext instead.
llvm-svn: 100808
2010-04-08 20:40:11 +00:00
2073112fc0
move macho section uniquing from MCParser and TLOF to MCContext where
...
the compiler and asmparser now unique to the same sections. This fixes
rdar://7835021.
llvm-svn: 100807
2010-04-08 20:30:37 +00:00
b083c47c21
Coalescer should not delete copy instructions whose defs are partially dead. e.g.
...
%RDI<def,dead> = MOV64rr %RAX<kill>, %EDI<imp-def>
llvm-svn: 100804
2010-04-08 20:02:37 +00:00
d87bd77586
Fix -Wsign-compare warning (issued by clang++).
...
llvm-svn: 100799
2010-04-08 18:49:30 +00:00
359b013129
Rename a function.
...
llvm-svn: 100797
2010-04-08 18:43:56 +00:00
294a90d87a
implicit defs get added to the end of machine instrs sometimes. Scan the whole instruction for the metadata operand instead of assuming it will be at the end of the instruction.
...
llvm-svn: 100792
2010-04-08 18:20:52 +00:00
3ebd8931fb
One instruction may start (or end) multiple lexical scopes.
...
There is no need to remember labels identifying regions marked by such instructions in each scope.
llvm-svn: 100781
2010-04-08 16:50:29 +00:00
2abed283e5
Remove dead code.
...
llvm-svn: 100771
2010-04-08 15:48:02 +00:00
adfd4df12c
Delete out of date comment.
...
llvm-svn: 100769
2010-04-08 15:41:13 +00:00
f1d5a1e994
Refactor.
...
llvm-svn: 100768
2010-04-08 15:37:09 +00:00
a6769269f3
Use twines to simplify calls to report_fatal_error. For code size and readability.
...
llvm-svn: 100756
2010-04-08 10:44:28 +00:00
ebe47c872f
Avoid using f64 to lower memcpy from constant string. It's cheaper to use i32 store of immediates.
...
llvm-svn: 100751
2010-04-08 07:37:57 +00:00
058b9f04e8
Make post regalloc machine licm functional. It now passes all of MultiSource.
...
llvm-svn: 100742
2010-04-08 01:03:47 +00:00
3c65a8324d
convert a report_fatal_error that I was able to trigger into a nice error
...
so the user at least knows what inline asm is a problem. For example:
error: inline asm not supported yet: don't know how to handle tied indirect register inputs
pr8788-1.c:14:10: note: generated from here
asm ("\n" : "+r" (stack->regs)
^
Instead of:
fatal error: error in backend: Don't know how to handle tied indirect register inputs yet!
llvm-svn: 100731
2010-04-08 00:09:16 +00:00
94ef52824b
minor tidying.
...
llvm-svn: 100725
2010-04-07 23:50:38 +00:00
cd92718a0f
use assertions instead of unreachable for logic errors.
...
llvm-svn: 100724
2010-04-07 23:47:51 +00:00
1e45789ee0
introduce a new recoverable error handling API to LLVMContext
...
and use it in one place in inline asm handling stuff. Before
we'd generate this for an invalid modifier letter:
$ clang asm.c -c -o t.o
fatal error: error in backend: Invalid operand found in inline asm: 'abc incl ${0:Z}'
INLINEASM <es:abc incl ${0:Z}>, 10, %EAX<def>, 2147483657, %EAX, 14, %EFLAGS<earlyclobber,def,dead>, <!-1>
Now we generate this:
$ clang asm.c -c -o t.o
error: invalid operand in inline asm: 'incl ${0:Z}'
asm.c:3:12: note: generated from here
__asm__ ("incl %Z0" : "+r" (X));
^
1 error generated.
This is much better but still admittedly not great ("why" is the operand
invalid??), codegen should try harder with its diagnostics :)
llvm-svn: 100723
2010-04-07 23:40:44 +00:00
2104b8d36e
rename llvm::llvm_report_error -> llvm::report_fatal_error
...
llvm-svn: 100709
2010-04-07 22:58:41 +00:00
cc7bb24fe2
remove some unneeded errorhandling stuff.
...
llvm-svn: 100703
2010-04-07 22:44:07 +00:00
b50e795369
tidy up
...
llvm-svn: 100700
2010-04-07 22:29:10 +00:00
6e01726eae
Remove late ARM codegen optimization pass committed by accident.
...
It is not ready for public yet.
llvm-svn: 100673
2010-04-07 18:23:27 +00:00
0bdc6345e8
Initial support for different kinds of FU reservation.
...
llvm-svn: 100645
2010-04-07 18:19:32 +00:00
9a348a9572
Factor out scoreboard into separate class. This way we might have several different score boards.
...
llvm-svn: 100644
2010-04-07 18:19:24 +00:00
fed8ee7dfc
Add hook to insert late LLVM=>LLVM passes just before isel
...
llvm-svn: 100640
2010-04-07 18:18:42 +00:00
6855d62768
fix 80 col violation, patch by Alastair Lynn
...
llvm-svn: 100639
2010-04-07 18:13:33 +00:00
29233c0458
add a comment line that got dropped
...
llvm-svn: 100638
2010-04-07 18:10:38 +00:00
f839ee0c13
fix a latent bug my inline asm stuff exposed:
...
MachineOperand::isIdenticalTo wasn't handling metadata operands.
llvm-svn: 100636
2010-04-07 18:03:19 +00:00
f2351a7a6e
Remove unused method.
...
llvm-svn: 100620
2010-04-07 11:23:46 +00:00
f8dba24a9b
Workaround the breakage in r100616 by guarding all timers with
...
TimePassesIsEnabled. This should allow make check to pass.
llvm-svn: 100618
2010-04-07 10:44:46 +00:00
fcc14141c7
Use the "NamedGroupTimer" class to categorize DWARF emission better.
...
llvm-svn: 100616
2010-04-07 09:28:04 +00:00
43c275fa56
Use raw_ostream.
...
llvm-svn: 100615
2010-04-07 09:26:51 +00:00
5ed679282b
Add comments for missed opportunities.
...
llvm-svn: 100610
2010-04-07 06:00:33 +00:00
fcbcc0bd51
Fix typo.
...
llvm-svn: 100609
2010-04-07 05:59:12 +00:00
51065568cd
Have the inst emitter add the !srcloc mdnode to the machine instr.
...
Have the asmprinter use the mdnode to scavenge a source location if
present. Document this nonsense in langref.
llvm-svn: 100607
2010-04-07 05:38:05 +00:00
d62adaa54d
remove another magic number.
...
llvm-svn: 100606
2010-04-07 05:27:36 +00:00
3b9f02a2aa
Three changes:
...
1. Introduce some enums and accessors in the InlineAsm class
that eliminate a ton of magic numbers when handling inline
asm SDNode.
2. Add a new MDNodeSDNode selection dag node type that holds
a MDNode (shocking!)
3. Add a new argument to ISD::INLINEASM nodes that hold !srcloc
metadata, propagating it to the instruction emitter, which
drops it.
No functionality change.
llvm-svn: 100605
2010-04-07 05:20:54 +00:00
5d7f0a0fdd
Move printing of target-indepedent DEBUG_VALUE comments
...
into AsmPrinter. Target-dependent form is still generated
by FastISel and still handled in X86 code.
llvm-svn: 100596
2010-04-07 01:15:14 +00:00
6ea5949a93
Post regalloc LICM. Work in progress.
...
llvm-svn: 100592
2010-04-07 00:41:17 +00:00
019922d1b0
Do not emit specification DIE with DW_AT_specification attribute for member functions of a funcation local class. This trips gdb's partial scan of DIEs at load time. Fixes Radar 7833483.
...
llvm-svn: 100586
2010-04-06 23:53:48 +00:00
796583eec0
Fix a number of clang -Wsign-compare warnings that didn't have an obvious
...
solution. The only reason these don't fire with gcc-4.2 is that gcc turns off
part of -Wsign-compare in C++ on accident.
llvm-svn: 100581
2010-04-06 23:35:53 +00:00
b36c70913b
Revert 100573, it's causing some testsuite problems.
...
llvm-svn: 100578
2010-04-06 22:45:26 +00:00
85b35b6214
Move printing of DEBUG_VALUE comments to target-independent place.
...
There is probably a more elegant way to do this.
llvm-svn: 100573
2010-04-06 22:21:07 +00:00
d1976e35c4
Allow for the possibility that a debug-value points
...
to a SDNode that didn't have code generated for it.
llvm-svn: 100566
2010-04-06 21:59:56 +00:00
4bd3dd956f
Reverting 100530 & 100531 due to regressions in the GDB test suite.
...
llvm-svn: 100563
2010-04-06 21:38:29 +00:00
a910f17a20
Code clean up. Move includes from VirtRegRewriter.h to VirtRegRewriter.cpp.
...
llvm-svn: 100532
2010-04-06 17:19:55 +00:00
c067196984
Revise debug info machinery to digest nested functions and classes.
...
A certain GDB testsuite case (local.cc) has a function nested inside a
class nested inside another function. GCC presents the innermost
function to llvm-convert first. Heretofore, the debug info mistakenly
placed the inner function at module scope. This patch walks the GCC
context links and instantiates the outer class and function so the
debug info is properly nested. Radar 7426545.
llvm-svn: 100530
2010-04-06 17:19:32 +00:00
bf86224d5e
Remove assert to treat memmove and memset like memcpy
...
llvm-svn: 100521
2010-04-06 08:27:51 +00:00
92aba5a817
propagate cookie management out one layer of function calls.
...
llvm-svn: 100510
2010-04-06 00:58:50 +00:00
59126b2500
report errors through LLVMContext's inline asm handler if available.
...
llvm-svn: 100509
2010-04-06 00:55:39 +00:00
f226748324
Give MachineModuleInfo an actual Module*.
...
llvm-svn: 100508
2010-04-06 00:51:52 +00:00
fc4a1db23b
Remove unnecessary include.
...
llvm-svn: 100505
2010-04-06 00:38:32 +00:00
272a2f8432
Fix an obvious copy-n-paste bug. It's not known to cause any miscompilation.
...
llvm-svn: 100494
2010-04-05 23:33:29 +00:00
3b21e4d404
Give AsmParser an option to control whether it finalizes
...
the stream. New demo:
$ clang asm.c -S -o - -emit-llvm | llc -filetype=obj -o t.o
$ otool -tv t.o
t.o:
(__TEXT,__text) section
_foo:
0000000000000000 subq $0x08,%rsp
0000000000000004 movl %edi,(%rsp)
0000000000000007 movl %edi,%eax
0000000000000009 incl %eax
000000000000000b movl %eax,(%rsp)
000000000000000e movl %eax,0x04(%rsp)
0000000000000012 addq $0x08,%rsp
0000000000000016 ret
llvm-svn: 100492
2010-04-05 23:15:42 +00:00
8900ef1931
add .o file writing for inline asm in llc. Here's a silly
...
demo:
$ clang asm.c -S -o - -emit-llvm | llc -filetype=obj -o t.o
<inline asm>:1:2: error: unrecognized instruction
abc incl %eax
^
LLVM ERROR: Error parsing inline asm
Only problem seems to be that the parser finalizes OutStreamer
at the end of the first inline asm, which isn't what we want.
For example:
$ cat asm.c
int foo(int X) {
__asm__ ("incl %0" : "+r" (X));
return X;
}
$ clang asm.c -S -o - -emit-llvm | llc
...
subq $8, %rsp
movl %edi, (%rsp)
movl %edi, %eax
## InlineAsm Start
incl %eax
## InlineAsm End
movl %eax, (%rsp)
movl %eax, 4(%rsp)
addq $8, %rsp
ret
$ clang asm.c -S -o - -emit-llvm | llc -filetype=obj -o t.o
$ otool -tv t.o
t.o:
(__TEXT,__text) section
_foo:
0000000000000000 subq $0x08,%rsp
0000000000000004 movl %edi,(%rsp)
0000000000000007 movl %edi,%eax
0000000000000009 incl %eax
$
don't stop at inc!
llvm-svn: 100491
2010-04-05 23:11:24 +00:00
30346347b3
Output floating point representations in DWARF format. This is done by outputing
...
the FP encoding directly as a hex representation.
llvm-svn: 100487
2010-04-05 22:59:21 +00:00
0e45d24a4e
stringref-ize the MemoryBuffer::get apis. This requires
...
a co-committed clang patch.
llvm-svn: 100485
2010-04-05 22:42:30 +00:00
f38547c83f
Add a comment.
...
llvm-svn: 100459
2010-04-05 20:24:08 +00:00
bc217873e3
lowering a volatile llvm.memcpy to a libc memcpy is ok.
...
PR6779
llvm-svn: 100457
2010-04-05 20:11:45 +00:00
918a90a3ca
Don't do code sinking on unreachable blocks. It's unprofitable and hazardous.
...
llvm-svn: 100455
2010-04-05 19:17:22 +00:00
fb964e57e5
remove the now-redundant MMI pointer in SelectionDAG.
...
llvm-svn: 100419
2010-04-05 06:19:28 +00:00
28f2fdafcd
hopefully sate the clang self host build, which is apparently
...
instantiating some folding set stuff that GCC isn't, requiring
some types to not be incomplete.
I don't know if clang is right or wrong, but unbreaking the
bot is goodness. Here's the broken build:
http://google1.osuosl.org:8011/builders/clang-x86_64-darwin10-selfhost/builds/1813/steps/compile.llvm.stage2/logs/stdio
llvm-svn: 100418
2010-04-05 06:12:01 +00:00
6361414c88
remove some redundant MMI arguments.
...
llvm-svn: 100417
2010-04-05 06:10:13 +00:00
305f2efb63
unthread MMI from FastISel
...
llvm-svn: 100416
2010-04-05 06:05:26 +00:00
82ff9af068
remove the MMI pointer from MachineFrameInfo.
...
llvm-svn: 100415
2010-04-05 05:57:52 +00:00
9f53dcd7b9
enhance MachineFunction to have a MMI pointer.
...
llvm-svn: 100414
2010-04-05 05:49:50 +00:00
64a168efb6
privatize more stuff, eliminate vtables.
...
llvm-svn: 100410
2010-04-05 05:32:45 +00:00
acda87bdb1
reprivatize now that DwarfWriter is gone.
...
llvm-svn: 100409
2010-04-05 05:31:04 +00:00
da790ea006
prune #includes, MMI can never be null
...
llvm-svn: 100408
2010-04-05 05:28:23 +00:00
3f3fb970e4
prune #includes, realize the MMI can never be null.
...
llvm-svn: 100407
2010-04-05 05:24:55 +00:00
10cb0f4338
finally blast DwarfWriter away.
...
llvm-svn: 100406
2010-04-05 05:12:59 +00:00
f0d6bd3ef4
change AsmPrinter to use DwarfDebug/DwarfException directly
...
instead of going through DwarfWriter.
llvm-svn: 100405
2010-04-05 05:11:15 +00:00
f5d0636850
trim some spurious references to DwarfWriter. SDIsel really doesn't
...
need it anymore, so don't addRequire it.
llvm-svn: 100400
2010-04-05 04:09:20 +00:00
196dbdc160
eliminate DwarfDebug::shouldEmit, which is the same now as MMI::hasDebugInfo
...
llvm-svn: 100386
2010-04-05 03:52:55 +00:00
d2f5062c6d
fix a regression on 2009-08-17-DebugInfo.m
...
llvm-svn: 100385
2010-04-05 03:49:26 +00:00
ab5dc34351
selection dag doesn't need DwarfWriter, remove some tendrils.
...
llvm-svn: 100382
2010-04-05 02:23:33 +00:00
7cfa70e9b3
fastisel doesn't need DwarfWriter, remove some tendricles.
...
llvm-svn: 100381
2010-04-05 02:19:28 +00:00
626cb66fdb
just have all targets create the DwarfWriter.
...
llvm-svn: 100377
2010-04-05 00:42:55 +00:00
eeaa6d67a2
nuke DwarfPrinter
...
llvm-svn: 100375
2010-04-05 00:27:29 +00:00
fd79502e08
make DwarfException not inherit from DwarfPrinter.
...
llvm-svn: 100374
2010-04-05 00:26:50 +00:00
5a00dea332
change SizeOf to take AsmPrinter instead of TargetData,
...
simplifying a bunch of code.
llvm-svn: 100373
2010-04-05 00:18:22 +00:00
3a383cb7d9
1) make DIE take AsmPrinter instead of DwarfPrinter.
...
2) change DwarfDebug to not inherit from DwarfPrinter.
llvm-svn: 100372
2010-04-05 00:13:49 +00:00
aabc6041de
Move EmitFrameMoves into AsmPrinter.
...
llvm-svn: 100371
2010-04-04 23:41:46 +00:00
8423cae590
simplify code and reduce indentation.
...
llvm-svn: 100369
2010-04-04 23:31:58 +00:00
70a4fcea1e
now that the magic is dispelled, move EmitSectionOffset to AsmPrinter.
...
llvm-svn: 100368
2010-04-04 23:25:33 +00:00
324c86600d
eliminate the magic AbsoluteDebugSectionOffsets MAI hook,
...
which is really a property of the section being referenced.
Add a predicate to MCSection to replace it.
Yay for reduction in magic.
llvm-svn: 100367
2010-04-04 23:22:29 +00:00
d442aa368d
only emit section labels if we have debug info, fixing a few
...
regtest failures.
llvm-svn: 100366
2010-04-04 23:17:54 +00:00
e58b547460
I was wrong, ocaml isn't referencing 'Ldata_begin', so remove it.
...
llvm-svn: 100365
2010-04-04 23:10:38 +00:00
0d3f3bdd3c
add some assertions to EmitSectionOffset.
...
llvm-svn: 100364
2010-04-04 23:06:31 +00:00
1fbf53b970
stop emitting some dead L labels.
...
llvm-svn: 100363
2010-04-04 23:02:02 +00:00
6629ca978e
Store an use the symbols emitted at the start of the debug
...
sections instead of magically rematerializing them later.
llvm-svn: 100362
2010-04-04 22:59:04 +00:00
46355d87a8
remove the didInitial ivar, rename emitInitial to be more
...
descriptive, change EmitSectionOffset back to taking a
symbol instead of a string.
llvm-svn: 100361
2010-04-04 22:33:59 +00:00
78528f9a36
simplify EmitSectionOffset a little bit, improve comments.
...
llvm-svn: 100360
2010-04-04 22:25:14 +00:00
Devang Patel