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5623 Commits

Author SHA1 Message Date
Chris Lattner 94d18df658 Add some patterns for ppc64 
llvm-svn: 28866
 2006-06-20 00:38:36 +00:00
Chris Lattner dbec49d574 Remove some ugly now-redundant casts. 
llvm-svn: 28864
 2006-06-20 00:25:29 +00:00
Chris Lattner 55594634d7 Fix some mismatched type constraints 
llvm-svn: 28862
 2006-06-20 00:12:37 +00:00
Evan Cheng cd58e9d8b9 Minor clean up. 
llvm-svn: 28860
 2006-06-19 19:25:30 +00:00
Rafael Espindola a88966fd5e initial implementation of ARMRegisterInfo::eliminateFrameIndex 
fixes test/Regression/CodeGen/ARM/ret_arg5.ll

llvm-svn: 28854
 2006-06-18 00:08:07 +00:00
Evan Cheng a54b9643aa A new entry. 
llvm-svn: 28848
 2006-06-17 00:45:49 +00:00
Chris Lattner 49cadab385 Implement the getPointerRegClass method, which is required for the ptr_rc 
magic to work.

llvm-svn: 28847
 2006-06-17 00:01:04 +00:00
Evan Cheng d2e9a67cd9 Later models likely to have Yonah like attributes. 
llvm-svn: 28843
 2006-06-16 21:58:49 +00:00
Chris Lattner 638ee4ee15 Upgrade some load/store instructions to use the proper addressing mode stuff. 
llvm-svn: 28841
 2006-06-16 21:29:41 +00:00
Chris Lattner e8fe5e2bf4 In 64-bit mode, addr mode operands use G8RC instead of GPRC. 
llvm-svn: 28840
 2006-06-16 21:29:03 +00:00
Chris Lattner a5190ae7a9 fix some assumptions that pointers can only be 32-bits. With this, we can 
now compile:

static unsigned long X;
void test1() {
  X = 0;
}

into:

_test1:
        lis r2, ha16(_X)
        li r3, 0
        stw r3, lo16(_X)(r2)
        blr

Totally amazing :)

llvm-svn: 28839
 2006-06-16 21:01:35 +00:00
Chris Lattner b429983988 Split 64-bit instructions out into a separate .td file 
llvm-svn: 28838
 2006-06-16 20:22:01 +00:00
Chris Lattner 61d703183e Force 64-bit register availability in 64-bit mode. For real. 
llvm-svn: 28837
 2006-06-16 20:05:06 +00:00
Chris Lattner a7d9db2fa5 Remove the -darwin and -aix llc options, inferring darwinism and aixism from 
the target triple & subtarget info.  woo.

llvm-svn: 28835
 2006-06-16 18:50:48 +00:00
Chris Lattner f3b5b92e58 Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.

llvm-svn: 28830
 2006-06-16 18:22:52 +00:00
Chris Lattner 7f043b52ff Remove ctor with each piece specifyable (which causes overload ambiguities), 
add a new init method.

llvm-svn: 28828
 2006-06-16 18:11:26 +00:00
Chris Lattner 16682fff2b Document the subtarget features better, make sure that 64-bit mode, 64-bit 
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)

llvm-svn: 28825
 2006-06-16 17:50:12 +00:00
Chris Lattner a35f306740 Rename some subtarget features. A CPU now can *have* 64-bit instructions, 
can in 32-bit mode we can choose to optionally *use* 64-bit registers.

llvm-svn: 28824
 2006-06-16 17:34:12 +00:00
Chris Lattner 0c4aa14deb First baby step towards ppc64 support. This adds a new -march=ppc64 backend 
that is currently just like ppc32 :)

llvm-svn: 28813
 2006-06-16 01:37:27 +00:00
Chris Lattner cb29586ce4 Add a note that Nate noticed. 
llvm-svn: 28808
 2006-06-15 21:33:31 +00:00
Jim Laskey 19f964e048 1. Support standard dwarf format (was bootstrapping in Apple format.) 
2. Add vector support.

llvm-svn: 28807
 2006-06-15 20:51:43 +00:00
Evan Cheng 66f0e09313 Vector extract / insert index operand should have ptr type. 
llvm-svn: 28798
 2006-06-15 08:19:05 +00:00
Evan Cheng 94bb93f8f7 Type of extract_element index operand should be iPTR. 
llvm-svn: 28797
 2006-06-15 08:18:06 +00:00
Evan Cheng de7156f12c Type of vector extract / insert index operand should be iPTR. 
llvm-svn: 28796
 2006-06-15 08:14:54 +00:00
Evan Cheng c8734381ac X86 call instructions can take variable number of operands. Parameters of 
vector types are passed via XMM registers.

llvm-svn: 28789
 2006-06-14 22:24:55 +00:00
Chris Lattner 37c1c44c14 add a note 
llvm-svn: 28787
 2006-06-14 21:26:18 +00:00
Evan Cheng ca25486603 Add argument registers to the end of call operand list (partial fix). 
llvm-svn: 28783
 2006-06-14 18:17:40 +00:00
Jim Laskey f67bec0579 Place dwarf headers at earliest possible point. Well behaved when skipping 
functions.

llvm-svn: 28781
 2006-06-14 11:35:03 +00:00
Andrew Lenharth 7c69df968c I am sure I had commited this workaround before. Perhaps soon I should sort it all out 
llvm-svn: 28772
 2006-06-13 20:34:47 +00:00
Andrew Lenharth f570feeae3 It really helps to be returning to the correct place 
llvm-svn: 28769
 2006-06-13 18:27:39 +00:00
Chris Lattner c5bb8ab1d5 Port some bugfixes in shift handling from SimplifyDemandedBits over to 
ComputeMaskedBits.  DemandedMasks and KnownZero/One masks should never have
bits set out of the range of the base datatype.

llvm-svn: 28768
 2006-06-13 16:52:37 +00:00
Jim Laskey 8cac9cd5f6 TargetLowering::ComputeMaskedBits was not clearing reciprocal bits on shifts. 
llvm-svn: 28765
 2006-06-13 13:08:58 +00:00
Evan Cheng 17ca732b6a Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov. 
llvm-svn: 28764
 2006-06-13 05:14:44 +00:00
Chris Lattner ac59ab515a Gaar! Don't use r11 for CR save/restore, use R0. R11 can be register 
allocated, thus live across the save/reload.  This fixes

llc-beta /MultiSource/Applications/spiff/spiff
llc-beta /MultiSource/Benchmarks/sim/sim:
llc-beta /MultiSource/Benchmarks/Ptrdist/bc/bc
llc-beta /MultiSource/Benchmarks/McCat/12-IOtest/iotest:
llc-beta /MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow
llc-beta /MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio
llc-beta /MultiSource/Benchmarks/mediabench/g721/g721encode/encode
llc-beta /MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg

and probably others, with -regalloc=local.

llvm-svn: 28761
 2006-06-12 23:59:16 +00:00
Chris Lattner 6b043a24a1 Fix spilling and reloading of CR regs to reload the right values. This fixes 
Olden/power (and probably others) with -regalloc=local.

llvm-svn: 28760
 2006-06-12 21:50:57 +00:00
Andrew Lenharth 80528499cf Let the alpha breakage begin. First Formals and RET. next Calls 
llvm-svn: 28753
 2006-06-12 18:09:24 +00:00
Andrew Lenharth 0e57b2cb92 Start on my todo list 
llvm-svn: 28752
 2006-06-12 16:07:18 +00:00
Rafael Espindola 4e76015e0b lower more then 4 formal arguments. The offset is currently hard coded. 
implement SelectFrameIndex

llvm-svn: 28751
 2006-06-12 12:28:08 +00:00
Chris Lattner b055c8737f Work around a nasty tblgen bug where it doesn't add operands for varargs 
nodes correctly.

llvm-svn: 28745
 2006-06-10 01:15:02 +00:00
Chris Lattner 006b2c6ab9 Fix a problem exposed by the local allocator. CALL instructions are not marked 
as using incoming argument registers, so the local allocator would clobber them
between their set and use.  To fix this, we give the call instructions a variable
number of uses in the CALL MachineInstr itself, so live variables understands
the live ranges of these register arguments.

llvm-svn: 28744
 2006-06-10 01:14:28 +00:00
Evan Cheng beedf824e3 Comments to appease sabre. 
llvm-svn: 28737
 2006-06-09 06:25:10 +00:00
Evan Cheng 0e14a56d35 Minor compilation speed improvement. 
llvm-svn: 28736
 2006-06-09 06:24:42 +00:00
Chris Lattner ba1ed585ee Add support for "m" inline asm constraints. 
llvm-svn: 28728
 2006-06-08 18:03:49 +00:00
Evan Cheng dc614c193e Added X86FunctionInfo subclass of MachineFunction to record whether the 
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.

llvm-svn: 28703
 2006-06-06 23:30:24 +00:00
Chris Lattner 16826c3503 Now that PR633 is implemented, the CBE can know to emit _setjmp/_longjmp 
when available.  This speeds up hexxagon from 18.61s to 16.61s with the CBE on
PPC Mac OS (for reference, LLC is 15.48s and GCC is 23.35s).

llvm-svn: 28697
 2006-06-06 21:45:47 +00:00
Chris Lattner c8587d4b81 Add PowerPC intrinsics to support dcbz[l] 
llvm-svn: 28696
 2006-06-06 21:29:23 +00:00
Rafael Espindola 6306becc49 add R0 to liveout 
expand "ret null" (implements test/Regression/CodeGen/ARM/ret_void.ll)
note that a Flag link is missing between the copy and the branch

llvm-svn: 28691
 2006-06-05 22:26:14 +00:00
Evan Cheng 0f29df98a1 A few new entries. 
llvm-svn: 28683
 2006-06-04 09:08:00 +00:00
Evan Cheng 0de66677e7 Be consistent with gcc. 
llvm-svn: 28682
 2006-06-04 07:24:07 +00:00
Andrew Lenharth b47461350c ignore ordered/unordered for now 
llvm-svn: 28679
 2006-06-04 00:25:51 +00:00
Evan Cheng e8a42360c5 Cygwin support. Patch by Anton Korobeynikov! 
llvm-svn: 28672
 2006-06-02 22:38:37 +00:00
Evan Cheng a2efb9f3ec Use xor to clear a register. 
llvm-svn: 28667
 2006-06-02 21:20:34 +00:00
Evan Cheng 7ae8632cb4 Incorrect AT&T opcode. 
llvm-svn: 28666
 2006-06-02 21:09:10 +00:00
Chris Lattner 8fd1036612 Add mingw support, patch contributed by Anton 
llvm-svn: 28661
 2006-06-02 18:54:01 +00:00
Chris Lattner 4442a70b3a Silence -pedantic warning 
llvm-svn: 28633
 2006-06-01 17:17:06 +00:00
Chris Lattner b47b8a9fad Silence -pedantic warning. 
llvm-svn: 28630
 2006-06-01 17:13:10 +00:00
Evan Cheng 2b2c1be49c Typos 
llvm-svn: 28617
 2006-06-01 05:53:27 +00:00
Reid Spencer 75f29be136 For PR786: 
Don't warn about -pedantic errors. Add a note to the PR instead.

llvm-svn: 28616
 2006-06-01 05:49:51 +00:00
Reid Spencer a62f097c96 For PR786: 
Turn -pedantic and -Wno-long-long compile flags on by default. In a few
places, avoid the warnings by removing these options in the local makefile.
One notable exception: lib/Target/CBackend/Writer.cpp. These warnings are
left on as a reminder to developers to clean them up.

llvm-svn: 28614
 2006-06-01 01:55:21 +00:00
Reid Spencer a647c7ff42 Use archive libraries instead of object files for VMCore, BCReader, 
BCWriter, and bzip2 libraries. Adjust the various makefiles to accommodate
these changes. This was done to speed up link times.

llvm-svn: 28610
 2006-06-01 01:30:27 +00:00
Evan Cheng 2489ccdd90 Remove a warning 
llvm-svn: 28607
 2006-06-01 00:30:39 +00:00
Evan Cheng cfaffdd335 Rename ASM modifier trunc8, trunc16 to subreg8, subreg16. 
llvm-svn: 28606
 2006-05-31 22:34:26 +00:00
Reid Spencer ff82596981 Fix casting so there's no warning on Alpha. 
llvm-svn: 28605
 2006-05-31 22:26:11 +00:00
Evan Cheng cf70c7f42d Sign extender 
llvm-svn: 28603
 2006-05-31 22:05:11 +00:00
Evan Cheng 25e44e008d Rename instructions for consistency sake. 
llvm-svn: 28594
 2006-05-31 19:00:07 +00:00
Evan Cheng 8abf45e22d Select vector_shuffle v1, undef <2, 3, ?, ?> to MOVHLPS. 
llvm-svn: 28582
 2006-05-31 00:51:37 +00:00
Evan Cheng 550cb663e8 Remove dead code. 
llvm-svn: 28581
 2006-05-31 00:50:42 +00:00
Evan Cheng ddced95d8f A new entry 
llvm-svn: 28579
 2006-05-30 23:56:31 +00:00
Evan Cheng 57399704b3 MAXP{D|S} and MINP{D|S} are commutable. 
llvm-svn: 28578
 2006-05-30 23:47:30 +00:00
Evan Cheng c0f90bef47 Commute shufps / shufpd. 
llvm-svn: 28577
 2006-05-30 23:34:30 +00:00
Evan Cheng f21045a5cd Somehow I lost a condition when I was shuffling some code around. Anyway, 
only transform a shufps to pshufd when the first two operands are the same.

llvm-svn: 28575
 2006-05-30 22:13:36 +00:00
Evan Cheng c8c172eaae Fix a build breaker. 
llvm-svn: 28574
 2006-05-30 21:45:53 +00:00
Evan Cheng a4fc5b8699 Oops. PSHUFD is only available with SSE2. 
llvm-svn: 28573
 2006-05-30 21:30:59 +00:00
Chris Lattner a5d4587296 Add a note 
llvm-svn: 28572
 2006-05-30 21:29:15 +00:00
Chris Lattner b9342afa56 Always reserve space for 8 spilled GPRs. GCC apparently assumes that this 
space will be available, even if the callee isn't varargs.

llvm-svn: 28571
 2006-05-30 21:21:04 +00:00
Evan Cheng 66f849bd7b Allow shufps x, x, mask to be converted to pshufd x, mask to save a move. 
llvm-svn: 28565
 2006-05-30 20:26:50 +00:00
Evan Cheng b33e54ead7 Remove bogus comment. 
llvm-svn: 28564
 2006-05-30 20:24:48 +00:00
Rafael Espindola 5bc60da112 Expand ret into "CopyToReg;BRIND" 
llvm-svn: 28559
 2006-05-30 17:33:19 +00:00
Evan Cheng 02420144ab Add a note about integer multiplication by constants. 
llvm-svn: 28551
 2006-05-30 07:37:37 +00:00
Evan Cheng 734e1e241b A addressing mode folding enhancement: 
Fold c2 in (x << c1) | c2 where (c2 < c1)
e.g.
int test(int x) {
  return (x << 3) + 7;
}

This can be codegen'd as:
leal 7(,%eax,8), %eax

llvm-svn: 28550
 2006-05-30 06:59:36 +00:00
Evan Cheng 749138582e Some new entries about truncate / anyext 
llvm-svn: 28548
 2006-05-30 06:23:50 +00:00
Chris Lattner 64d8692dee Ignore generated files 
llvm-svn: 28520
 2006-05-27 01:23:30 +00:00
Evan Cheng a3add0fea8 Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...

llvm-svn: 28510
 2006-05-26 23:10:12 +00:00
Evan Cheng b92f418408 Vector argument must be passed in memory location aligned on 16-byte boundary. 
llvm-svn: 28505
 2006-05-26 20:37:47 +00:00
Evan Cheng bfb5ea6875 Mac OS X ABI document lied. The first four XMM registers are used to pass 
vector arguments, not three.

llvm-svn: 28504
 2006-05-26 19:22:06 +00:00
Evan Cheng a01e799927 Minor update to make the code more clear 
llvm-svn: 28499
 2006-05-26 18:39:59 +00:00
Evan Cheng cbfb3d07e0 Update more comments. 
llvm-svn: 28498
 2006-05-26 18:37:16 +00:00
Evan Cheng 763f9b00f0 Fix some comments. 
llvm-svn: 28497
 2006-05-26 18:25:43 +00:00
Evan Cheng 83dc51d7ff No need to handle illegal types. 
llvm-svn: 28496
 2006-05-26 18:22:49 +00:00
Rafael Espindola 87bc1a9b0b On ARM, alignment is in bits 
Add lr as a hard coded operand of bx

llvm-svn: 28494
 2006-05-26 10:56:17 +00:00
Evan Cheng 70145f2d5e Remove a couple of bogus casts. 
llvm-svn: 28493
 2006-05-26 08:04:31 +00:00
Evan Cheng 29296b844f Minor bug caught by Ashwin Chandra 
llvm-svn: 28491
 2006-05-26 06:22:34 +00:00
Evan Cheng 8aca43e8da Consistency 
llvm-svn: 28488
 2006-05-25 23:31:23 +00:00
Evan Cheng 0421aca87a Some clean up. 
llvm-svn: 28483
 2006-05-25 22:38:31 +00:00
Chris Lattner dc1614d93e Add support for the missing FP condition codes 
llvm-svn: 28482
 2006-05-25 22:26:02 +00:00
Evan Cheng 29f805ec65 Remove some dead code. 
llvm-svn: 28481
 2006-05-25 22:25:52 +00:00
Evan Cheng 2554e3d9ba X86 / Cygwin asm / alignment fixes. 
Patch contributed by Anton Korobeynikov!

llvm-svn: 28480
 2006-05-25 21:59:08 +00:00
Evan Cheng 5ee96893ae Build breakage. 
llvm-svn: 28475
 2006-05-25 18:56:34 +00:00
Chris Lattner 1fbb0d38c7 Fix build failure of povray 
llvm-svn: 28473
 2006-05-25 18:06:16 +00:00
Chris Lattner 630bbcef8d Fix Benchmarks/MallocBench/cfrac 
llvm-svn: 28471
 2006-05-25 16:54:16 +00:00
Rafael Espindola 91df1ef41f implement initial version of ARMAsmPrinter::printOperand 
llvm-svn: 28470
 2006-05-25 12:57:06 +00:00
Rafael Espindola 4781610886 port the ARM backend to use ISD::CALL instead of LowerCallTo 
llvm-svn: 28469
 2006-05-25 11:00:18 +00:00
Evan Cheng 2a33094284 Switch X86 over to a call-selection model where the lowering code creates 
the copyto/fromregs instead of making the X86ISD::CALL selection code create
them.

llvm-svn: 28463
 2006-05-25 00:59:30 +00:00
Evan Cheng c2cd473d9b CALL node change (arg / sign pairs instead of just arguments). 
llvm-svn: 28462
 2006-05-25 00:57:32 +00:00
Evan Cheng 4af59dac0b Assert if InflightSet is not cleared after instruction selecting a BB. 
llvm-svn: 28459
 2006-05-25 00:24:28 +00:00
Evan Cheng 1a8e74d113 Clear HandleMap and ReplaceMap after instruction selection. Or it may cause 
non-deterministic behavior.

llvm-svn: 28454
 2006-05-24 20:46:25 +00:00
Reid Spencer 6e64180f03 For PR786: 
Minor tweaks in public headers and a few .cpp files so that LLVM can build
successfully with -pedantic and projects using LLVM with -pedantic don't
get warnings from LLVM. There's still more -pedantic warnings to fix.

llvm-svn: 28453
 2006-05-24 19:21:13 +00:00
Reid Spencer 94531bf367 For PR786: 
Remove a spurious ;

llvm-svn: 28452
 2006-05-24 19:05:21 +00:00
Chris Lattner aa2372562e Patches to make the LLVM sources more -pedantic clean. Patch provided 
by Anton Korobeynikov!  This is a step towards closing PR786.

llvm-svn: 28447
 2006-05-24 17:04:05 +00:00
Chris Lattner 33165c246c Fix CodeGen/Generic/vector.ll:test_div with altivec. 
llvm-svn: 28445
 2006-05-24 00:15:25 +00:00
Chris Lattner b56d22c2f6 Handle SETO* like we handle SET*, restoring behavior after Evan's setcc 
change.  This fixes PowerPC/fnegsel.ll.

llvm-svn: 28443
 2006-05-24 00:06:44 +00:00
Chris Lattner de177e016e Print struct return functions and calls as actually returning the hidden 
argument struct pointer, enabling ABI compatibility for the CBE with
platforms with strange struct-return ABIs.  This fixes 252.eon and
CoyoteBench/fftbench on Darwin/X86 among other things.

llvm-svn: 28442
 2006-05-23 23:39:48 +00:00
Chris Lattner a58f559848 Fix file header comment 
llvm-svn: 28441
 2006-05-23 23:20:42 +00:00
Evan Cheng 7068a93cae Better way to check for vararg. 
llvm-svn: 28440
 2006-05-23 21:08:24 +00:00
Evan Cheng 17e734f0a6 Remove PreprocessCCCArguments and PreprocessFastCCArguments now that 
FORMAL_ARGUMENTS nodes include a token operand.

llvm-svn: 28439
 2006-05-23 21:06:34 +00:00
Chris Lattner 8be5be817c Implement an annoying part of the Darwin/X86 abi: the callee of a struct 
return argument pops the hidden struct pointer if present, not the caller.

For example, in this testcase:

struct X { int D, E, F, G; };
struct X bar() {
  struct X a;
  a.D = 0;
  a.E = 1;
  a.F = 2;
  a.G = 3;
  return a;
}
void foo(struct X *P) {
  *P = bar();
}

We used to emit:

_foo:
        subl $28, %esp
        movl 32(%esp), %eax
        movl %eax, (%esp)
        call _bar
        addl $28, %esp
        ret
_bar:
        movl 4(%esp), %eax
        movl $0, (%eax)
        movl $1, 4(%eax)
        movl $2, 8(%eax)
        movl $3, 12(%eax)
        ret

This is correct on Linux/X86 but not Darwin/X86.  With this patch, we now
emit:

_foo:
        subl $28, %esp
        movl 32(%esp), %eax
        movl %eax, (%esp)
        call _bar
***     addl $24, %esp
        ret
_bar:
        movl 4(%esp), %eax
        movl $0, (%eax)
        movl $1, 4(%eax)
        movl $2, 8(%eax)
        movl $3, 12(%eax)
***     ret $4

For the record, GCC emits (which is functionally equivalent to our new code):

_bar:
        movl    4(%esp), %eax
        movl    $3, 12(%eax)
        movl    $2, 8(%eax)
        movl    $1, 4(%eax)
        movl    $0, (%eax)
        ret     $4
_foo:
        pushl   %esi
        subl    $40, %esp
        movl    48(%esp), %esi
        leal    16(%esp), %eax
        movl    %eax, (%esp)
        call    _bar
        subl    $4, %esp
        movl    16(%esp), %eax
        movl    %eax, (%esi)
        movl    20(%esp), %eax
        movl    %eax, 4(%esi)
        movl    24(%esp), %eax
        movl    %eax, 8(%esi)
        movl    28(%esp), %eax
        movl    %eax, 12(%esi)
        addl    $40, %esp
        popl    %esi
        ret

This fixes SingleSource/Benchmarks/CoyoteBench/fftbench with LLC and the
JIT, and fixes the X86-backend portion of PR729.  The CBE still needs to
be updated.

llvm-svn: 28438
 2006-05-23 18:50:38 +00:00
Evan Cheng ac4f66ff24 -enable-unsafe-fp-math implies -enable-finite-only-fp-math 
llvm-svn: 28437
 2006-05-23 18:18:46 +00:00
Evan Cheng ea1450742e Added option -enable-finite-only-fp-math. When on, the codegen can assume that 
FP arithmetic arguments and results are never NaNs or +=Infs. This includes
ignoring parity flag (PF) when checking for FP equality.

llvm-svn: 28432
 2006-05-23 06:39:12 +00:00
Rafael Espindola 27f8bdc7e5 implement minimal versions of 
ARMAsmPrinter::runOnMachineFunction
LowerFORMAL_ARGUMENTS
ARMInstrInfo::isMoveInstr

llvm-svn: 28431
 2006-05-23 02:48:20 +00:00
Evan Cheng 26ba25f910 A isel deficiency. 
llvm-svn: 28427
 2006-05-22 05:54:49 +00:00
Evan Cheng 85b6232b53 Back out indirect branch load folding hack. It broke some tests. 
llvm-svn: 28425
 2006-05-21 06:28:50 +00:00
Chris Lattner 80b0a70911 Add a note 
llvm-svn: 28424
 2006-05-21 03:57:07 +00:00
Owen Anderson 80b1b4d41e Make TargetData strings less redundant. 
llvm-svn: 28423
 2006-05-20 23:28:54 +00:00
Chris Lattner 482fb65144 Fix a parsing bug that caused 7 llvm-test regressions on PPC last night. 
I'm suprised it didn't cause more!

llvm-svn: 28421
 2006-05-20 21:16:59 +00:00
Evan Cheng 401049ce33 - Use of load's chain result should be redirected to load's chain operand. 
If it reads the chain result of the call, then the use, callseq_start,
  and call would form a cycle!
- Don't forget handle node replacement!
- There could also be a TokenFactor between the load and the callseq_start.

llvm-svn: 28420
 2006-05-20 09:21:39 +00:00
Evan Cheng 0643f902be A new entry 
llvm-svn: 28419
 2006-05-20 07:44:53 +00:00
Evan Cheng a26c451fa2 Missing break statements. 
llvm-svn: 28418
 2006-05-20 07:44:28 +00:00
Evan Cheng b9ac06bb33 Remove unused patterns. 
llvm-svn: 28417
 2006-05-20 01:40:16 +00:00
Evan Cheng f838cfcfbe Handle indirect call which folds a load manually. This never matches by 
the TableGen generated code since the load's chain result is read by
the callseq_start node.

llvm-svn: 28416
 2006-05-20 01:36:52 +00:00
Owen Anderson f7db631b7d Sparc is big-endian. 
llvm-svn: 28415
 2006-05-20 00:49:30 +00:00
Owen Anderson 88812b5c0a Make all of the TargetMachine subclasses use the new string TargetData methods. 
This is part of the on-going work on PR 761.

llvm-svn: 28414
 2006-05-20 00:24:56 +00:00
Chris Lattner 01dd6df5f3 CSRet allows varargs 
llvm-svn: 28409
 2006-05-19 21:34:04 +00:00
Chris Lattner 29d7bded45 Add a note 
llvm-svn: 28402
 2006-05-19 21:01:38 +00:00
Chris Lattner b22eb6304f Add a note 
llvm-svn: 28401
 2006-05-19 20:55:31 +00:00
Chris Lattner 17f1f1a56c Split the SSE readme items out into their own README. 
llvm-svn: 28400
 2006-05-19 20:51:43 +00:00
Chris Lattner 427ea6f0a7 Split FP-stack notes out of the main readme. Next up: splitting out SSE. 
llvm-svn: 28399
 2006-05-19 20:45:52 +00:00
Chris Lattner 240f846495 Move a target-independent note out of the X86 readme. 
llvm-svn: 28398
 2006-05-19 20:45:08 +00:00
Chris Lattner d6a25a08d1 Particularly ugly code. 
llvm-svn: 28397
 2006-05-19 19:41:33 +00:00
Evan Cheng feca91a516 These can be transformed into lea as well. Not that we use this feature 
currently...

llvm-svn: 28393
 2006-05-19 18:43:41 +00:00
Evan Cheng 7b8feb27c8 - Use exact-width integer types, e.g. int32_t, to avoid confusion. 
- Fix a couple of minor bugs in i16immSExt8 and i16immZExt8.
- Added loadiPTR fragment used for indirect jumps and calls.

llvm-svn: 28392
 2006-05-19 18:40:54 +00:00
Evan Cheng 1c8ef9832f Explicitly specify MOV32mi can only be used store 32-bit GV, etc. 
llvm-svn: 28390
 2006-05-19 07:30:36 +00:00
Rafael Espindola b15597b59a implement movri 
add a stub LowerFORMAL_ARGUMENTS

llvm-svn: 28388
 2006-05-18 21:45:49 +00:00
Evan Cheng f3cbd7ef31 Added a Flags field to TargetOperandInfo. Currently the only flag is 
M_LOOK_UP_PTR_REG_CLASS which allows the register class of the operand to be
resolved via a callback at runtime.

llvm-svn: 28387
 2006-05-18 20:44:26 +00:00
Chris Lattner 4cda95b32f add a note 
llvm-svn: 28384
 2006-05-18 18:26:13 +00:00
Chris Lattner f66e89721d add a note 
llvm-svn: 28383
 2006-05-18 17:38:16 +00:00
Andrew Lenharth b90055ef24 Fix a bogus gcc warning 
llvm-svn: 28382
 2006-05-18 17:29:34 +00:00
Evan Cheng 03524c63ff ImmMask should be 3 for a two-bit field; Compact X86II 
llvm-svn: 28381
 2006-05-18 06:27:15 +00:00
Evan Cheng 305c49579c getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
llvm-svn: 28378
 2006-05-18 00:12:58 +00:00
Evan Cheng 297e1cb10a Remove CalleeSavedRegisters from class Target. 
llvm-svn: 28377
 2006-05-18 00:09:53 +00:00
Owen Anderson fc08d5a2a8 Fix a stupid bug when parsing TargetData strings. 
llvm-svn: 28373
 2006-05-17 21:56:02 +00:00