ca95a5f49f
Remove the code from CodeGenPrepare that moved getresult instructions
...
to the block that defines their operands. This doesn't work in the
case that the operand is an invoke, because invoke is a terminator
and must be the last instruction in a block.
Replace it with support in SelectionDAGISel for copying struct values
into sequences of virtual registers.
llvm-svn: 50279
2008-04-25 18:27:55 +00:00
b58a365cb6
new testcase
...
llvm-svn: 50274
2008-04-25 18:11:06 +00:00
f18ec8b160
Update test
...
llvm-svn: 50272
2008-04-25 17:54:21 +00:00
4d43d3c72c
Remove 'unwinds to' support from mainline. This patch undoes r47802 r47989
...
r48047 r48084 r48085 r48086 r48088 r48096 r48099 r48109 and r48123.
llvm-svn: 50265
2008-04-25 16:53:59 +00:00
df38b35a1e
MMX argument passing fixes:
...
On Darwin / Linux x86-32, v8i8, v4i16, v2i32 values are passed in MM[0-2].
On Darwin / Linux x86-32, v1i64 values are passed in memory.
On Darwin x86-64, v8i8, v4i16, v2i32 values are passed in XMM[0-7].
On Darwin x86-64, v1i64 values are passed in 64-bit GPRs.
llvm-svn: 50257
2008-04-25 07:56:45 +00:00
741c7a3b49
Loosen up an assertion to allow intrinsics. I really have no
...
idea what this code (findNonImmUse) does, so I'm only guessing
that this is the right thing. It would be really really nice
if this had comments and perhaps switched to SmallPtrSet
(hint hint) :)
This fixes rdar://5886601, a crash on gcc.target/i386/sse4_1-pblendw.c
llvm-svn: 50252
2008-04-25 05:13:01 +00:00
f7de528463
Don't infininitely thread branches when a threaded edge
...
goes back to the block, e.g.:
Threading edge through bool from 'bb37.us.thread3829' to 'bb37.us' with cost: 1, across block:
bb37.us: ; preds = %bb37.us.thread3829, %bb37.us, %bb33
%D1361.1.us = phi i32 [ %tmp36, %bb33 ], [ %D1361.1.us, %bb37.us ], [ 0, %bb37.us.thread3829 ] ; <i32> [#uses=2]
%tmp39.us = icmp eq i32 %D1361.1.us, 0 ; <i1> [#uses=1]
br i1 %tmp39.us, label %bb37.us, label %bb42.us
llvm-svn: 50251
2008-04-25 04:12:29 +00:00
9165e165dc
Fix bug in x86 memcpy / memset lowering. If there are trailing bytes not handled by rep instructions, a new memcpy / memset is introduced for them. However, since source / destination addresses are already adjusted, their offsets should be zero.
...
llvm-svn: 50239
2008-04-25 00:26:43 +00:00
a42d24003d
New test.
...
llvm-svn: 50229
2008-04-24 20:01:58 +00:00
f7c3979bb0
Add EXTRA_OPTIONS on the llvmgxx command line.
...
llvm-svn: 50217
2008-04-24 17:59:03 +00:00
1a5cfb05b5
Add EXTRA_OPTIONS on the llvmgcc command line.
...
llvm-svn: 50216
2008-04-24 17:54:25 +00:00
86bbf338e5
Split some code out of the main SimplifyCFG loop into its own function.
...
Fix said code to handle merging return instructions together correctly
when handling multiple return values.
llvm-svn: 50199
2008-04-24 00:01:19 +00:00
3aec21fa0e
Fix tests due to llvm2cpp move to llc target
...
llvm-svn: 50191
2008-04-23 22:41:53 +00:00
b418aafabf
Add support to codegen for getresult instructions with undef operands.
...
llvm-svn: 50180
2008-04-23 20:21:29 +00:00
dd4ef2e30c
Disable stack realignment for these tests
...
llvm-svn: 50172
2008-04-23 18:25:44 +00:00
c3ada5c9c4
Fix test becase ABI stack alignment dropped to 'normal' value
...
llvm-svn: 50171
2008-04-23 18:25:16 +00:00
955a8a9101
Fix test, instruction count is valid only if stack is not realigned
...
llvm-svn: 50170
2008-04-23 18:24:48 +00:00
5a58a4dc6d
Rewrite multiple return value handling in SCCP. Before, the -sccp pass
...
would turn every getresult instruction into undef. This helps with
rdar://5778210
llvm-svn: 50140
2008-04-23 05:38:20 +00:00
14f41bfc49
remove this testcase. It isn't testing loop rotate, it is testing all
...
of -std-compile-opts and is now failing because other passes are generating
IR that looks different to input of loop rotate. Devang, please
introduce a testcase that only runs loop rotate.
llvm-svn: 50136
2008-04-23 05:36:04 +00:00
f9a4e4d723
returning an empty multiple return list is not valid.
...
llvm-svn: 50135
2008-04-23 05:29:14 +00:00
3376d6d824
make this test more interesting.
...
llvm-svn: 50128
2008-04-23 03:49:32 +00:00
2161d6c075
distill down the essense of this test.
...
llvm-svn: 50125
2008-04-23 03:03:42 +00:00
c4d3c1cbe0
new test
...
llvm-svn: 50123
2008-04-23 01:22:22 +00:00
1c89ca7295
Don't do: "(X & 4) >> 1 == 2 --> (X & 4) == 4" if there are more than one uses of the shift result.
...
llvm-svn: 50118
2008-04-23 00:38:06 +00:00
37e9c187b0
Start doing the significantly useful part of jump threading: handle cases
...
where a comparison has a phi input and that phi is a constant. For example,
stuff like:
Threading edge through bool from 'bb2149' to 'bb2231' with cost: 1, across block:
bb2237: ; preds = %bb2231, %bb2149
%tmp2328.rle = phi i32 [ %tmp2232, %bb2231 ], [ %tmp2232439, %bb2149 ] ; <i32> [#uses=2]
%done.0 = phi i32 [ %done.2, %bb2231 ], [ 0, %bb2149 ] ; <i32> [#uses=1]
%tmp2239 = icmp eq i32 %done.0, 0 ; <i1> [#uses=1]
br i1 %tmp2239, label %bb2231, label %bb2327
or
bb38.i298: ; preds = %bb33.i295, %bb1693
%tmp39.i296.rle = phi %struct.ibox* [ null, %bb1693 ], [ %tmp39.i296.rle1109, %bb33.i295 ] ; <%struct.ibox*> [#uses=2]
%minspan.1.i291.reg2mem.1 = phi i32 [ 32000, %bb1693 ], [ %minspan.0.i288, %bb33.i295 ] ; <i32> [#uses=1]
%tmp40.i297 = icmp eq %struct.ibox* %tmp39.i296.rle, null ; <i1> [#uses=1]
br i1 %tmp40.i297, label %implfeeds.exit311, label %bb43.i301
This triggers thousands of times in spec.
llvm-svn: 50110
2008-04-22 21:40:39 +00:00
d5425e8f8d
Dig through multiple levels of AND to thread jumps if needed.
...
llvm-svn: 50106
2008-04-22 20:46:09 +00:00
3df4c15dc7
Teach jump threading to thread through blocks like:
...
br (and X, phi(Y, Z, false)), label L1, label L2
This triggers once on 252.eon and 6 times on 176.gcc. Blocks
in question often look like this:
bb262: ; preds = %bb261, %bb248
%iftmp.251.0 = phi i1 [ true, %bb261 ], [ false, %bb248 ] ; <i1> [#uses=4]
%tmp270 = icmp eq %struct.rtx_def* %tmp.0.i, null ; <i1> [#uses=1]
%bothcond = or i1 %iftmp.251.0, %tmp270 ; <i1> [#uses=1]
br i1 %bothcond, label %bb288, label %bb273
In this case, it is clear that it doesn't matter if tmp.0.i is null when coming from bb261. When coming from bb248, it is all that matters.
Another random example:
check_asm_operands.exit: ; preds = %check_asm_operands.exit.thr_comm, %bb30.i, %bb12.i, %bb6.i413
%tmp.0.i420 = phi i1 [ true, %bb6.i413 ], [ true, %bb12.i ], [ true, %bb30.i ], [ false, %check_asm_operands.exit.thr_comm ; <i1> [#uses=1]
call void @llvm.stackrestore( i8* %savedstack ) nounwind
%tmp4389 = icmp eq i32 %added_sets_1.0, 0 ; <i1> [#uses=1]
%tmp4394 = icmp eq i32 %added_sets_2.0, 0 ; <i1> [#uses=1]
%bothcond80 = and i1 %tmp4389, %tmp4394 ; <i1> [#uses=1]
%bothcond81 = and i1 %bothcond80, %tmp.0.i420 ; <i1> [#uses=1]
br i1 %bothcond81, label %bb4398, label %bb4397
Here is the case from 252.eon:
bb290.i.i: ; preds = %bb23.i57.i.i, %bb8.i39.i.i, %bb100.i.i, %bb100.i.i, %bb85.i.i110
%myEOF.1.i.i = phi i1 [ true, %bb100.i.i ], [ true, %bb100.i.i ], [ true, %bb85.i.i110 ], [ true, %bb8.i39.i.i ], [ false, %bb23.i57.i.i ] ; <i1> [#uses=2]
%i.4.i.i = phi i32 [ %i.1.i.i, %bb85.i.i110 ], [ %i.0.i.i, %bb100.i.i ], [ %i.0.i.i, %bb100.i.i ], [ %i.3.i.i, %bb8.i39.i.i ], [ %i.3.i.i, %bb23.i57.i.i ] ; <i32> [#uses=3]
%tmp292.i.i = load i8* %tmp16.i.i100, align 1 ; <i8> [#uses=1]
%tmp293.not.i.i = icmp ne i8 %tmp292.i.i, 0 ; <i1> [#uses=1]
%bothcond.i.i = and i1 %tmp293.not.i.i, %myEOF.1.i.i ; <i1> [#uses=1]
br i1 %bothcond.i.i, label %bb202.i.i, label %bb301.i.i
Factoring out 3 common predecessors.
On the path from any blocks other than bb23.i57.i.i, the load and compare
are dead.
llvm-svn: 50096
2008-04-22 07:05:46 +00:00
3cc28ce1ed
add a basic testcase.
...
llvm-svn: 50093
2008-04-22 06:35:14 +00:00
cd92245311
Start removing 'unwinds to' support from mainline in preparation for 2.3.
...
llvm-svn: 50086
2008-04-22 05:16:02 +00:00
c3a439351c
optimize "p != gep p, ..." better. This allows us to compile
...
getelementptr-seteq.ll into:
define i1 @test(i64 %X, %S* %P) {
%C = icmp eq i64 %X, -1 ; <i1> [#uses=1]
ret i1 %C
}
instead of:
define i1 @test(i64 %X, %S* %P) {
%A.idx.mask = and i64 %X, 4611686018427387903 ; <i64> [#uses=1]
%C = icmp eq i64 %A.idx.mask, 4611686018427387903 ; <i1> [#uses=1]
ret i1 %C
}
And fixes the second half of PR2235. This speeds up the insertion sort
case by 45%, from 1.12s to 0.77s. In practice, this will significantly
speed up for loops structured like:
for (double *P = Base + N; P != Base; --P)
...
Which happens frequently for C++ iterators.
llvm-svn: 50079
2008-04-22 02:53:33 +00:00
f166d2d0d6
Implement an x86-64 ABI detail of passing structs by hidden first
...
argument. The x86-64 ABI requires the incoming value of %rdi to
be copied to %rax on exit from a function that is returning a
large C struct.
Also, add a README-X86-64 entry detailing the missed optimization
opportunity and proposing an alternative approach.
llvm-svn: 50075
2008-04-21 23:59:07 +00:00
db70198618
Make these structs larger to ensure that they
...
are returned by struct return.
llvm-svn: 50038
2008-04-21 08:17:05 +00:00
568e5c2461
Make the struct bigger, to ensure it is returned
...
by struct return.
llvm-svn: 50037
2008-04-21 08:12:03 +00:00
6a7355caa2
Refactor memcpyopt based on Chris' suggestions. Consolidate several functions
...
and simplify code that was fallout from the separation of memcpyopt and gvn.
llvm-svn: 50034
2008-04-21 07:45:10 +00:00
470ab00c76
A better fix for my previous patch, MOVZQI2PQIrr just requires SSE2.
...
llvm-svn: 49986
2008-04-20 05:52:46 +00:00
a124f1e219
Not all x86-64 machines have sse3 apparently.
...
llvm-svn: 49985
2008-04-20 05:47:56 +00:00
b839c05a05
rename *.llx -> *.ll, last batch.
...
llvm-svn: 49971
2008-04-19 22:32:52 +00:00
50fb77f829
rename *.llx -> *.ll
...
llvm-svn: 49970
2008-04-19 22:29:10 +00:00
fe48fbc1f1
rename *.llx -> *.ll
...
llvm-svn: 49969
2008-04-19 22:26:29 +00:00
bc26e1bb8a
Implement PR2206.
...
llvm-svn: 49967
2008-04-19 22:17:26 +00:00
334d33cad1
refactor handling of symbolic constant folding, picking up
...
a few new cases( see Integer/a1.ll), but not anything that
would happen in practice.
llvm-svn: 49965
2008-04-19 21:58:19 +00:00
5102bd9359
64-bit atomic operations.
...
llvm-svn: 49949
2008-04-19 02:30:38 +00:00
41eb949aaf
Teach llvm-as to accept function types with multiple return types.
...
llvm-svn: 49945
2008-04-19 00:24:39 +00:00
7e4a55bc58
Be more careful with insert_subreg and extract_subreg where either source or destination operand has already been coalesced with another register that's defined by a insert_subreg or extract_subreg.
...
llvm-svn: 49843
2008-04-17 07:58:04 +00:00
f9ae76d89c
Make GVN able to remove unnecessary calls to read-only functions again.
...
llvm-svn: 49842
2008-04-17 05:36:50 +00:00
c8c3a899c0
Fix a sub-register indice propagation bug.
...
llvm-svn: 49832
2008-04-17 00:06:42 +00:00
147cb764b5
Don't forget about sub-register indices when rematting instructions.
...
llvm-svn: 49830
2008-04-16 23:44:44 +00:00
59aa126e48
After reading memory that's already freed.
...
llvm-svn: 49810
2008-04-16 20:24:25 +00:00
7b989d853e
Really test what's intended.
...
llvm-svn: 49802
2008-04-16 18:21:55 +00:00
e45b8f89c5
Rewrite LiveVariable liveness computation. The new implementation is much simplified. It eliminated the nasty recursive routines and removed the partial def / use bookkeeping. There is also potential for performance improvement by replacing the conservative handling of partial physical register definitions. The code is currently disabled until live interval analysis is taught of the name scheme.
...
This patch also fixed a couple of nasty corner cases.
llvm-svn: 49784
2008-04-16 09:46:40 +00:00
81f7584c4e
XFAIL this test for the moment. The real solution is to prevent ADCE
...
from transforming loops and adding a separate loop pass for removing
loops with know trip counts. Until that happens, ADCE is miscompiling this code.
llvm-svn: 49769
2008-04-16 04:25:42 +00:00
d43d3beeb0
Add support for the form of the SSE41 extractps instruction that
...
puts its result in a 32-bit GPR.
llvm-svn: 49762
2008-04-16 02:32:24 +00:00
8c99ccaf96
Recreate the size SDNode instead of reusing the old one in the x86
...
memcpy lowering code; this ensures that the size node has the desired
result type. This fixes a regression from r49572 with @llvm.memcpy.i64
on x86-32.
llvm-svn: 49761
2008-04-16 01:32:32 +00:00
01a5d36d9d
Add movd instructions to move from MMX registers
...
to 64-bit GPR registers on x86-64.
llvm-svn: 49757
2008-04-15 23:55:07 +00:00
8fc8a272e0
Don't assume a tail call can't reference a byval
...
argument to the outer function, this isn't correct.
llvm-svn: 49731
2008-04-15 17:41:34 +00:00
4370f26750
Treat EntryToken nodes as "passive" so that they aren't added to the
...
ScheduleDAG; they don't correspond to any actual instructions so they
don't need to be scheduled.
This fixes a bug where the EntryToken was being scheduled multiple
times in some cases, though it ended up not causing any trouble because
EntryToken doesn't expand into anything. With this fixed the schedulers
reliably schedule the expected number of units, so we can check this
with an assertion.
This requires a tweak to test/CodeGen/X86/loop-hoist.ll because it
ends up getting scheduled differently in a trivial way, though it was
enough to fool the prcontext+grep that the test does.
llvm-svn: 49701
2008-04-15 01:22:18 +00:00
b37dab1360
Upgrade these tests for the current intrinsic prototypes.
...
llvm-svn: 49669
2008-04-14 18:19:18 +00:00
ea3aa5bf11
Remove -unwind-tables-optional everywhere, since
...
this is now the default.
llvm-svn: 49667
2008-04-14 17:56:54 +00:00
b1e8bf2cad
The functionality being tested was removed because it was horribly unsafe.
...
llvm-svn: 49610
2008-04-13 09:51:06 +00:00
634fc9a33a
This patch corrects the handling of byval arguments for tailcall
...
optimized x86-64 (and x86) calls so that they work (... at least for
my test cases).
Should fix the following problems:
Problem 1: When i introduced the optimized handling of arguments for
tail called functions (using a sequence of copyto/copyfrom virtual
registers instead of always lowering to top of the stack) i did not
handle byval arguments correctly e.g they did not work at all :).
Problem 2: On x86-64 after the arguments of the tail called function
are moved to their registers (which include ESI/RSI etc), tail call
optimization performs byval lowering which causes xSI,xDI, xCX
registers to be overwritten. This is handled in this patch by moving
the arguments to virtual registers first and after the byval lowering
the arguments are moved from those virtual registers back to
RSI/RDI/RCX.
llvm-svn: 49584
2008-04-12 18:11:06 +00:00
544ab2c50b
Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
...
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.
Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.
This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.
Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.
This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.
llvm-svn: 49572
2008-04-12 04:36:06 +00:00
8c7cf88f7e
Fix a bug that prevented x86-64 from using rep.movsq for
...
8-byte-aligned data.
llvm-svn: 49571
2008-04-12 02:35:39 +00:00
33281864c1
If a PHI node has a single implicit_def source, replace it with an implicit_def instead of a copy.
...
llvm-svn: 49543
2008-04-11 17:54:45 +00:00
90bde997b3
Add testcase for PR2213.
...
llvm-svn: 49517
2008-04-11 05:13:32 +00:00
b53d560150
New test.
...
llvm-svn: 49514
2008-04-10 23:49:09 +00:00
99b7b3f03b
Teach InstCombine's ComputeMaskedBits to handle pointer expressions
...
in addition to integer expressions. Rewrite GetOrEnforceKnownAlignment
as a ComputeMaskedBits problem, moving all of its special alignment
knowledge to ComputeMaskedBits as low-zero-bits knowledge.
Also, teach ComputeMaskedBits a few basic things about Mul and PHI
instructions.
This improves ComputeMaskedBits-based simplifications in a few cases,
but more noticeably it significantly improves instcombine's alignment
detection for loads, stores, and memory intrinsics.
llvm-svn: 49492
2008-04-10 18:43:06 +00:00
16ea87d6ee
A copy instruction may use a register multiple times on some targets. Change them all.
...
llvm-svn: 49491
2008-04-10 18:38:47 +00:00
ad75302497
Fix the x86-64 side of PR2108 by adding a v2f64 version of
...
MOVZQI2PQIrr. This would be better handled as a dag combine
(with the goal of eliminating the bitconvert) but I don't know
how to do that safely. Thoughts welcome.
llvm-svn: 49463
2008-04-10 05:13:43 +00:00
9d339849ee
Teach branch folding pass about implicit_def instructions. Unfortunately we can't just eliminate them since register scavenger expects every register use to be defined. However, we can delete them when there are no intra-block uses. Carefully removing some implicit def's which enable more blocks to be optimized away.
...
llvm-svn: 49461
2008-04-10 02:32:10 +00:00
c8eeb752a3
- More aggressively coalescing away copies whose source is defined by an implicit_def.
...
- Added insert_subreg coalescing support.
llvm-svn: 49448
2008-04-09 20:57:25 +00:00
802134fc02
Generalize getUnaryFloatFunction to handle any FP unary function, automatically
...
figuring out the suffix to use. implement pow(2,x) -> exp2(x).
llvm-svn: 49437
2008-04-09 17:48:11 +00:00
091afc7714
remove capital letter from test name.
...
llvm-svn: 49436
2008-04-09 17:46:36 +00:00
ef9a6fd5c2
Factor a bunch of functionality related to memcpy and memset transforms out of
...
GVN and into its own pass.
llvm-svn: 49419
2008-04-09 08:23:16 +00:00
aa3b55f842
Missed a hasInterval check.
...
llvm-svn: 49415
2008-04-09 01:30:15 +00:00
b859fb49ed
many cleanups to the pow optimizer. Allow it to handle powf,
...
add support for pow(x, 2.0) -> x*x.
llvm-svn: 49411
2008-04-09 00:07:45 +00:00
470ab1a04d
Check that bodies and calls but not declarations
...
are marked nounwind when compiling without
-fexceptions.
llvm-svn: 49393
2008-04-08 19:31:52 +00:00
5169fa17b5
Rename -disable-required-unwind-tables to -unwind-tables-optional.
...
llvm-svn: 49391
2008-04-08 18:10:08 +00:00
00fcdeddd3
merge r48768 from branches/ggreif/parallelized-test
...
llvm-svn: 49382
2008-04-08 15:22:41 +00:00
399c0e63af
Missed one.
...
llvm-svn: 49365
2008-04-08 00:14:59 +00:00
da298f9107
Add -disable-required-unwind-tables to tests
...
that need it (usually, grepping for some string
found in unwind info)
llvm-svn: 49364
2008-04-08 00:14:17 +00:00
d6481955db
Testcase for pr2169.
...
llvm-svn: 49344
2008-04-07 17:03:16 +00:00
7b93268305
Fix test.
...
llvm-svn: 49343
2008-04-07 17:02:18 +00:00
5bd2f736e6
fix this testcase to pass and remove a duplicate instance of itself.
...
llvm-svn: 49281
2008-04-06 21:39:17 +00:00
613d7afe64
Prefer to expand mask for xor to -1, so we have a chance to turn it into a not.
...
If it cannot be expanded, it will keep the old behaviour and try to shrink the constant.
Part of enhancement for PR2191.
llvm-svn: 49280
2008-04-06 21:23:02 +00:00
b5fdc923d3
1. IMPLICIT_DEF can *re-define* any register.
...
2. Coalescer can now create an interesting situation where a register def can
reaches itself without being killed.
llvm-svn: 49246
2008-04-05 01:27:09 +00:00
f77b5ef3d0
Favors pshufd over shufps when shuffling elements from one vector. pshufd is faster than shufps.
...
llvm-svn: 49244
2008-04-05 00:30:36 +00:00
4b9a2c0b59
New test case.
...
llvm-svn: 49190
2008-04-03 21:25:03 +00:00
5316aebeb6
Testcase for EH with functions whose names are stripped.
...
llvm-svn: 49111
2008-04-02 20:16:41 +00:00
980d7200c1
Speculatively micro-optimize memory-zeroing calls on Darwin 10.
...
llvm-svn: 49048
2008-04-01 20:38:36 +00:00
0bd72c5ccd
More soft fp fixes.
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llvm-svn: 49016
2008-04-01 02:18:22 +00:00
86e476b7cb
Unbreak ARM / Thumb soft FP support.
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llvm-svn: 49012
2008-04-01 01:50:16 +00:00
0de94a1712
Mark functions in some tests as 'nounwind'. Generating
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EH info for these functions causes the tests to fail for
random reasons (e.g. looking for 'or' or counting lines
with asm-printer; labels count as lines.)
llvm-svn: 49003
2008-03-31 23:20:09 +00:00
e4f77c69ac
It's not safe to fold a load from GV stub or constantpool into a two-address use.
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llvm-svn: 49002
2008-03-31 23:19:51 +00:00
f549b26254
Fix a DAGCombiner optimization to respect volatile qualification.
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llvm-svn: 48994
2008-03-31 20:32:52 +00:00
28e7b57605
add a testcase for forming memset from noncontiguous stores.
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llvm-svn: 48938
2008-03-29 04:51:35 +00:00
fd2eb00cc2
Fix a tokenfactor node to use the load chain rather than the
...
load value. This fixes PR2177.
llvm-svn: 48932
2008-03-28 23:45:16 +00:00
e2337ecf76
add another testcase
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llvm-svn: 48881
2008-03-27 17:13:55 +00:00
c9c9e406ad
New test case.
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llvm-svn: 48858
2008-03-27 01:51:31 +00:00
5832410d77
Fix a memory bug: increment an iterator of a deleted machine instr.
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llvm-svn: 48853
2008-03-27 01:27:25 +00:00
8ac07c2834
Expose ExecutionEngine::getTargetData() to c and ocaml bindings.
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llvm-svn: 48851
2008-03-27 00:27:14 +00:00
db390694ff
One more coalescer fix wrt deadness propagation.
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llvm-svn: 48837
2008-03-26 20:15:49 +00:00
289ba4f335
Avoid commuting a def MI in order to coalesce a copy instruction away if any use of the same val# is a copy instruction that has already been coalesced.
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llvm-svn: 48833
2008-03-26 19:03:01 +00:00
ad6c23d5e9
Use ## for comment delimiter on darwin x86-32, so
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llvm's output .s files will go through gcc -std=c99
without triggering preprocesser errors. Approach
suggested by Daveed Vandevoorde.
llvm-svn: 48808
2008-03-25 23:29:30 +00:00
df1690dc7c
Handle a special case xor undef, undef -> 0. Technically this should be transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
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llvm-svn: 48792
2008-03-25 20:08:07 +00:00
2b72c05992
Handle a special case xor undef, undef -> 0. Technically this should be transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
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llvm-svn: 48791
2008-03-25 20:07:13 +00:00
883cbfd0ba
Add CMP32mr and friends to the load-unfolding table. Among
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other things, this allows the scheduler to unfold a load operand
in the 2008-01-08-SchedulerCrash.ll testcase, so it now successfully
clones the comparison to avoid a pushf+popf.
llvm-svn: 48777
2008-03-25 16:53:19 +00:00
40f061cb66
Tests for the instruction iterator bindings.
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llvm-svn: 48775
2008-03-25 16:35:08 +00:00
8bf97c2324
Byebye llvm-upgrade!
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llvm-svn: 48762
2008-03-25 04:26:08 +00:00
7d564c3b4a
lastRegisterUse() should ignore identity copies. Those will be erased.
...
llvm-svn: 48759
2008-03-25 02:02:19 +00:00
0d48c94e7d
check struct layout
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llvm-svn: 48758
2008-03-25 00:47:49 +00:00
6306183df3
Use the bit size of the operand instead of the hard-coded 32 to generate the
...
mask.
llvm-svn: 48750
2008-03-24 23:16:37 +00:00
615488ab45
- SSE4.1 extractfps extracts a f32 into a gr32 register. Very useful! Not. Fix the instruction specification and teaches lowering code to use it only when the only use is a store instruction.
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llvm-svn: 48746
2008-03-24 21:52:23 +00:00
a38f58aa5c
Add incoming value from header only if phi node has any use inside the loop.
...
llvm-svn: 48738
2008-03-24 20:16:14 +00:00
c50977b025
Fix test name.
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llvm-svn: 48733
2008-03-24 18:08:07 +00:00
c2c0c8303c
apparently tclsh doesn't lex like bash. Weird.
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llvm-svn: 48732
2008-03-24 17:41:57 +00:00
9ca6bb4f16
pass the option so this test tests the right thing.
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llvm-svn: 48731
2008-03-24 17:36:38 +00:00
c8794e71e3
Add new test.
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llvm-svn: 48730
2008-03-24 17:16:39 +00:00
ea249e3aef
Remove incorrect comment.
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llvm-svn: 48728
2008-03-24 16:58:20 +00:00
d8ea040c31
APIntify SelectionDAG's EXTRACT_ELEMENT code.
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llvm-svn: 48726
2008-03-24 16:38:05 +00:00
c3cf9f872a
Transform (zext (or (icmp), (icmp))) to (or (zext (cimp), (zext icmp))) if at least one of the (zext icmp) can be transformed to eliminate an icmp.
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llvm-svn: 48715
2008-03-24 00:21:34 +00:00
07a45f4edb
Objective Caml bindings for basic block, function, global, and arg iterators.
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llvm-svn: 48711
2008-03-23 22:21:29 +00:00
7e2a6c4112
New testcase.
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llvm-svn: 48697
2008-03-22 22:27:01 +00:00
e3605ac108
Use normal naming convention for test.
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llvm-svn: 48693
2008-03-22 21:08:33 +00:00
3f7fab913d
Add testcase for prev. commit. Minor fixes
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llvm-svn: 48686
2008-03-22 08:37:05 +00:00
72d5d42dbc
Support chained aliases for LLVM IR printing. This fixes PR2145
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llvm-svn: 48684
2008-03-22 08:17:17 +00:00
53ccb62712
implement an initial hack at a straight-line store -> memset optimization.
...
This fires dozens of times across spec and multisource, but I don't know
if it actually speeds stuff up. Hopefully the testers will show something
nice :)
llvm-svn: 48680
2008-03-22 05:37:16 +00:00
31604a62f6
Teach DAG combiner to commute commutable binary nodes in order to achieve sdisel CSE.
...
llvm-svn: 48673
2008-03-22 01:55:50 +00:00
a25dde6fee
Handle getresult instructions in different basic blocks
...
from their aggregate operands by moving the getresult
instructions.
llvm-svn: 48657
2008-03-21 21:01:32 +00:00
e37b9c0d34
Testcase for PR2160.
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llvm-svn: 48655
2008-03-21 20:22:11 +00:00
5abbe6cef5
Add support for calls that return two FP values in
...
ST(0)/ST(1).
llvm-svn: 48634
2008-03-21 06:38:26 +00:00
7e59a30e9f
disable a bogus assertion.
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llvm-svn: 48633
2008-03-21 06:01:05 +00:00
b6f04a3e0a
Enable support for returning two long-double values in ST(0)/ST(1).
...
This allows us to compile fp-stack-2results.ll into:
_test:
fldz
fld1
ret
which returns 1 in ST(0) and 0 in ST(1). This is needed for x86-64
_Complex long double.
llvm-svn: 48632
2008-03-21 05:57:20 +00:00
c44160ce6e
Teach masked value is zero about add and sub, and use MVIZ to
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simplify things like (X & 4) >> 1 == 2 --> (X & 4) == 4.
since it is obvious that the shift doesn't remove any bits.
llvm-svn: 48631
2008-03-21 05:19:58 +00:00
92b4488202
Undo 48570. Correctly match mmx shift instructions with an immediate operand.
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llvm-svn: 48627
2008-03-21 00:40:09 +00:00
7a3e750fd2
Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
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llvm-svn: 48578
2008-03-20 02:18:41 +00:00
cbbf291f34
Keep track of analysis information inherited from Module pass manager.
...
llvm-svn: 48576
2008-03-20 01:09:53 +00:00
bbaf3edace
Add more patterns to match in the integer comparison test harnesses.
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Fix bugs encountered, mostly due to range matching for immediates;
the CellSPU's 10-bit immediates are sign extended, covering a
larger range of unsigned values.
llvm-svn: 48575
2008-03-20 00:51:36 +00:00
bbba76fc99
Add intrinsics to match mmx shift builtin's with immediate operand.
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llvm-svn: 48569
2008-03-19 23:38:52 +00:00
b9056838d2
Add support for multiple return values for the PPC target by
...
converting call result lowering to use the CallingConvLowering
infastructure.
llvm-svn: 48552
2008-03-19 21:39:28 +00:00
8fe9109469
Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
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llvm-svn: 48542
2008-03-19 08:30:06 +00:00
ab7872c06c
Upgrade tests.
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llvm-svn: 48538
2008-03-19 07:28:33 +00:00
f9d25185d5
Upgrade tests.
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llvm-svn: 48536
2008-03-19 05:39:35 +00:00
0ea4c8d706
Upgrade tests to not use llvm-upgrade.
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llvm-svn: 48530
2008-03-19 04:36:04 +00:00
1d526b90aa
Upgrade tests to not use llvm-upgrade.
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llvm-svn: 48529
2008-03-19 04:14:49 +00:00
f73582b17c
Remove llvm-upgrade and update tests.
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llvm-svn: 48527
2008-03-19 03:47:13 +00:00
56e9e57d28
Fixed a coalescer bug caused by a typo.
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llvm-svn: 48526
2008-03-19 02:26:36 +00:00
265f780c22
C and Objective Caml bindings for the various getParent methods of the IR.
...
Based on Erick Tryzelaar's patch.
llvm-svn: 48523
2008-03-19 01:11:35 +00:00
44c0b4f754
Fix live variables issues:
...
1. If part of a register is re-defined, an implicit kill and an implicit def are added to denote read / mod / write. However, this should only be necessary if the register is actually read later. This is a performance issue.
2. If a sub-register is being defined, and it doesn't have a previous use, do not add a implicit kill to the last use of a super-register:
= EAX, AX<imp-use,kill>
...
AX =
In this case, EAX is live but AX is killed, this is wrong and will cause the coalescer to do bad things.
llvm-svn: 48521
2008-03-19 00:52:20 +00:00
484064370a
Fix a x86-64 isel lowering bug that's been around forever. A x86-64 varargs function implicitly reads X86::AL, don't clobber it!
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llvm-svn: 48515
2008-03-18 23:36:35 +00:00
43784cc27d
It might be nice to have this run as x86 on non-x86 platforms...
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llvm-svn: 48511
2008-03-18 22:38:22 +00:00
Dan Gohman