cfc97056e7
Add lowering for global address nodes. Not pretty efficient though.
...
llvm-svn: 70730
2009-05-03 13:08:33 +00:00
b5613928f5
Some early full call lowering draft for direct calls
...
llvm-svn: 70729
2009-05-03 13:08:13 +00:00
ec3f0b3f9d
Add call frame setup instruction elimination and lowerid for bunch of call-related stuff.
...
llvm-svn: 70728
2009-05-03 13:07:54 +00:00
5613510c81
Add CALL lowering.
...
llvm-svn: 70727
2009-05-03 13:07:31 +00:00
c995ddd017
Add bunch of mem-whatever patterns
...
llvm-svn: 70726
2009-05-03 13:07:10 +00:00
f702a0085c
Add bunch of reg-mem inst patterns
...
llvm-svn: 70725
2009-05-03 13:06:46 +00:00
ed1c3dfa0f
Add normal and trunc stores
...
llvm-svn: 70724
2009-05-03 13:06:26 +00:00
31ecd23a9e
Basic support for mem=>reg moves
...
llvm-svn: 70723
2009-05-03 13:06:03 +00:00
80a73e7d8b
Add 8-bit insts. zext behaviour is not modelled yet
...
llvm-svn: 70722
2009-05-03 13:05:42 +00:00
b900245e13
Add 8-bit regclass and pattern for sext_inreg
...
llvm-svn: 70721
2009-05-03 13:05:22 +00:00
b638fb10f5
Add pattern for OR
...
llvm-svn: 70720
2009-05-03 13:05:00 +00:00
654cb0a761
Add reg-imm variants
...
llvm-svn: 70719
2009-05-03 13:04:41 +00:00
37709c3584
Add hint to nop
...
llvm-svn: 70718
2009-05-03 13:04:23 +00:00
6339db830e
Add more instructions
...
llvm-svn: 70717
2009-05-03 13:04:06 +00:00
e32c817d2c
Cleanup
...
llvm-svn: 70716
2009-05-03 13:03:50 +00:00
15a515b1af
Add dummy lowering for shifts
...
llvm-svn: 70715
2009-05-03 13:03:33 +00:00
55a085b539
We don't have any div at all - thus mark it as expensive
...
llvm-svn: 70714
2009-05-03 13:03:14 +00:00
abb51755c8
We're not going to spend 100% of time in interrupts, do we? :)
...
llvm-svn: 70713
2009-05-03 13:02:57 +00:00
8a17dff7d0
Add simple reg-reg add.
...
llvm-svn: 70712
2009-05-03 13:02:39 +00:00
6ff6fc95a0
gas uses lower letter for register names
...
llvm-svn: 70711
2009-05-03 13:02:22 +00:00
d7afd69e3b
Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly!
...
llvm-svn: 70710
2009-05-03 13:02:04 +00:00
c942782b3b
Add function body printing routine
...
llvm-svn: 70709
2009-05-03 13:01:41 +00:00
ef811d8e05
Add 'msp430' target triple recognizer
...
llvm-svn: 70708
2009-05-03 13:01:23 +00:00
a9b7df98e6
Make emit{Prologue,Epilogue}() noop for now
...
llvm-svn: 70707
2009-05-03 13:01:04 +00:00
69f51f0b41
Add callee-saved regs & reg classes getter hooks
...
llvm-svn: 70706
2009-05-03 13:00:46 +00:00
efcd5aa381
Add simple FP indicator for given function hook
...
llvm-svn: 70705
2009-05-03 13:00:28 +00:00
c10f98ace3
Provide set of reserved registers
...
llvm-svn: 70704
2009-05-03 13:00:11 +00:00
7bfc3ea2ee
Add proper ISD::RET lowering
...
llvm-svn: 70703
2009-05-03 12:59:50 +00:00
3849be6ca1
Add first draft of MSP430 calling convention stuff and draft of ISD::FORMAL_ARGUMENTS node lowering.
...
llvm-svn: 70702
2009-05-03 12:59:33 +00:00
77e5a11ec2
Fix register names, fix register allocation order, handle frame pointer.
...
llvm-svn: 70701
2009-05-03 12:59:16 +00:00
64717bbc14
Clearify the usage and add some debug stuff
...
llvm-svn: 70700
2009-05-03 12:58:58 +00:00
e10f69a8a7
Cleanup
...
llvm-svn: 70699
2009-05-03 12:58:40 +00:00
128e8a188f
Add cmake script. No idea whether it works or not :)
...
llvm-svn: 70698
2009-05-03 12:58:22 +00:00
4130a7c1e7
Add a note
...
llvm-svn: 70697
2009-05-03 12:58:05 +00:00
7c4db99df3
Typo
...
llvm-svn: 70695
2009-05-03 12:57:47 +00:00
101380015c
Dummy MSP430 backend
...
llvm-svn: 70694
2009-05-03 12:57:15 +00:00
e01821edbd
'The attached patch fixes an issue where llc -march=cpp fails with
...
"Invalid primitive type" on input containing the x86_fp80 type.'
Patch by Collin Winter!
llvm-svn: 70610
2009-05-01 23:54:26 +00:00
31af617924
Fix compilation for some targets other than x86.
...
llvm-svn: 70522
2009-04-30 23:50:26 +00:00
a5037484a4
Make DebugLoc independent of DwarfWriter.
...
-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)
llvm-svn: 70520
2009-04-30 23:22:31 +00:00
e651f25a7b
getCommonSubClass() - Calculate the largest common sub-class of two register
...
classes.
This is implemented as a function rather than a method on TargetRegisterClass
because it is symmetric in its arguments.
llvm-svn: 70512
2009-04-30 21:23:32 +00:00
db3a57ec5c
Set mayLoad on MOVZX32_NOREXrm8 too.
...
llvm-svn: 70466
2009-04-30 03:11:48 +00:00
99578674fd
Mark MOV8mr_NOREX and MOV8rm_NOREX as mayStore / mayLoad respectively.
...
llvm-svn: 70461
2009-04-30 00:58:57 +00:00
1fba01bbcd
remove progname which is never set. PR4085
...
llvm-svn: 70453
2009-04-30 00:24:33 +00:00
026e5d7667
Instead of passing in an unsigned value for the optimization level, use an enum,
...
which better identifies what the optimization is doing. And is more flexible for
future uses.
llvm-svn: 70440
2009-04-29 23:29:43 +00:00
7e6e352735
Fix infinite recursion in the C++ code which handles movddup by making it unnecessary.
...
llvm-svn: 70425
2009-04-29 22:47:44 +00:00
5f829d896d
Implement review feedback for vector shuffle work.
...
llvm-svn: 70372
2009-04-29 05:20:52 +00:00
ccd30945f9
Add a public method called getAddressSpace() to the GlobalAddressSDNode.
...
llvm-svn: 70366
2009-04-29 04:43:24 +00:00
084669a1c9
Second attempt:
...
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.
llvm-svn: 70343
2009-04-29 00:15:41 +00:00
dac88bae4f
Properly print 'P' modifier on inline asm memory operands.
...
This should fix PR3379 and PR4064.
Patch inspired by Edwin Török!
llvm-svn: 70328
2009-04-28 21:49:33 +00:00
7bfed8a9f4
GlobalValue is always pointer type, so an assert isn't required.
...
llvm-svn: 70300
2009-04-28 16:39:45 +00:00
56f2987a87
r70270 isn't ready yet. Back this out. Sorry for the noise.
...
llvm-svn: 70275
2009-04-28 01:04:53 +00:00
d0ae15946c
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
...
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...
llvm-svn: 70270
2009-04-28 00:21:31 +00:00
8d6d4b9289
2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.
...
PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
llvm-svn: 70225
2009-04-27 18:41:29 +00:00
2986972118
Rename GR8_ABCD to GR8_ABCD_L and create GR8_ABCD_H, and use these
...
to precisely describe the h-register subreg register classes.
Thanks to Jakob Stoklund Olesen for spotting this and for the
initial patch!
Also, make getStoreRegOpcode and getLoadRegOpcode aware of the
needs of h registers.
llvm-svn: 70211
2009-04-27 16:41:36 +00:00
ec542ca65e
Rename GR8_, GR16_, GR32_, and GR64_ to GR8_ABCD, GR16_ABCD,
...
GR32_ABCD, and GR64_ABCD, respectively, to help describe them.
llvm-svn: 70210
2009-04-27 16:33:14 +00:00
ba99bddf1f
Break up long multi-mnemonic strings into separate lines for readability.
...
llvm-svn: 70209
2009-04-27 15:13:28 +00:00
e15bf109be
Revised 68749 to allow matching of load/stores for address spaces < 256.
...
llvm-svn: 70197
2009-04-27 07:22:10 +00:00
3ad60b18cb
add support for detecting process features on win64, patch by
...
Nicolas Capens!
llvm-svn: 70057
2009-04-25 18:27:23 +00:00
0041bd3523
Change LowerCallResult method so that CCValAssign::BCvt can be used with
...
f64 types. This is not used for anything yet.
llvm-svn: 70006
2009-04-25 00:33:20 +00:00
40e784ce69
Adjust a comment to reflect what the code does. Splitting a 64-bit argument
...
between registers and the stack may be required with the APCS ABI, but it
isn't tied to using a particular version of the ARM architecture.
llvm-svn: 69978
2009-04-24 17:05:01 +00:00
f134b2d212
Fix up some problems with getCopyToReg and getCopyFromReg nodes being
...
chained and "flagged" together. I also made a few changes to handle the
chain and flag values more consistently. I found these problems by
inspection so I'm not aware of anything that breaks because of them
(thus no testcase).
llvm-svn: 69977
2009-04-24 17:00:36 +00:00
62d47d2361
Remove unnecessary references to f32 types. After specifying that f32
...
should be bit-converted to i32, it is sufficient to list only i32 in
subsequent definitions.
llvm-svn: 69973
2009-04-24 16:55:25 +00:00
c1396a2313
Fix PR 4004 by including the call to __tls_get_addr in X86tlsaddr. This is not
...
very elegant, but neither is the tls specification :-(
llvm-svn: 69968
2009-04-24 12:59:40 +00:00
b93db668b3
Revert 69952. Causes testsuite failures on linux x86-64.
...
llvm-svn: 69967
2009-04-24 12:40:33 +00:00
bb881d66f4
PR2957
...
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next.
llvm-svn: 69952
2009-04-24 03:42:54 +00:00
870c33f14b
Fix spurious indentation in a comment.
...
llvm-svn: 69934
2009-04-23 22:41:05 +00:00
5058f240d9
Banksel immediate constant will always immediately follow the GA/ES, so scan an insn from beginnin to find out the banksel operand.
...
llvm-svn: 69883
2009-04-23 10:34:58 +00:00
14efb90fcf
Add support for printing MO_ExternalSymbol operands in
...
memory operand tuples. This doesn't ever come up in normal
code however.
llvm-svn: 69848
2009-04-23 00:57:37 +00:00
107b2818ce
Make the function begin label start after ther data pointer.
...
The address of data frame for function can be obtained by subtracting 2 from the function begin label.
llvm-svn: 69801
2009-04-22 12:02:36 +00:00
7ce5cc6bd1
Get rid of what looks like a copy-and-pasted typo.
...
Spotted by gcc-4.5.
llvm-svn: 69673
2009-04-21 09:44:39 +00:00
47ed1f5293
TLS_addr64 and TLS_addr32 define RDI and EAX. They don't use them.
...
This fixes PR4002.
llvm-svn: 69672
2009-04-21 08:22:09 +00:00
3e3ef7c4d9
Handle direct aggregate type arguments.
...
llvm-svn: 69665
2009-04-21 05:54:51 +00:00
1addf64735
Make X86's copyRegToReg able to handle copies to and from subclasses.
...
This makes the extra copyRegToReg calls in ScheduleDAGSDNodesEmit.cpp
unnecessary. Derived from a patch by Jakob Stoklund Olesen.
llvm-svn: 69635
2009-04-20 22:54:34 +00:00
2c441c6afe
Remove unused variable.
...
llvm-svn: 69624
2009-04-20 20:34:38 +00:00
f8b85477ae
Move duplicated AddLiveIn function from X86 and ARM backends to be a method
...
in the MachineFunction class, renaming it to addLiveIn for consistency with
the same method in MachineBasicBlock. Thanks for Anton for suggesting this.
llvm-svn: 69615
2009-04-20 18:36:57 +00:00
958d5eb032
Match C backend only if it explicitly requested.
...
llvm-svn: 69613
2009-04-20 18:07:22 +00:00
0fcc019d36
Emit the auto variables of a function into a different section than parameters.
...
llvm-svn: 69605
2009-04-20 16:59:35 +00:00
6c8bcf9da1
Fixed a few 64 bit cases in X86InstrInfo::commuteInstruction
...
llvm-svn: 69417
2009-04-18 05:16:01 +00:00
06684350c4
Recommit r69335 and r69336. These were not causing problems.
...
llvm-svn: 69394
2009-04-17 22:40:38 +00:00
b0b10f8bf6
Move the AddLiveIn function definition closer to its uses.
...
llvm-svn: 69382
2009-04-17 20:42:34 +00:00
deeaf70dad
Rearrange code to reduce indentation.
...
llvm-svn: 69381
2009-04-17 20:40:45 +00:00
ea09d4aca8
Clean up formatting, remove trailing whitespace, fix comment typos and
...
punctuation. No functional changes.
llvm-svn: 69378
2009-04-17 20:35:10 +00:00
a4c2290e5f
Use CallConvLower.h and TableGen descriptions of the calling conventions
...
for ARM. Patch by Sandeep Patel.
llvm-svn: 69371
2009-04-17 19:07:39 +00:00
355fe12c82
For general dynamic TLS access we must use
...
leaq foo@TLSGD(%rip), %rdi
as part of the instruction sequence. Using a register other than %rdi and then
copying it to %rdi is not valid.
llvm-svn: 69350
2009-04-17 14:35:58 +00:00
30527b1114
Revert r69335 and r69336. They were causing build failures.
...
llvm-svn: 69347
2009-04-17 04:19:22 +00:00
09dbb0b5e0
MOV8rr_NOREX is a "Move" instruction. This doesn't currently
...
matter, because this instruction isn't generated until after
things that care.
llvm-svn: 69336
2009-04-17 00:45:17 +00:00
74835ce1cb
Don't use MOV8rr_NOREX on x86-32. It doesn't actually hurt anything at
...
present, but it's inconsistent.
llvm-svn: 69335
2009-04-17 00:43:09 +00:00
a8919d0a35
Fix some failures in targets on available_externally functions,
...
this fixes a crash on CodeGen/Generic/externally_available.ll
on ppc hosts. Thanks to Nicholas L for pointing this out.
llvm-svn: 69333
2009-04-17 00:26:12 +00:00
5e42177a0f
fix PR3995. A scale must be 1, 2, 4 or 8.
...
llvm-svn: 69284
2009-04-16 12:34:53 +00:00
de7b3e74be
Fix 80-column violations.
...
llvm-svn: 69204
2009-04-15 19:48:57 +00:00
6711216e84
Add a folding table entry for MOV8rr_NOREX.
...
llvm-svn: 69203
2009-04-15 19:48:28 +00:00
6f873b446a
Fix X86MachineFunctionInfo's doxygen comment.
...
llvm-svn: 69127
2009-04-15 01:20:18 +00:00
dd07f638f5
Do for GR16_NOREX what r69049 did for GR8_NOREX, to avoid trouble with
...
the local register allocator.
llvm-svn: 69115
2009-04-15 00:10:16 +00:00
7913ea5e4a
Add a new MOV8rr_NOREX, and make X86's copyRegToReg use it when
...
either the source or destination is a physical h register.
This fixes sqlite3 with the post-RA scheduler enabled.
llvm-svn: 69111
2009-04-15 00:04:23 +00:00
821e13a8f4
GR8_NOREX can contain the H registers, since they don't require
...
REX prefixes.
llvm-svn: 69108
2009-04-15 00:00:48 +00:00
62f4498646
For the h-register addressing-mode trick, use the correct value for
...
any non-address uses of the address value. This fixes 186.crafty.
llvm-svn: 69094
2009-04-14 22:45:05 +00:00
dfbbf5c043
Some of GR8_NOREX registers are only available in 64-bit mode.
...
llvm-svn: 69049
2009-04-14 16:57:43 +00:00
92bb846e2b
Handle aggregate type arguments to direct and indirect calls.
...
llvm-svn: 69022
2009-04-14 02:49:52 +00:00
6c1426308c
Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
...
it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.
llvm-svn: 68986
2009-04-13 21:06:25 +00:00
80be3511ed
Reapply 68847.
...
Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default.
llvm-svn: 68964
2009-04-13 17:02:03 +00:00
Anton Korobeynikov