86 lines
		
	
	
		
			4.2 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			86 lines
		
	
	
		
			4.2 KiB
		
	
	
	
		
			LLVM
		
	
	
	
; RUN: llc -march=amdgcn -mcpu=tahiti  -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,MADMACF32,GFX6 %s
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; RUN: llc -march=amdgcn -mcpu=tonga   -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,MADMACF32,GFX8 %s
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; RUN: llc -march=amdgcn -mcpu=gfx900  -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,MADMACF32,GFX9 %s
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; RUN: llc -march=amdgcn -mcpu=gfx90a  -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,MADMACF32,GFX9 %s
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; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,MADMACF32,GFX101 %s
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; RUN: llc -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,NOMADMACF32,GFX103 %s
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; GCN-LABEL: {{^}}test_mul_legacy_f32:
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; GCN: v_mul_legacy_f32_e{{(32|64)}} v{{[0-9]+}}, s{{[0-9]+}}, {{[sv][0-9]+}}
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define amdgpu_kernel void @test_mul_legacy_f32(float addrspace(1)* %out, float %a, float %b) #0 {
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  %result = call float @llvm.amdgcn.fmul.legacy(float %a, float %b)
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  store float %result, float addrspace(1)* %out, align 4
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  ret void
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}
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; GCN-LABEL: {{^}}test_mul_legacy_undef0_f32:
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; GCN: v_mul_legacy_f32_e{{(32|64)}} v{{[0-9]+}}, s{{[0-9]+}}, {{[sv][0-9]+}}
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define amdgpu_kernel void @test_mul_legacy_undef0_f32(float addrspace(1)* %out, float %a) #0 {
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  %result = call float @llvm.amdgcn.fmul.legacy(float undef, float %a)
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  store float %result, float addrspace(1)* %out, align 4
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  ret void
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}
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; GCN-LABEL: {{^}}test_mul_legacy_undef1_f32:
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; GCN: v_mul_legacy_f32_e{{(32|64)}} v{{[0-9]+}}, s{{[0-9]+}}, {{[sv][0-9]+}}
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define amdgpu_kernel void @test_mul_legacy_undef1_f32(float addrspace(1)* %out, float %a) #0 {
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  %result = call float @llvm.amdgcn.fmul.legacy(float %a, float undef)
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  store float %result, float addrspace(1)* %out, align 4
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  ret void
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}
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; GCN-LABEL: {{^}}test_mul_legacy_fabs_f32:
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; GCN: v_mul_legacy_f32_e{{(32|64)}} v{{[0-9]+}}, |s{{[0-9]+}}|, |{{[sv][0-9]+}}|
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define amdgpu_kernel void @test_mul_legacy_fabs_f32(float addrspace(1)* %out, float %a, float %b) #0 {
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  %a.fabs = call float @llvm.fabs.f32(float %a)
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  %b.fabs = call float @llvm.fabs.f32(float %b)
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  %result = call float @llvm.amdgcn.fmul.legacy(float %a.fabs, float %b.fabs)
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  store float %result, float addrspace(1)* %out, align 4
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  ret void
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}
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; Don't form mad/mac instructions because they don't support denormals.
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; GCN-LABEL: {{^}}test_add_mul_legacy_f32:
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; GCN: v_mul_legacy_f32_e{{(32|64)}} v{{[0-9]+}}, s{{[0-9]+}}, {{[sv][0-9]+}}
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; GCN: v_add_f32_e{{(32|64)}} v{{[0-9]+}}, s{{[0-9]+}}, {{[sv][0-9]+}}
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define amdgpu_kernel void @test_add_mul_legacy_f32(float addrspace(1)* %out, float %a, float %b, float %c) #0 {
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  %mul = call float @llvm.amdgcn.fmul.legacy(float %a, float %b)
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  %add = fadd float %mul, %c
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  store float %add, float addrspace(1)* %out, align 4
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  ret void
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}
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; GCN-LABEL: {{^}}test_mad_legacy_f32:
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; GFX6: v_mac_legacy_f32_e64 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
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; GFX8: v_mad_legacy_f32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
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; GFX9: v_mad_legacy_f32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
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; GFX101: v_mac_legacy_f32_e64 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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; GFX103: v_mul_legacy_f32_e64 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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; GFX103: v_add_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @test_mad_legacy_f32(float addrspace(1)* %out, float %a, float %b, float %c) #2 {
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  %mul = call float @llvm.amdgcn.fmul.legacy(float %a, float %b)
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  %add = fadd float %mul, %c
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  store float %add, float addrspace(1)* %out, align 4
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  ret void
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}
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; GCN-LABEL: {{^}}test_mad_legacy_fneg_f32:
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; MADMACF32: v_mad_legacy_f32 v{{[0-9]+}}, -s{{[0-9]+}}, -{{[sv][0-9]+}}, v{{[0-9]+}}
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; NOMADMACF32: v_mul_legacy_f32_e64 v{{[0-9]+}}, -s{{[0-9]+}}, -s{{[0-9]+}}
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; NOMADMACF32: v_add_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @test_mad_legacy_fneg_f32(float addrspace(1)* %out, float %a, float %b, float %c) #2 {
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  %a.fneg = fneg float %a
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  %b.fneg = fneg float %b
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  %mul = call float @llvm.amdgcn.fmul.legacy(float %a.fneg, float %b.fneg)
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  %add = fadd float %mul, %c
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  store float %add, float addrspace(1)* %out, align 4
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  ret void
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}
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declare float @llvm.fabs.f32(float) #1
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declare float @llvm.amdgcn.fmul.legacy(float, float) #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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attributes #2 = { nounwind "denormal-fp-math"="preserve-sign" }
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