323 lines
8.7 KiB
LLVM
323 lines
8.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Check that a division is bypassed when appropriate only.
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=atom < %s | FileCheck -check-prefixes=CHECK,ATOM %s
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 < %s | FileCheck -check-prefixes=CHECK,REST,X64 %s
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=silvermont < %s | FileCheck -check-prefixes=CHECK,REST,SLM %s
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake < %s | FileCheck -check-prefixes=CHECK,REST,SKL %s
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; RUN: llc -profile-summary-huge-working-set-size-threshold=1 -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake < %s | FileCheck -check-prefixes=HUGEWS %s
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; Verify that div32 is bypassed only for Atoms.
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define i32 @div32(i32 %a, i32 %b) {
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; ATOM-LABEL: div32:
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; ATOM: # %bb.0: # %entry
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; ATOM-NEXT: movl %edi, %eax
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; ATOM-NEXT: orl %esi, %eax
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; ATOM-NEXT: testl $-256, %eax
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; ATOM-NEXT: je .LBB0_1
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; ATOM-NEXT: # %bb.2:
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; ATOM-NEXT: movl %edi, %eax
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; ATOM-NEXT: cltd
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; ATOM-NEXT: idivl %esi
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; ATOM-NEXT: retq
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; ATOM-NEXT: .LBB0_1:
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; ATOM-NEXT: movzbl %dil, %eax
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; ATOM-NEXT: divb %sil
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; ATOM-NEXT: movzbl %al, %eax
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; ATOM-NEXT: retq
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;
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; REST-LABEL: div32:
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; REST: # %bb.0: # %entry
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; REST-NEXT: movl %edi, %eax
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; REST-NEXT: cltd
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; REST-NEXT: idivl %esi
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; REST-NEXT: retq
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;
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; HUGEWS-LABEL: div32:
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; HUGEWS: # %bb.0: # %entry
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; HUGEWS-NEXT: movl %edi, %eax
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; HUGEWS-NEXT: cltd
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; HUGEWS-NEXT: idivl %esi
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; HUGEWS-NEXT: retq
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entry:
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%div = sdiv i32 %a, %b
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ret i32 %div
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}
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; Verify that div64 is always bypassed.
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define i64 @div64(i64 %a, i64 %b) {
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; ATOM-LABEL: div64:
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; ATOM: # %bb.0: # %entry
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; ATOM-NEXT: movq %rdi, %rcx
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; ATOM-NEXT: movq %rdi, %rax
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; ATOM-NEXT: orq %rsi, %rcx
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; ATOM-NEXT: shrq $32, %rcx
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; ATOM-NEXT: je .LBB1_1
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; ATOM-NEXT: # %bb.2:
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; ATOM-NEXT: cqto
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; ATOM-NEXT: idivq %rsi
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; ATOM-NEXT: retq
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; ATOM-NEXT: .LBB1_1:
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; ATOM-NEXT: # kill: def $eax killed $eax killed $rax
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; ATOM-NEXT: xorl %edx, %edx
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; ATOM-NEXT: divl %esi
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; ATOM-NEXT: # kill: def $eax killed $eax def $rax
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; ATOM-NEXT: retq
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;
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; X64-LABEL: div64:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: movq %rdi, %rcx
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; X64-NEXT: orq %rsi, %rcx
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; X64-NEXT: shrq $32, %rcx
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; X64-NEXT: je .LBB1_1
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; X64-NEXT: # %bb.2:
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; X64-NEXT: cqto
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; X64-NEXT: idivq %rsi
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; X64-NEXT: retq
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; X64-NEXT: .LBB1_1:
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; X64-NEXT: # kill: def $eax killed $eax killed $rax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: divl %esi
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; X64-NEXT: # kill: def $eax killed $eax def $rax
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; X64-NEXT: retq
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;
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; SLM-LABEL: div64:
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; SLM: # %bb.0: # %entry
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; SLM-NEXT: movq %rdi, %rcx
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; SLM-NEXT: movq %rdi, %rax
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; SLM-NEXT: orq %rsi, %rcx
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; SLM-NEXT: shrq $32, %rcx
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; SLM-NEXT: je .LBB1_1
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; SLM-NEXT: # %bb.2:
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; SLM-NEXT: cqto
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; SLM-NEXT: idivq %rsi
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; SLM-NEXT: retq
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; SLM-NEXT: .LBB1_1:
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; SLM-NEXT: xorl %edx, %edx
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; SLM-NEXT: # kill: def $eax killed $eax killed $rax
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; SLM-NEXT: divl %esi
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; SLM-NEXT: # kill: def $eax killed $eax def $rax
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; SLM-NEXT: retq
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;
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; SKL-LABEL: div64:
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; SKL: # %bb.0: # %entry
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; SKL-NEXT: movq %rdi, %rax
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; SKL-NEXT: movq %rdi, %rcx
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; SKL-NEXT: orq %rsi, %rcx
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; SKL-NEXT: shrq $32, %rcx
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; SKL-NEXT: je .LBB1_1
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; SKL-NEXT: # %bb.2:
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; SKL-NEXT: cqto
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; SKL-NEXT: idivq %rsi
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; SKL-NEXT: retq
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; SKL-NEXT: .LBB1_1:
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; SKL-NEXT: # kill: def $eax killed $eax killed $rax
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; SKL-NEXT: xorl %edx, %edx
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; SKL-NEXT: divl %esi
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; SKL-NEXT: # kill: def $eax killed $eax def $rax
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; SKL-NEXT: retq
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;
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; HUGEWS-LABEL: div64:
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; HUGEWS: # %bb.0: # %entry
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; HUGEWS-NEXT: movq %rdi, %rax
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; HUGEWS-NEXT: cqto
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; HUGEWS-NEXT: idivq %rsi
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; HUGEWS-NEXT: retq
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entry:
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%div = sdiv i64 %a, %b
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ret i64 %div
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}
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; Verify that no extra code is generated when optimizing for size.
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define i64 @div64_optsize(i64 %a, i64 %b) optsize {
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; CHECK-LABEL: div64_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: cqto
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; CHECK-NEXT: idivq %rsi
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; CHECK-NEXT: retq
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;
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; HUGEWS-LABEL: div64_optsize:
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; HUGEWS: # %bb.0:
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; HUGEWS-NEXT: movq %rdi, %rax
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; HUGEWS-NEXT: cqto
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; HUGEWS-NEXT: idivq %rsi
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; HUGEWS-NEXT: retq
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%div = sdiv i64 %a, %b
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ret i64 %div
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}
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define i64 @div64_pgso(i64 %a, i64 %b) !prof !15 {
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; CHECK-LABEL: div64_pgso:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: cqto
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; CHECK-NEXT: idivq %rsi
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; CHECK-NEXT: retq
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;
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; HUGEWS-LABEL: div64_pgso:
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; HUGEWS: # %bb.0:
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; HUGEWS-NEXT: movq %rdi, %rax
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; HUGEWS-NEXT: cqto
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; HUGEWS-NEXT: idivq %rsi
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; HUGEWS-NEXT: retq
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%div = sdiv i64 %a, %b
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ret i64 %div
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}
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define i64 @div64_hugews(i64 %a, i64 %b) {
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; ATOM-LABEL: div64_hugews:
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; ATOM: # %bb.0:
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; ATOM-NEXT: movq %rdi, %rcx
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; ATOM-NEXT: movq %rdi, %rax
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; ATOM-NEXT: orq %rsi, %rcx
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; ATOM-NEXT: shrq $32, %rcx
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; ATOM-NEXT: je .LBB4_1
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; ATOM-NEXT: # %bb.2:
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; ATOM-NEXT: cqto
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; ATOM-NEXT: idivq %rsi
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; ATOM-NEXT: retq
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; ATOM-NEXT: .LBB4_1:
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; ATOM-NEXT: # kill: def $eax killed $eax killed $rax
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; ATOM-NEXT: xorl %edx, %edx
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; ATOM-NEXT: divl %esi
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; ATOM-NEXT: # kill: def $eax killed $eax def $rax
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; ATOM-NEXT: retq
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;
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; X64-LABEL: div64_hugews:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: movq %rdi, %rcx
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; X64-NEXT: orq %rsi, %rcx
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; X64-NEXT: shrq $32, %rcx
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; X64-NEXT: je .LBB4_1
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; X64-NEXT: # %bb.2:
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; X64-NEXT: cqto
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; X64-NEXT: idivq %rsi
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; X64-NEXT: retq
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; X64-NEXT: .LBB4_1:
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; X64-NEXT: # kill: def $eax killed $eax killed $rax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: divl %esi
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; X64-NEXT: # kill: def $eax killed $eax def $rax
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; X64-NEXT: retq
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;
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; SLM-LABEL: div64_hugews:
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; SLM: # %bb.0:
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; SLM-NEXT: movq %rdi, %rcx
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; SLM-NEXT: movq %rdi, %rax
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; SLM-NEXT: orq %rsi, %rcx
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; SLM-NEXT: shrq $32, %rcx
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; SLM-NEXT: je .LBB4_1
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; SLM-NEXT: # %bb.2:
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; SLM-NEXT: cqto
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; SLM-NEXT: idivq %rsi
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; SLM-NEXT: retq
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; SLM-NEXT: .LBB4_1:
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; SLM-NEXT: xorl %edx, %edx
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; SLM-NEXT: # kill: def $eax killed $eax killed $rax
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; SLM-NEXT: divl %esi
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; SLM-NEXT: # kill: def $eax killed $eax def $rax
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; SLM-NEXT: retq
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;
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; SKL-LABEL: div64_hugews:
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; SKL: # %bb.0:
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; SKL-NEXT: movq %rdi, %rax
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; SKL-NEXT: movq %rdi, %rcx
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; SKL-NEXT: orq %rsi, %rcx
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; SKL-NEXT: shrq $32, %rcx
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; SKL-NEXT: je .LBB4_1
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; SKL-NEXT: # %bb.2:
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; SKL-NEXT: cqto
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; SKL-NEXT: idivq %rsi
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; SKL-NEXT: retq
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; SKL-NEXT: .LBB4_1:
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; SKL-NEXT: # kill: def $eax killed $eax killed $rax
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; SKL-NEXT: xorl %edx, %edx
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; SKL-NEXT: divl %esi
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; SKL-NEXT: # kill: def $eax killed $eax def $rax
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; SKL-NEXT: retq
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;
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; HUGEWS-LABEL: div64_hugews:
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; HUGEWS: # %bb.0:
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; HUGEWS-NEXT: movq %rdi, %rax
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; HUGEWS-NEXT: cqto
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; HUGEWS-NEXT: idivq %rsi
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; HUGEWS-NEXT: retq
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%div = sdiv i64 %a, %b
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ret i64 %div
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}
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define i32 @div32_optsize(i32 %a, i32 %b) optsize {
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; CHECK-LABEL: div32_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: cltd
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; CHECK-NEXT: idivl %esi
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; CHECK-NEXT: retq
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;
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; HUGEWS-LABEL: div32_optsize:
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; HUGEWS: # %bb.0:
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; HUGEWS-NEXT: movl %edi, %eax
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; HUGEWS-NEXT: cltd
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; HUGEWS-NEXT: idivl %esi
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; HUGEWS-NEXT: retq
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%div = sdiv i32 %a, %b
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ret i32 %div
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}
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define i32 @div32_pgso(i32 %a, i32 %b) !prof !15 {
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; CHECK-LABEL: div32_pgso:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: cltd
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; CHECK-NEXT: idivl %esi
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; CHECK-NEXT: retq
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;
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; HUGEWS-LABEL: div32_pgso:
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; HUGEWS: # %bb.0:
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; HUGEWS-NEXT: movl %edi, %eax
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; HUGEWS-NEXT: cltd
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; HUGEWS-NEXT: idivl %esi
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; HUGEWS-NEXT: retq
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%div = sdiv i32 %a, %b
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ret i32 %div
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}
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define i32 @div32_minsize(i32 %a, i32 %b) minsize {
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; CHECK-LABEL: div32_minsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: cltd
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; CHECK-NEXT: idivl %esi
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; CHECK-NEXT: retq
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;
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; HUGEWS-LABEL: div32_minsize:
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; HUGEWS: # %bb.0:
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; HUGEWS-NEXT: movl %edi, %eax
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; HUGEWS-NEXT: cltd
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; HUGEWS-NEXT: idivl %esi
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; HUGEWS-NEXT: retq
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%div = sdiv i32 %a, %b
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ret i32 %div
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}
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!llvm.module.flags = !{!1}
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!1 = !{i32 1, !"ProfileSummary", !2}
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!2 = !{!3, !4, !5, !6, !7, !8, !9, !10}
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!3 = !{!"ProfileFormat", !"InstrProf"}
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!4 = !{!"TotalCount", i64 10000}
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!5 = !{!"MaxCount", i64 1000}
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!6 = !{!"MaxInternalCount", i64 1}
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!7 = !{!"MaxFunctionCount", i64 1000}
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!8 = !{!"NumCounts", i64 3}
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!9 = !{!"NumFunctions", i64 3}
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!10 = !{!"DetailedSummary", !11}
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!11 = !{!12, !13, !14}
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!12 = !{i32 10000, i64 1000, i32 1}
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!13 = !{i32 999000, i64 1000, i32 3}
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!14 = !{i32 999999, i64 5, i32 3}
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!15 = !{!"function_entry_count", i64 0}
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