Jay Foad ddd3807e69 [AMDGPU] Use new target MMO flag MONoClobber ... This allows us to set the noclobber flag on (the MMO of) a load instruction instead of on the pointer. This fixes a bug where noclobber was being applied to all loads from the same pointer, even if some of them were clobbered. Differential Revision: https://reviews.llvm.org/D118775		2022-02-02 17:12:36 +00:00
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custom-pseudo-source-values.ll	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
expected-target-index-name.mir	…
intrinsics.mir	…
invalid-frame-index-invalid-fixed-stack.mir	…
invalid-frame-index-invalid-stack.mir	…
invalid-frame-index-no-stack.mir	…
invalid-frame-index.mir	…
invalid-frame-index2.mir	…
invalid-target-index-operand.mir	…
lit.local.cfg	…
llc-target-cpu-attr-from-cmdline-ir.mir	…
llc-target-cpu-attr-from-cmdline.mir	…
load-store-opt-dlc.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
machine-function-info-after-pei.ll	…
machine-function-info-dynlds-align-invalid-case.mir	…
machine-function-info-no-ir.mir	AMDGPU: Enable fixed function ABI by default	2021-12-04 10:49:18 -05:00
machine-function-info-register-parse-error1.mir	…
machine-function-info-register-parse-error2.mir	…
machine-function-info.ll	AMDGPU: Enable fixed function ABI by default	2021-12-04 10:49:18 -05:00
machine-metadata-error.mir	[MIRParser] Add machine metadata.	2021-06-28 22:29:36 -04:00
machine-metadata.mir	Revert "[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range"	2021-12-22 11:39:28 -05:00
mfi-frame-offset-reg-class.mir	…
mfi-parse-error-frame-offset-reg.mir	…
mfi-parse-error-scratch-rsrc-reg.mir	…
mfi-parse-error-stack-ptr-offset-reg.mir	…
mfi-scratch-rsrc-reg-reg-class.mir	…
mfi-stack-ptr-offset-reg-class.mir	…
mir-canon-multi.mir	…
mircanon-memoperands.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
parse-order-reserved-regs.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
stack-id-assert.mir	Revert "[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range"	2021-12-22 11:39:28 -05:00
stack-id.mir	…
subreg-def-is-not-ssa.mir	…
syncscopes.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
target-flags.mir	…
target-index-operands.mir	…
target-memoperands.mir	[AMDGPU] Use new target MMO flag MONoClobber	2022-02-02 17:12:36 +00:00