79 lines
2.6 KiB
LLVM
79 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv64 -mattr=+m,+f,+d,+a,+c,+experimental-v \
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; RUN: -verify-machineinstrs -O2 < %s | FileCheck %s
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declare i64 @llvm.riscv.vsetvli(i64, i64, i64)
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declare <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(
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<vscale x 1 x double>,
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<vscale x 1 x double>,
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i64)
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declare <vscale x 1 x i64> @llvm.riscv.vle.mask.nxv1i64(
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<vscale x 1 x i64>,
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<vscale x 1 x i64>*,
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<vscale x 1 x i1>,
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i64)
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define <vscale x 1 x double> @test1(i64 %avl, <vscale x 1 x double> %a, <vscale x 1 x double> %b) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli a0, a0, e64, m1, ta, mu
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; CHECK-NEXT: vfadd.vv v8, v8, v9
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; CHECK-NEXT: ret
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entry:
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%0 = tail call i64 @llvm.riscv.vsetvli(i64 %avl, i64 2, i64 7)
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%1 = tail call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(
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<vscale x 1 x double> %a,
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<vscale x 1 x double> %b,
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i64 %0)
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ret <vscale x 1 x double> %1
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}
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define <vscale x 1 x double> @test2(i64 %avl, <vscale x 1 x double> %a, <vscale x 1 x double> %b) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli a0, a0, e64, m1, ta, mu
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; CHECK-NEXT: vfadd.vv v8, v8, v9
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; CHECK-NEXT: ret
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entry:
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%0 = tail call i64 @llvm.riscv.vsetvli(i64 %avl, i64 2, i64 7)
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%1 = tail call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(
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<vscale x 1 x double> %a,
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<vscale x 1 x double> %b,
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i64 %avl)
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ret <vscale x 1 x double> %1
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}
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define <vscale x 1 x i64> @test3(i64 %avl, <vscale x 1 x i64> %a, <vscale x 1 x i64>* %b, <vscale x 1 x i1> %c) nounwind {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli a0, a0, e64, m1, tu, mu
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; CHECK-NEXT: vle64.v v8, (a1), v0.t
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; CHECK-NEXT: ret
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entry:
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%0 = tail call i64 @llvm.riscv.vsetvli(i64 %avl, i64 3, i64 0)
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%1 = call <vscale x 1 x i64> @llvm.riscv.vle.mask.nxv1i64(
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<vscale x 1 x i64> %a,
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<vscale x 1 x i64>* %b,
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<vscale x 1 x i1> %c,
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i64 %0)
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ret <vscale x 1 x i64> %1
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}
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define <vscale x 1 x i64> @test4(i64 %avl, <vscale x 1 x i64> %a, <vscale x 1 x i64>* %b, <vscale x 1 x i1> %c) nounwind {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli a0, a0, e64, m1, tu, mu
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; CHECK-NEXT: vle64.v v8, (a1), v0.t
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; CHECK-NEXT: ret
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entry:
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%0 = tail call i64 @llvm.riscv.vsetvli(i64 %avl, i64 3, i64 0)
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%1 = call <vscale x 1 x i64> @llvm.riscv.vle.mask.nxv1i64(
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<vscale x 1 x i64> %a,
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<vscale x 1 x i64>* %b,
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<vscale x 1 x i1> %c,
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i64 %avl)
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ret <vscale x 1 x i64> %1
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}
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