43 lines
1.2 KiB
LLVM
43 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64 -mattr=+v8.5a,+rand %s -o - | FileCheck %s
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define i32 @rndr(i64* %__addr) {
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; CHECK-LABEL: rndr:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mrs x10, RNDR
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; CHECK-NEXT: mov x9, x0
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; CHECK-NEXT: cset w8, eq
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; CHECK-NEXT: and w8, w8, #0x1
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; CHECK-NEXT: mov w0, w8
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; CHECK-NEXT: str x10, [x9]
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; CHECK-NEXT: ret
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%1 = tail call { i64, i1 } @llvm.aarch64.rndr()
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%2 = extractvalue { i64, i1 } %1, 0
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%3 = extractvalue { i64, i1 } %1, 1
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store i64 %2, i64* %__addr, align 8
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%4 = zext i1 %3 to i32
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ret i32 %4
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}
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define i32 @rndrrs(i64* %__addr) {
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; CHECK-LABEL: rndrrs:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mrs x10, RNDRRS
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; CHECK-NEXT: mov x9, x0
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; CHECK-NEXT: cset w8, eq
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; CHECK-NEXT: and w8, w8, #0x1
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; CHECK-NEXT: mov w0, w8
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; CHECK-NEXT: str x10, [x9]
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; CHECK-NEXT: ret
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%1 = tail call { i64, i1 } @llvm.aarch64.rndrrs()
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%2 = extractvalue { i64, i1 } %1, 0
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%3 = extractvalue { i64, i1 } %1, 1
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store i64 %2, i64* %__addr, align 8
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%4 = zext i1 %3 to i32
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ret i32 %4
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}
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declare { i64, i1 } @llvm.aarch64.rndr()
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declare { i64, i1 } @llvm.aarch64.rndrrs()
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