109 lines
3.5 KiB
C++
109 lines
3.5 KiB
C++
//=== lib/CodeGen/GlobalISel/AArch64PreLegalizerCombiner.cpp --------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass does combining of machine instructions at the generic MI level,
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// before the legalizer.
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//
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//===----------------------------------------------------------------------===//
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#include "AArch64TargetMachine.h"
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#include "llvm/CodeGen/GlobalISel/Combiner.h"
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#include "llvm/CodeGen/GlobalISel/CombinerHelper.h"
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#include "llvm/CodeGen/GlobalISel/CombinerInfo.h"
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#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/Support/Debug.h"
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#define DEBUG_TYPE "aarch64-prelegalizer-combiner"
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using namespace llvm;
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using namespace MIPatternMatch;
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namespace {
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class AArch64PreLegalizerCombinerInfo : public CombinerInfo {
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public:
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AArch64PreLegalizerCombinerInfo()
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: CombinerInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false,
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/*LegalizerInfo*/ nullptr) {}
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virtual bool combine(CombinerChangeObserver &Observer, MachineInstr &MI,
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MachineIRBuilder &B) const override;
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};
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bool AArch64PreLegalizerCombinerInfo::combine(CombinerChangeObserver &Observer,
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MachineInstr &MI,
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MachineIRBuilder &B) const {
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CombinerHelper Helper(Observer, B);
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switch (MI.getOpcode()) {
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default:
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return false;
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case TargetOpcode::G_LOAD:
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case TargetOpcode::G_SEXTLOAD:
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case TargetOpcode::G_ZEXTLOAD:
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return Helper.tryCombineExtendingLoads(MI);
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}
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return false;
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}
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// Pass boilerplate
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// ================
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class AArch64PreLegalizerCombiner : public MachineFunctionPass {
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public:
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static char ID;
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AArch64PreLegalizerCombiner();
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StringRef getPassName() const override { return "AArch64PreLegalizerCombiner"; }
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bool runOnMachineFunction(MachineFunction &MF) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override;
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};
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}
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void AArch64PreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<TargetPassConfig>();
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AU.setPreservesCFG();
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getSelectionDAGFallbackAnalysisUsage(AU);
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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AArch64PreLegalizerCombiner::AArch64PreLegalizerCombiner() : MachineFunctionPass(ID) {
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initializeAArch64PreLegalizerCombinerPass(*PassRegistry::getPassRegistry());
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}
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bool AArch64PreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
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if (MF.getProperties().hasProperty(
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MachineFunctionProperties::Property::FailedISel))
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return false;
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auto *TPC = &getAnalysis<TargetPassConfig>();
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AArch64PreLegalizerCombinerInfo PCInfo;
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Combiner C(PCInfo, TPC);
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return C.combineMachineInstrs(MF);
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}
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char AArch64PreLegalizerCombiner::ID = 0;
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INITIALIZE_PASS_BEGIN(AArch64PreLegalizerCombiner, DEBUG_TYPE,
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"Combine AArch64 machine instrs before legalization",
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false, false)
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INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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INITIALIZE_PASS_END(AArch64PreLegalizerCombiner, DEBUG_TYPE,
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"Combine AArch64 machine instrs before legalization", false,
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false)
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namespace llvm {
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FunctionPass *createAArch64PreLegalizeCombiner() {
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return new AArch64PreLegalizerCombiner();
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}
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} // end namespace llvm
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