llvm-project/llvm/test/CodeGen/MIR/AMDGPU
Matt Arsenault 10207fc5ae AMDGPU: Move test to correct location
This is not a MIR printer/parser test, so it belongs with the ordinary
codegen tests.
2022-09-21 11:30:32 -04:00
..
custom-pseudo-source-values.ll
dead-flag-on-use-operand-parse-error.mir
empty-custom-regmask.mir MIR: Fix parse error on empty CustomRegMask 2022-06-27 08:50:35 -04:00
expected-target-index-name.mir
extra-imm-operand.mir [MIR] Provide location of extra instruction operand when diagnosing it. 2022-05-20 05:56:25 +01:00
extra-reg-operand.mir [MIR] Provide location of extra instruction operand when diagnosing it. 2022-05-20 05:56:25 +01:00
intrinsics.mir
invalid-frame-index-invalid-fixed-stack.mir
invalid-frame-index-invalid-stack.mir
invalid-frame-index-no-stack.mir
invalid-frame-index.mir
invalid-frame-index2.mir
invalid-target-index-operand.mir
killed-flag-on-def-parse-error.mir
lit.local.cfg
llc-target-cpu-attr-from-cmdline-ir.mir
llc-target-cpu-attr-from-cmdline.mir
machine-function-info-after-pei.ll AMDGPU: Serialize VGPRForAGPRCopy 2022-04-19 22:14:52 -04:00
machine-function-info-dynlds-align-invalid-case.mir
machine-function-info-no-ir.mir [amdgpu] Implement lds kernel id intrinsic 2022-07-19 17:46:19 +01:00
machine-function-info-register-parse-error1.mir
machine-function-info-register-parse-error2.mir
machine-function-info.ll [amdgpu] Implement lds kernel id intrinsic 2022-07-19 17:46:19 +01:00
machine-metadata-error.mir
machine-metadata.mir
mfi-frame-offset-reg-class.mir
mfi-parse-error-frame-offset-reg.mir
mfi-parse-error-scratch-rsrc-reg.mir
mfi-parse-error-stack-ptr-offset-reg.mir
mfi-scratch-rsrc-reg-reg-class.mir
mfi-stack-ptr-offset-reg-class.mir
mir-canon-multi.mir
mircanon-memoperands.mir
parse-order-reserved-regs.mir
stack-id-assert.mir [AMDGPU][NFC] Refactor AMDGPUCallingConv.td 2022-06-01 16:24:09 +00:00
stack-id.mir
subreg-def-is-not-ssa.mir
syncscopes.mir
target-flags.mir
target-index-operands.mir
target-memoperands.mir
vgpr-for-agpr-copy-invalid-reg.mir AMDGPU: Serialize VGPRForAGPRCopy 2022-04-19 22:14:52 -04:00
wwm-reserved-regs-invalid-reg.mir AMDGPU: Serialize WWM registers 2022-04-19 21:44:43 -04:00
wwm-reserved-regs-not-a-reg.mir AMDGPU: Serialize WWM registers 2022-04-19 21:44:43 -04:00
wwm-reserved-regs.mir AMDGPU: Serialize WWM registers 2022-04-19 21:44:43 -04:00