llvm-project/llvm/test/MC/Disassembler
Amara Emerson fecdb36f92 [AArch64][TableGen] Skip tied result operands for InstAlias
This patch checks the number of operands in the resulting
instruction instead of just the alias, then skips over
tied operands when generating the printing method.

This allows us to generate the preferred assembly syntax
for the AArch64 'ins' instruction, which should always be
displayed as 'mov' according to the ARMARM.

Several unit tests have changed as a result, but only to
reflect the preferred disassembly.

Some other InstAlias patterns (movk/bic/orr) needed a
slight adjustment to stop them becoming the default
and breaking other unit tests.

Patch by Graham Hunter.

Differential Revision: https://reviews.llvm.org/D29219

llvm-svn: 294437
2017-02-08 11:28:08 +00:00
..
AArch64 [AArch64][TableGen] Skip tied result operands for InstAlias 2017-02-08 11:28:08 +00:00
AMDGPU Reapply [AMDGPU][mc][tests][NFC] Add coverage/smoke tests for Gfx7 and Gfx8. 2017-01-30 21:59:21 +00:00
ARM [ARM] Saturation instructions are DSP-only 2016-07-25 22:25:25 +00:00
Hexagon [Hexagon] Adding gp+ to the syntax of gp-relative instructions 2017-02-06 23:18:57 +00:00
Lanai [lanai] Add Lanai backend. 2016-03-28 13:09:54 +00:00
Mips [mips] Correct c.cond.fmt instruction definition. 2017-01-16 13:55:58 +00:00
PowerPC Add some Book-E instructions to the asm parser and printer. 2017-01-29 04:55:57 +00:00
Sparc This change adds co-processor condition branching and conditional traps to the Sparc back-end. 2016-03-09 18:20:21 +00:00
SystemZ [SystemZ] Support remaining atomic instructions 2016-12-02 18:24:16 +00:00
X86 [X86] Remove PCOMMIT instruction support since Intel has deprecated this instruction with no plans to release products with it. 2017-02-08 05:45:39 +00:00
XCore