llvm-project/llvm/test/MC/Disassembler/Hexagon
Krzysztof Parzyszek 5b4a6b67c5 [Hexagon] Adding gp+ to the syntax of gp-relative instructions
Patch by Colin LeMahieu.

llvm-svn: 294258
2017-02-06 23:18:57 +00:00
..
alu32_alu.txt
alu32_perm.txt
alu32_pred.txt
cr.txt
invalid_packet.txt
j.txt
jr.txt [Hexagon] Treat all conditional branches as predicted (not-taken by default) 2016-05-09 18:22:07 +00:00
ld.txt [Hexagon] Adding gp+ to the syntax of gp-relative instructions 2017-02-06 23:18:57 +00:00
lit.local.cfg
memop.txt
nv_j.txt
nv_st.txt [Hexagon] Adding gp+ to the syntax of gp-relative instructions 2017-02-06 23:18:57 +00:00
st.txt [Hexagon] Adding gp+ to the syntax of gp-relative instructions 2017-02-06 23:18:57 +00:00
system_user.txt
too_many_instructions.txt
too_many_loop_ends.txt
unextendable.txt
xtype_alu.txt
xtype_bit.txt
xtype_complex.txt
xtype_fp.txt
xtype_mpy.txt
xtype_perm.txt
xtype_pred.txt
xtype_shift.txt