Add a test case with new call before covergroup definition

Signed-off-by: Artur Bieniek <abieniek@internships.antmicro.com>

src/verilog.y

@@ -6798,19 +6798,19 @@ covergroup_extendsE<fl>:  // IEEE: Part of covergroup_declaration
 covergroup_declarationFront<classp>:  // IEEE: part of covergroup_declaration
                 yCOVERGROUP covergroup_extendsE idAny
                         {
-                         $$ = new AstClass{$<fl>3, *$3, PARSEP->libname()};
+                          $$ = new AstClass{$<fl>3, *$3, PARSEP->libname()};
 
-                         AstFunc* const sample = new AstFunc{$<fl>1, "sample", nullptr, nullptr};
-                         sample->classMethod(true);
-                         sample->dtypep(sample->findVoidDType());
-                         $$->addMembersp(sample);
+                          AstFunc* const sample = new AstFunc{$<fl>1, "sample", nullptr, nullptr};
+                          sample->classMethod(true);
+                          sample->dtypep(sample->findVoidDType());
+                          $$->addMembersp(sample);
 
-                         AstFunc* const getCoverage = new AstFunc{$<fl>1, "get_coverage", nullptr, nullptr};
-                         getCoverage->classMethod(true);
-                         getCoverage->dtypep(getCoverage->findVoidDType());
-                         $$->addMembersp(getCoverage);
+                          AstFunc* const getCoverage = new AstFunc{$<fl>1, "get_coverage", nullptr, nullptr};
+                          getCoverage->classMethod(true);
+                          getCoverage->dtypep(getCoverage->findVoidDType());
+                          $$->addMembersp(getCoverage);
 
-                         BBCOVERIGN($<fl>1, "Ignoring unsupported: covergroup"); }
+                          BBCOVERIGN($<fl>1, "Ignoring unsupported: covergroup"); }
                 ;
 
 cgexpr<nodeExprp>:  // IEEE-2012: covergroup_expression, before that just expression
@@ -7528,11 +7528,11 @@ class_item<nodep>:                      // ==IEEE: class_item
         |       timeunits_declaration                   { $$ = $1; }
         |       covergroup_declaration
                         {
-                                const string cgName = $1->name();
-                                $1->name("__vlAnonCG_" + cgName);
-                                AstVar* const newp = new AstVar{$<fl>1, VVarType::VAR, cgName, VFlagChildDType{}, new AstRefDType($<fl>1, $1->name())};
-                                $$ = addNextNull($1, newp);
-                         }
+                          const string cgName = $1->name();
+                          $1->name("__vlAnonCG_" + cgName);
+                          AstVar* const newp = new AstVar{$<fl>1, VVarType::VAR, cgName, VFlagChildDType{}, new AstRefDType($<fl>1, $1->name())};
+                          $$ = addNextNull($1, newp);
+                        }
         //                      // local_parameter_declaration under parameter_declaration
         |       parameter_declaration ';'               { $$ = $1; }
         |       ';'                                     { $$ = nullptr; }

test_regress/t/t_covergroup_extends_newfirst.py

@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.compile()
+
+test.passes()

test_regress/t/t_covergroup_extends_newfirst.v

@@ -0,0 +1,39 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Antmicro.
+// SPDX-License-Identifier: CC0-1.0
+
+/* verilator lint_off COVERIGN */
+module t;
+    class base;
+        function new();
+            g1 = new(0);
+        endfunction
+        enum {red, green, blue} color;
+        covergroup g1 (bit [3:0] a) with function sample(bit b);
+            option.weight       = 10;
+            option.per_instance = 1;
+            coverpoint a;
+            coverpoint b;
+            c: coverpoint color;
+        endgroup
+    endclass
+
+    class derived extends base;
+        bit d;
+        function new();
+            super.new();
+        endfunction
+        covergroup extends g1;
+            option.weight = 1;  // overrides the weight from base g1
+                                // uses per_instance = 1 from base g1
+            c: coverpoint color // overrides the c coverpoint in base g1
+            {
+                ignore_bins ignore = {blue};
+            }
+            coverpoint d;       // adds new coverpoint
+            cross a, d;         // crosses new coverpoint with inherited one
+        endgroup :g1
+    endclass
+endmodule