Commit Graph

20 Commits

Author SHA1 Message Date
Andrew Lenharth 164dbaf9cd
[HW] Change printer for modules (#6205)
This is quite invasive.  This converts from the functiontype printer to the moduletype printer.

---------

Co-authored-by: Mike Urbach <mikeurbach@gmail.com>
2023-09-28 16:30:15 -05:00
Nandor Licker 0fc8656168
[Seq] Switch all seq ops to use seq.clock (#6139) 2023-09-18 16:38:32 +03:00
Will Dietz 6b1f90d2b9 [FSM][NFC] Use proper syntax for CHECK-SAME{LITERAL}. 2023-07-28 11:52:41 -05:00
Will Dietz 5c8774cd31 [FSM][NFC] Touchup test, address old FIXME. 2023-07-28 11:47:17 -05:00
Morten Borup Petersen e80520b7c9
[CalyxToFSM] Add FSM-flow remove groups pass (#4600)
This commit adds a version of the Calyx remove-groups pass tailored for
the FSM flow. Specifically, it will perform FSM outlining alongside group
rewriting - which interacts with the FSM I/O (group go/done signals).

Technically, we now (finally) have an end-to-end flow for SCF->Calyx->FSM->SV.
The usability of the end-to-end flow is still fairly restricted, mainly
due to:
1. the lack of support for lowering Calyx memory ops
2. The lack of support for lowering `calyx.par` ops in the FSM lowering
   (this shouldn't be too difficult).

A fair amount of state is stored in attributes in between `materialize-calyx-to-fsm`
and `calyx-remove-groups-fsm`. I'm debating with myself whether that's code
smell or just a necessary evil given the approach taken. Nevertheless, I
did this work because of being frustrated with the disconnection of Calyx
from the rest of CIRCT, which renders it unuseable. Since I was the author
of the FSM flow, I figured that i'd might aswell finish the end-to-end
prototype before stepping somewhat away from Calyx-related development.

I'm hoping that given this end-to-end prototype, there's enough existing
infrastructure for others to pick up the torch and flesh out the
missing pieces.

Some additional notes:
* Also makes `calyx.component` contain a graph region to make it a bit less
of a pain to specify SSA dependencies between cells.
* Also fixes various small bugs highlighted by this conversion.
2023-01-31 14:52:24 +01:00
Morten Borup Petersen 9b55da472e [FSM] Make StateOp output, transition regions optional in ODS 2022-07-25 13:41:17 +02:00
Morten Borup Petersen db51969d33 [FSM] Output region of state ops are optional
Fixes an issue with round-tripping `fsm.state` variables.
2022-07-25 13:18:54 +02:00
Morten Borup Petersen 9fb68cfbf0 [FSM] Disallow multiple updates to the same variable in a transition action 2022-07-19 10:00:22 +02:00
Morten Borup Petersen 56a260a1d4
[FSMToSV] Add FSM to SV conversion pass (#3483)
This commit introduces an FSM to SV lowering pass, as well as some small modifications to the FSM dialect to facilitate the conversion. This initial version of the pass does not support transition action regions and variables.

The lowering style is fairly straight forward; two processes are emitted, one `always_ff` for state register inference, one `always_comb` for next-state calculation and output assignments.

e.g.:
```mlir
fsm.machine @top(%a0: i1, %arg1: i1) -> (i8, i8) attributes {initialState = "A", argNames = ["a0", "a1"], resNames = ["r0", "r1"]} {
  %c_42 = hw.constant 42 : i8
  fsm.state @A output  {
    %c_0 = hw.constant 0 : i8
    fsm.output %c_0, %c_42 : i8, i8
  } transitions {
    fsm.transition @B
  }

  fsm.state @B output  {
    %c_1 = hw.constant 1 : i8
    fsm.output %c_1, %c_42 : i8, i8
  } transitions {
    fsm.transition @A guard {
      %g = comb.and %a0, %arg1 : i1
      fsm.return %g
    }
  }
}
```
emits as
```sv
typedef enum {A, B} top_state_t;
module top(
  input        a0,
               a1,
               clk,
               rst,
  output [7:0] r0,
               r1);

  reg  [7:0]       output_1;
  reg  [7:0]       output_0;
      top_state_t next_state;
  wire top_state_t to_A;
  wire top_state_t to_B;
      top_state_t state_reg;

  assign to_A = A;
  assign to_B = B;
  always_ff @(posedge clk) begin
    if (rst)
      state_reg <= to_A;
    else
      state_reg <= next_state;
  end
  always_comb begin
    case (state_reg)
      A: begin
        next_state = to_B;
        output_0 = 8'h0;
        output_1 = 8'h2A;
      end
      B: begin
        next_state = a0 & a1 ? to_A : to_B;
        output_0 = 8'h1;
        output_1 = 8'h2A;
      end
    endcase
  end
  assign r0 = output_0;
  assign r1 = output_1;
endmodule
```
2022-07-16 21:57:24 +02:00
Morten Borup Petersen a36824425e
[FSM] Make state names SymbolNameAttrs (#3470)
States are now described as a symbol (using @) instead of the previously used string notation.
2022-07-04 13:32:51 +02:00
Morten Borup Petersen 230809aaea
[FSM] Remove SingleBlockImplicitTerminator from StateOp, TransitionOp (#3405)
This was essentially enforcing unintended behavior and making it weird to target FSM as a front-end. Previously, `SingleBlockImplicitTerminator<"OutputOp">` required an OutputOp to be in both the output and transition regions, where it really only made sense for the output region.

It's a similar story for the TransitionOp and `SingleBlockImplicitTerminator<"ReturnOp">`.

This, and other small fixes, have been moved to FSMOps.cpp
2022-06-27 12:01:47 +02:00
Morten Borup Petersen 3fb1408569
[FSM] Remove statetype from MachineOp (#3382)
There is currently no rationale for explicitly annotating the type that states (a state register) should be inferred as for a machine op. Annotating it upon constructing the machine op is therefore just an extra burden on the front-end, and may also be a premature constraint.

As i see it, default behaviour should just be to infer a state type via. e.g. ceil_log2(# states) when lowering to hardware. If some other behaviour is needed, then this should be lowering specific.
2022-06-21 08:41:07 +02:00
Schuyler Eldridge f3de52c5a8
Revert "[FSM] Canonicalize away unreachable states (#3020)"
Blameless revert of e1cf64ad00.  This is
done because there are some issues with the approach around
canonicalization that can cause intermittent failures in tests.  This
will be fixed up in #3131.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
2022-05-17 17:51:36 -04:00
Morten Borup Petersen fdc98b1e9c
[FSM] Implement graph traits for `fsm.machine` (#3073)
Initial implementation of LLVM graph traits for an FSM machine operation. This will most likely be a useful piece of code for building further transformations, visualizations, ... upon.
2022-05-10 09:30:29 +02:00
Aliaksei Chapyzhenka 37b7baff75
LLVM bump (as we know it) (#3074)
* LLVM bump (as we know it)

* minor format fix

* DCMAKE_BUILD_TYPE=?

* Update lib/Dialect/MSFT/MSFTOps.cpp

Co-authored-by: Andrew Young <youngar17@gmail.com>

* Update lib/Dialect/FIRRTL/FIRRTLOps.cpp

Co-authored-by: Andrew Young <youngar17@gmail.com>

* Update lib/Dialect/Calyx/CalyxOps.cpp

Co-authored-by: Andrew Young <youngar17@gmail.com>

* removed anon module test

Co-authored-by: Andrew Young <youngar17@gmail.com>
2022-05-09 14:30:14 -07:00
Morten Borup Petersen 0e7ccfe761
[FSM] Make transition guard and action regions optional (#3021)
Guard and action regions are now optional. This is already stated in the dialect rationale, but was not implemented.
2022-05-04 09:17:28 +02:00
Morten Borup Petersen e1cf64ad00
[FSM] Canonicalize away unreachable states (#3020)
Since we currently only allow a single initial state for the state machine, it is a reasonable assumption that any unreasonable states may be pruned as part of canonicalization.
2022-05-04 09:17:13 +02:00
Morten Borup Petersen a560084888
[FSM] Make initial state explicit (#3019)
Previously, the first state in the machine was assumed to be the initial state - I believe being explicit here is important to ensure the machine behaves as intended. Also modified "default" state to "initial" state (seems to be more consistent with litterature).
2022-05-04 08:33:39 +02:00
Martin Erhart aab7c1a212
[LLVM] Bump LLVM to adopt 'pretty accessors' (#2008)
This requires a lot of renaming of operations from the standard dialect to the arith dialect which was split off since the last LLVM bump.
2021-10-18 09:06:14 +02:00
Hanchen Ye 21b757a026
[FSM] Add FSM operations (#1638) 2021-09-02 16:41:04 -05:00