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README.md

X-Core

X-Core is an open source in-order 5-stage RISC-V 32-bit MCU processor. It supports RV32IM, mainly for RISC-V learning, teaching, and experiments. We use some core codes from PULP RI5CY, and partial SoC peripheral components and SDK from Hummingbird E200.

X-Core:

  • 5-stage pipeline, RV32IM, 50MHz on FPGA board
  • JTAG inferface, supports GDB
  • ITIM: 64KB (configurable), DTIM: 64KB (configurable)
  • QSPI interface for onboard flash
  • Peripheral components, including IIC, UART, SPI, GPIO, PWM, XADC, TIMER.

Evaluation Board

Perf-V FPGA Board Image

Support