Commit Graph

44560 Commits

Author SHA1 Message Date
Cameron Zwarich 25d046ce68 Land a first cut at StrongPHIElimination. There are only 5 new test failures
when running without the verifier, and I have not yet checked them to see if
the new results are still correct. There are more verifier failures, but they
all seem to be additional occurrences of verifier failures that occur with the
existing PHIElimination pass. There are a few obvious issues with the code:

1) It doesn't properly update the register equivalence classes during copy
insertion, and instead recomputes them before merging live intervals and
renaming registers. I wanted to keep this first patch simple for debugging
purposes, but it shouldn't be very hard to do this.

2) It doesn't mix the renaming and live interval merging with the copy insertion
process, which leads to a lot of virtual register churn. Virtual registers and
live intervals are created, only to later be merged into others. The code should
be smarter and only create a new virtual register if there is no existing
register in the same congruence class.

3) In one place the code uses a DenseMap per basic block, which is unnecessary
heap allocation. There should be an inline storage version of DenseMap.

I did a quick compile-time test of running llc on 403.gcc with and without
StrongPHIElimination. It is slightly slower with StrongPHIElimination, because
the small decrease in the coalescer runtime can't beat the increase in phi
elimination runtime. Perhaps fixing the above performance issues will narrow
the gap.

I also haven't yet run any tests of the quality of the generated code.

llvm-svn: 122582
2010-12-27 10:08:19 +00:00
Cameron Zwarich b95bfe1667 Add knowledge of phi-def and phi-kill valnos to MachineVerifier's predecessor
valno verification. The "Different value live out of predecessor" check is
incorrect in the case of phi-def valnos, so just skip that check for phi-def
valnos and instead check that all of the valnos for predecessors have phi-kill.
Fixes PR8863.

llvm-svn: 122581
2010-12-27 05:17:23 +00:00
Michael J. Spencer 9e590024f6 Support/PathV1: Deprecate GetRootDirectory.
llvm-svn: 122580
2010-12-27 03:21:41 +00:00
Rafael Espindola 8fc59a682f Handle reloc_riprel_4byte_movq_load. Should make the bots happy.
llvm-svn: 122579
2010-12-27 02:03:24 +00:00
Rafael Espindola 2ac8355ecd Add support for the same encodings of the personality function that gnu as
supports.

llvm-svn: 122577
2010-12-27 00:36:05 +00:00
Benjamin Kramer 84bd73c527 BuildLibCalls: Nuke EmitMemCpy, EmitMemMove and EmitMemSet. They are dead and superseded by IRBuilder.
llvm-svn: 122576
2010-12-27 00:25:32 +00:00
Benjamin Kramer 7cba269dfb SimplifyLibCalls: Use IRBuilder to simplify code.
llvm-svn: 122575
2010-12-27 00:16:46 +00:00
Chris Lattner b9fe685b9a have loop-idiom nuke instructions that feed stores that get removed.
llvm-svn: 122574
2010-12-27 00:03:23 +00:00
Chris Lattner 29e14edc8d implement enough of the memset inference algorithm to recognize and insert
memsets.  This is still missing one important validity check, but this is enough
to compile stuff like this:

void test0(std::vector<char> &X) {
  for (std::vector<char>::iterator I = X.begin(), E = X.end(); I != E; ++I)
    *I = 0;
}

void test1(std::vector<int> &X) {
  for (long i = 0, e = X.size(); i != e; ++i)
    X[i] = 0x01010101;
}

With:
 $ clang t.cpp -S -o - -O2 -emit-llvm | opt -loop-idiom | opt -O3 | llc 

to:

__Z5test0RSt6vectorIcSaIcEE:            ## @_Z5test0RSt6vectorIcSaIcEE
## BB#0:                                ## %entry
	subq	$8, %rsp
	movq	(%rdi), %rax
	movq	8(%rdi), %rsi
	cmpq	%rsi, %rax
	je	LBB0_2
## BB#1:                                ## %bb.nph
	subq	%rax, %rsi
	movq	%rax, %rdi
	callq	___bzero
LBB0_2:                                 ## %for.end
	addq	$8, %rsp
	ret
...
__Z5test1RSt6vectorIiSaIiEE:            ## @_Z5test1RSt6vectorIiSaIiEE
## BB#0:                                ## %entry
	subq	$8, %rsp
	movq	(%rdi), %rax
	movq	8(%rdi), %rdx
	subq	%rax, %rdx
	cmpq	$4, %rdx
	jb	LBB1_2
## BB#1:                                ## %for.body.preheader
	andq	$-4, %rdx
	movl	$1, %esi
	movq	%rax, %rdi
	callq	_memset
LBB1_2:                                 ## %for.end
	addq	$8, %rsp
	ret

llvm-svn: 122573
2010-12-26 23:42:51 +00:00
Chris Lattner 6cf8d6cc6e start using irbuilder to make mem intrinsics in a few passes.
llvm-svn: 122572
2010-12-26 22:57:41 +00:00
Chris Lattner 143a07cfee add methods to IRBuilder to create memcpy/memset/memmove.
llvm-svn: 122571
2010-12-26 22:49:25 +00:00
Rafael Espindola 54462cd730 Fix .cfi_personality on 32 bit systems.
llvm-svn: 122570
2010-12-26 22:47:37 +00:00
Rafael Espindola 9ae2d05d45 Add support for @note. Patch by Jörg Sonnenberger.
llvm-svn: 122568
2010-12-26 21:30:59 +00:00
Chris Lattner 7c5f9c35d1 sketch more of this out.
llvm-svn: 122567
2010-12-26 20:45:45 +00:00
Rafael Espindola 9141b611ad Add basic support for .cfi_personality.
llvm-svn: 122566
2010-12-26 20:20:31 +00:00
Chris Lattner 9cb1035f94 move isBytewiseValue out to ValueTracking.h/cpp
llvm-svn: 122565
2010-12-26 20:15:01 +00:00
Chris Lattner 81ae3f299a actually add the file...
llvm-svn: 122563
2010-12-26 19:39:38 +00:00
Chris Lattner 2ef535a4e4 Start of a pass for recognizing memset and memcpy idioms.
No functionality yet.

llvm-svn: 122562
2010-12-26 19:32:44 +00:00
Benjamin Kramer 30342fb1fd Simplify code.
llvm-svn: 122561
2010-12-26 15:23:45 +00:00
Chris Lattner f9e0a56b94 fix some sort of weird pasto
llvm-svn: 122560
2010-12-26 12:05:11 +00:00
Chris Lattner 424de3498b add a note
llvm-svn: 122559
2010-12-26 03:53:31 +00:00
Chris Lattner 03a102bff3 Generalize a previous change, fixing PR8855 - an valid large immediate
rejected by the mc assembler.

llvm-svn: 122557
2010-12-25 21:36:35 +00:00
Chris Lattner d729d0dcdb don't lose TD info
llvm-svn: 122556
2010-12-25 20:52:04 +00:00
Chris Lattner 20fca48341 switch the inliner alignment enforcement stuff to use the
getOrEnforceKnownAlignment function, which simplifies the code
and makes it stronger.

llvm-svn: 122555
2010-12-25 20:42:38 +00:00
Chris Lattner 6fcd32e7d7 Move getOrEnforceKnownAlignment out of instcombine into Transforms/Utils.
llvm-svn: 122554
2010-12-25 20:37:57 +00:00
Michael J. Spencer e13f1ead9b Support/PathV1: Deprecate makeAbsolute and remove Unix impl because it annoys people.
llvm-svn: 122553
2010-12-25 20:10:11 +00:00
Benjamin Kramer b90b2f0635 Fix a thinko pointed out by Frits van Bommel: looking through global variables in isBytewiseValue is not safe.
llvm-svn: 122550
2010-12-24 22:23:59 +00:00
Rafael Espindola 0f8abeba1d Merge IsFixupFullyResolved and IsSymbolRefDifferenceFullyResolved. We now
have a single point where targets test if a relocation is needed.

llvm-svn: 122549
2010-12-24 21:22:02 +00:00
Benjamin Kramer ea9152e551 MemCpyOpt: Turn memcpys from a constant into a memset if possible.
This allows us to compile "int cst[] = {-1, -1, -1};" into
  movl  $-1, 16(%rsp)
  movq  $-1, 8(%rsp)
instead of
  movl  _cst+8(%rip), %eax
  movl  %eax, 16(%rsp)
  movq  _cst(%rip), %rax
  movq  %rax, 8(%rsp)

llvm-svn: 122548
2010-12-24 21:17:12 +00:00
Daniel Dunbar 7f2bb4dcae MC/Mach-O/ARM: Start handling some Thumb branches.
llvm-svn: 122547
2010-12-24 16:41:46 +00:00
Andrew Trick 5ce945ca3a Minor cleanup related to my latest scheduler changes.
llvm-svn: 122545
2010-12-24 07:10:19 +00:00
Andrew Trick c94056692a Fix a few cases where the scheduler is not checking for phys reg copies. The scheduling node may have a NULL DAG node, yuck.
llvm-svn: 122544
2010-12-24 06:46:50 +00:00
Andrew Trick 10ffc2b6c2 Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.

Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.

Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.

Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.

ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.

ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.

llvm-svn: 122541
2010-12-24 05:03:26 +00:00
Andrew Trick c416ba612b whitespace
llvm-svn: 122539
2010-12-24 04:28:06 +00:00
Cameron Zwarich ab434079d3 Simplify a check for implicit defs and remove a FIXME.
llvm-svn: 122537
2010-12-24 03:09:36 +00:00
Kevin Enderby fa3c6f148c In llvm-mc parse a Hash token as a full line comment. Allows handling of
preprocessed .s files and matches darwin gas.  rdar://8798690
Also fix a comment on the next line of AsmParser.cpp after this new code.

llvm-svn: 122531
2010-12-24 00:12:02 +00:00
Jim Grosbach ffaea0f017 Use a StringSwitch<> instead of a manually constructed string matcher.
llvm-svn: 122530
2010-12-24 00:03:39 +00:00
Owen Anderson 226ac14afb When determining if we can fold (x >> C1) << C2, the bits that we need to verify are zero
are not the low bits of x, but the bits that WILL be the low bits after the operation completes.

llvm-svn: 122529
2010-12-23 23:56:24 +00:00
Evan Cheng 62de0fa671 Code clean up. No functionality change.
llvm-svn: 122528
2010-12-23 23:54:17 +00:00
Jim Grosbach 545858d209 Remove dead patterns.
llvm-svn: 122524
2010-12-23 23:20:13 +00:00
Jim Grosbach bcfa4a945a Recognize a few more documented register name aliases for ARM in the asm lexer.
llvm-svn: 122523
2010-12-23 23:19:54 +00:00
Bob Wilson 36be00ceb3 Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions.
If the basic block containing the BCCi64 (or BCCZi64) instruction ends with
an unconditional branch, that branch needs to be deleted before appending
the expansion of the BCCi64 to the end of the block.

llvm-svn: 122521
2010-12-23 22:45:49 +00:00
Owen Anderson 5d690d4168 It is possible for SimplifyCFG to cause PHI nodes to become redundant too late in the optimization
pipeline to be caught by instcombine, and it's not feasible to catch them in SimplifyCFG because the
use-lists are in an inconsistent state at the point where it could know that it need to simplify them.
Instead, have CodeGenPrepare look for trivially redundant PHIs as part of its general cleanup effort.

llvm-svn: 122516
2010-12-23 20:57:35 +00:00
Chris Lattner 2a0a3b43d7 Flag -> Glue, the ongoing saga
llvm-svn: 122513
2010-12-23 18:28:41 +00:00
Chris Lattner 11a33811b6 flags -> glue for selectiondag
llvm-svn: 122509
2010-12-23 17:24:32 +00:00
Chris Lattner f647e95b9a sdisel flag -> glue.
llvm-svn: 122507
2010-12-23 17:13:18 +00:00
Benjamin Kramer dfa40f8f19 Remove/fix invalid README entries. The well thought out strcpy function doesn't return a pointer to the end of the string.
llvm-svn: 122496
2010-12-23 15:32:07 +00:00
Benjamin Kramer b37ae33125 Remove some obsolete README items, add a new one off the top of my head.
llvm-svn: 122495
2010-12-23 15:07:02 +00:00
Andrew Trick 528fad91d2 Reorganize ListScheduleBottomUp in preparation for modeling machine cycles and instruction issue.
llvm-svn: 122491
2010-12-23 05:42:20 +00:00
Andrew Trick a52f325c35 Converted LiveRegCycles to LiveRegGens. It's easier to work with and allows multiple nodes per cycle.
llvm-svn: 122474
2010-12-23 04:16:14 +00:00
Andrew Trick 12acde11cb In CheckForLiveRegDef use TRI->getOverlaps.
llvm-svn: 122473
2010-12-23 03:43:21 +00:00
Andrew Trick 033efdf4d7 Fixes PR8823: add-with-overflow-128.ll
In the bottom-up selection DAG scheduling, handle two-address
instructions that read/write unspillable registers. Treat
the entire chain of two-address nodes as a single live range.

llvm-svn: 122472
2010-12-23 03:15:51 +00:00
Mon P Wang 18b762a946 Preserve the address space when generating bitcasts for MemTransferInst in ConvertToScalarInfo
llvm-svn: 122462
2010-12-23 01:41:32 +00:00
Jeffrey Yasskin 9b43f33620 Change all self assignments X=X to (void)X, so that we can turn on a
new gcc warning that complains on self-assignments and
self-initializations.

llvm-svn: 122458
2010-12-23 00:58:24 +00:00
Jim Grosbach 8c48503baa Trailing whitespace.
llvm-svn: 122456
2010-12-22 23:26:02 +00:00
Benjamin Kramer 1f4dfbbcb0 DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal. The latter usually compiles into smaller code.
example code:
unsigned foo(unsigned x, unsigned y) {
  if (x != 0) y--;
  return y;
}

before:
  _foo:                           ## @foo
    cmpl  $1, 4(%esp)             ## encoding: [0x83,0x7c,0x24,0x04,0x01]
    sbbl  %eax, %eax              ## encoding: [0x19,0xc0]
    notl  %eax                    ## encoding: [0xf7,0xd0]
    addl  8(%esp), %eax           ## encoding: [0x03,0x44,0x24,0x08]
    ret                           ## encoding: [0xc3]

after:
  _foo:                           ## @foo
    cmpl  $1, 4(%esp)             ## encoding: [0x83,0x7c,0x24,0x04,0x01]
    movl  8(%esp), %eax           ## encoding: [0x8b,0x44,0x24,0x08]
    adcl  $-1, %eax               ## encoding: [0x83,0xd0,0xff]
    ret                           ## encoding: [0xc3]

llvm-svn: 122455
2010-12-22 23:17:45 +00:00
Benjamin Kramer 8ef5001b27 InstCombine: creating selects from -1 and 0 is fine, they combine into a sext from i1.
llvm-svn: 122453
2010-12-22 23:12:15 +00:00
Benjamin Kramer 6020ed9d99 X86: Lower a select directly to a setcc_carry if possible.
int test(unsigned long a, unsigned long b) { return -(a < b); }
compiles to
  _test:                              ## @test
    cmpq  %rsi, %rdi                  ## encoding: [0x48,0x39,0xf7]
    sbbl  %eax, %eax                  ## encoding: [0x19,0xc0]
    ret                               ## encoding: [0xc3]
instead of
  _test:                              ## @test
    xorl  %ecx, %ecx                  ## encoding: [0x31,0xc9]
    cmpq  %rsi, %rdi                  ## encoding: [0x48,0x39,0xf7]
    movl  $-1, %eax                   ## encoding: [0xb8,0xff,0xff,0xff,0xff]
    cmovael %ecx, %eax                ## encoding: [0x0f,0x43,0xc1]
    ret                               ## encoding: [0xc3]

llvm-svn: 122451
2010-12-22 23:09:28 +00:00
Rafael Espindola 4124ab1255 Add r122359 back now that the bug in MCDwarfLineAddrFragment fragment has been
fixed.

llvm-svn: 122448
2010-12-22 22:16:24 +00:00
Rafael Espindola d91e11932c Assert that the AddrDelta expression is really constant and wrap it in a set
if we have a lame assembler.

llvm-svn: 122446
2010-12-22 22:04:28 +00:00
Jakob Stoklund Olesen 0acb69d53c When RegAllocGreedy decides to spill the interferences of the current register,
pick the victim with the lowest total spill weight.

llvm-svn: 122445
2010-12-22 22:01:30 +00:00
Jakob Stoklund Olesen 29836e6572 Include a shadow of the original CFG edges in the edge bundle graph.
llvm-svn: 122444
2010-12-22 22:01:28 +00:00
Rafael Espindola a6cd2d821a Rename NeedsSetToChangeDiffSize to HasAggressiveSymbolFolding which is a much
better name and matches what is used in the MachO writer.

llvm-svn: 122443
2010-12-22 21:51:29 +00:00
Daniel Dunbar ac8173cf71 MC/Mach-O/ARM: Don't try to use scattered relocs for BR24 fixups.
llvm-svn: 122441
2010-12-22 21:26:43 +00:00
Rafael Espindola 0e14b61c0b Revert r122359 while I debug PR8845.
llvm-svn: 122427
2010-12-22 19:05:49 +00:00
Matt Beaumont-Gay 6b5d2519b3 Fix another conditional expression mismatched enum type warning.
llvm-svn: 122419
2010-12-22 18:25:55 +00:00
Duncan Sands a45cfbd405 When determining whether the new instruction was already present in
the original instruction, half the cases were missed (making it not
wrong but suboptimal).  Also correct a typo (A <-> B) in the second
chunk. 

llvm-svn: 122414
2010-12-22 17:15:25 +00:00
Daniel Dunbar 45140d2efc MC/Mach-O/ARM: We always use the SECTDIFF reloc type on ARM, which is
esp. important given that the LOCAL_SECTDIFF enumeration got redefined.

llvm-svn: 122412
2010-12-22 16:52:19 +00:00
Daniel Dunbar 11617c8666 MC/Mach-O/ARM: Clone off an ARM version of RecordScatteredRelocation until I figure out how it is supposed to work.
llvm-svn: 122410
2010-12-22 16:45:29 +00:00
Daniel Dunbar dde72ef0c1 MC/Mach-O: Return to reporting errors if we see unexpected fixup kinds.
llvm-svn: 122409
2010-12-22 16:32:41 +00:00
Daniel Dunbar a191cfd97e MC/Mach-O/ARM: Recognize generic _Data_N fixup kinds.
llvm-svn: 122408
2010-12-22 16:32:37 +00:00
Daniel Dunbar 9ccf843a61 MC/Mach-O/ARM: Add enough relocation logic to get BR24 relocations.
llvm-svn: 122407
2010-12-22 16:19:24 +00:00
Daniel Dunbar 56f13732e2 MC/Mach-O/ARM: Fix thinko.
llvm-svn: 122406
2010-12-22 16:19:20 +00:00
Rafael Espindola 50ce2f06de Use references and simplify.
llvm-svn: 122405
2010-12-22 16:11:57 +00:00
Rafael Espindola 73c0ae77ca Simplify the handling of .size expressions.
llvm-svn: 122404
2010-12-22 16:03:00 +00:00
Daniel Dunbar 083132e131 MC/Mach-O/ARM: Stub out RecordARMRelocation, which is mostly a copy of
RecordRelocation with lots of FIXMEs.

llvm-svn: 122402
2010-12-22 13:50:05 +00:00
Daniel Dunbar a63db77f2e Simplify.
llvm-svn: 122401
2010-12-22 13:49:56 +00:00
Daniel Dunbar 1e5be3653c MC/Mach-O: Split out RecordARMRelocation for now, it is weird enough it isn't
clear how to keep in the generic path (yet).
 - Will revisit when it actually works.

llvm-svn: 122400
2010-12-22 13:49:43 +00:00
Duncan Sands fbb9ac3cca Add a generic expansion transform: A op (B op' C) -> (A op B) op' (A op C)
if both A op B and A op C simplify.  This fires fairly often but doesn't
make that much difference.  On gcc-as-one-file it removes two "and"s and
turns one branch into a select.

llvm-svn: 122399
2010-12-22 13:36:08 +00:00
Che-Liang Chiou aaedf8be1c ptx: add ld instruction and test
llvm-svn: 122398
2010-12-22 10:38:51 +00:00
Duncan Sands 3547d2ebd8 Add some statistics, good for understanding how much more powerful
instcombine is compared to instsimplify.

llvm-svn: 122397
2010-12-22 09:40:51 +00:00
Chris Lattner cafc1e60bb Fix a bug in ReduceLoadWidth that wasn't handling extending
loads properly.  We miscompiled the testcase into:

_test:                                  ## @test
	movl	$128, (%rdi)
	movzbl	1(%rdi), %eax
	ret

Now we get a proper:

_test:                                  ## @test
	movl	$128, (%rdi)
	movsbl	(%rdi), %eax
	movzbl	%ah, %eax
	ret

This fixes PR8757.

llvm-svn: 122392
2010-12-22 08:02:57 +00:00
Chris Lattner 9a499e96eb more cleanups, move a check for "roundedness" earlier to reject
unhanded cases faster and simplify code.

llvm-svn: 122391
2010-12-22 08:01:44 +00:00
Chris Lattner 222374d886 reduce indentation and improve comments, no functionality change.
llvm-svn: 122389
2010-12-22 07:36:50 +00:00
Wesley Peck ff2cd2ea6c Don't generate carry bit when loading immediate values on the Microblaze.
llvm-svn: 122385
2010-12-22 01:29:32 +00:00
Wesley Peck 3a3a5795c5 Add support for some of the LLVM atomic operations to the MBlaze backend.
llvm-svn: 122384
2010-12-22 01:15:01 +00:00
Wesley Peck 1cd1554ca0 Modeling the carry bit in the MSR register of the MicroBlaze.
llvm-svn: 122381
2010-12-22 00:53:07 +00:00
Wesley Peck 8143c61b91 Fix a regression introduced into the MBlaze delay slot filler.
llvm-svn: 122379
2010-12-22 00:22:59 +00:00
Owen Anderson 5ab8d4b5e5 Give GVN back the ability to perform simple conditional propagation on conditional branch values.
I still think that LVI should be handling this, but that capability is some ways off in the future,
and this matters for some significant benchmarks.

llvm-svn: 122378
2010-12-21 23:54:34 +00:00
Matt Beaumont-Gay 890cb2d506 GCC objects to the two sides of a conditional expression having different enum
types, but they're just getting converted to unsigned anyway, so cast first
(and ask questions later).

llvm-svn: 122377
2010-12-21 23:43:23 +00:00
Owen Anderson 12470778d7 Remove dead code.
llvm-svn: 122371
2010-12-21 22:31:24 +00:00
Andrew Trick fbb3ed8774 In DelayForLiveRegsBottomUp, handle instructions that read and write
the same physical register. Simplifies the fix from the previous
checkin r122211.

llvm-svn: 122370
2010-12-21 22:27:44 +00:00
Andrew Trick 2085a96513 whitespace
llvm-svn: 122368
2010-12-21 22:25:04 +00:00
Dale Johannesen a94e36bbee Reapply 122353-122355 with fixes. 122354 was wrong;
the shift type was needed one place, the shift count
type another.  The transform in 123555 had the same
problem.

llvm-svn: 122366
2010-12-21 21:55:50 +00:00
Benjamin Kramer f6ddc4a1de Add some x86 specific dagcombines for conditional increments.
(add Y, (sete  X, 0)) -> cmp X, 1; adc  0, Y
(add Y, (setne X, 0)) -> cmp X, 1; sbb -1, Y
(sub (sete  X, 0), Y) -> cmp X, 1; sbb  0, Y
(sub (setne X, 0), Y) -> cmp X, 1; adc -1, Y

for
  unsigned foo(unsigned a, unsigned b) {
    if (a == 0) b++;
    return b;
  }
we now get:
  foo:
    cmpl  $1, %edi
    movl  %esi, %eax
    adcl  $0, %eax
    ret
instead of:
  foo:
    testl %edi, %edi
    sete  %al
    movzbl  %al, %eax
    addl  %esi, %eax
    ret

llvm-svn: 122364
2010-12-21 21:41:44 +00:00
Benjamin Kramer 43493c089f GVN's Expression is not POD-like (it contains a SmallVector). Simplify code while at it.
llvm-svn: 122362
2010-12-21 21:30:19 +00:00
Dale Johannesen 87c47499c6 Revert 122353-122355 for the moment, they broke stuff.
llvm-svn: 122360
2010-12-21 21:22:27 +00:00
Rafael Espindola a468ae02cb Simplify EvaluateAsAbsolute now that EvaluateAsRelocatableImpl does all
the folding it can.

llvm-svn: 122359
2010-12-21 20:51:42 +00:00
Rafael Espindola 6bdb49ded8 Don't relax org or align. They change size as the relaxation happens, but they
are not actually relaxed. For example, a section with only alignments will never
needs relaxation.

llvm-svn: 122356
2010-12-21 20:35:18 +00:00
Dale Johannesen caf42aa6a4 Add a new transform to DAGCombiner.
llvm-svn: 122355
2010-12-21 20:10:51 +00:00
Dale Johannesen fa5dc82fda Get the type of a shift from the shift, not from its shift
count operand.  These should be the same but apparently are
not always, and this is cleaner anyway.  This improves the
code in an existing test.

llvm-svn: 122354
2010-12-21 20:06:19 +00:00
Dale Johannesen d64931df77 Shift by the word size is invalid IR; don't create it.
llvm-svn: 122353
2010-12-21 20:00:06 +00:00
Chris Lattner 2a7ff99979 fix some typos
llvm-svn: 122349
2010-12-21 18:05:22 +00:00
Stuart Hastings 83cce8e7ab Fix indentation, add comment.
llvm-svn: 122345
2010-12-21 17:16:58 +00:00
Duncan Sands 3b8af41a3e Visit instructions deterministically. Use a FIFO so as to approximately
visit instructions before their uses, since InstructionSimplify does a
better job in that case.  All this prompted by Frits van Bommel.

llvm-svn: 122343
2010-12-21 17:08:55 +00:00
Stuart Hastings 8c5bfcaa29 Missing logic for nested CALLSEQ_START/END.
llvm-svn: 122342
2010-12-21 17:07:24 +00:00
Duncan Sands e7cbb64ec0 If an instruction simplifies, try again to simplify any uses of it. This is
not very important since the pass is only used for testing, but it does make
it more realistic.  Suggested by Frits van Bommel.

llvm-svn: 122336
2010-12-21 16:12:03 +00:00
Daniel Dunbar ff78eda678 MC/Mach-O: Shuffle enums a bit to make it harder to inadvertently use the wrong
type.

llvm-svn: 122334
2010-12-21 15:26:45 +00:00
Duncan Sands fecc642224 While I don't think any later transforms can fire, it seems cleaner to
not assume this (for example in case more transforms get added below
it).  Suggested by Frits van Bommel.

llvm-svn: 122332
2010-12-21 15:03:43 +00:00
Duncan Sands 5def0d6791 Fix inverted condition noticed by Frits van Bommel.
llvm-svn: 122331
2010-12-21 14:48:48 +00:00
Duncan Sands d0eb6d39f8 Pull a few more simplifications out of instcombine (there are still
plenty left though!), in particular for multiplication.

llvm-svn: 122330
2010-12-21 14:00:22 +00:00
Duncan Sands ee3ec6eb94 Teach InstructionSimplify about distributive laws. These transforms fire
quite often, but don't make much difference in practice presumably because
instcombine also knows them and more.

llvm-svn: 122328
2010-12-21 13:32:22 +00:00
Duncan Sands f64e690c4f Move checking of the recursion limit into the various Thread methods.
No functionality change.

llvm-svn: 122327
2010-12-21 09:09:15 +00:00
Duncan Sands 6c7a52cf80 Add generic simplification of associative operations, generalizing
a couple of existing transforms.  This fires surprisingly often, for
example when compiling gcc "(X+(-1))+1->X" fires quite a lot as well
as various "and" simplifications (usually with a phi node operand).
Most of the time this doesn't make a real difference since the same
thing would have been done elsewhere anyway, eg: by instcombine, but
there are a few places where this results in simplifications that we
were not doing before.

llvm-svn: 122326
2010-12-21 08:49:00 +00:00
Cameron Zwarich 79ebc7186e Incremental progress towards a new implementation of StrongPHIElimination. Most
of the problems with my last attempt were in the updating of LiveIntervals
rather than the coalescing itself. Therefore, I decided to get that right first
by essentially reimplementing the existing PHIElimination using LiveIntervals.

It works correctly, with only a few tests failing (which may not be legitimate
failures) and no new verifier failures (at least as far as I can tell, I didn't
count the number per file).

llvm-svn: 122321
2010-12-21 06:54:43 +00:00
Bob Wilson 1a20c2aedd Add ARM-specific DAG combining to cast i64 vector element load/stores to f64.
Type legalization splits up i64 values into pairs of i32 values, which leads
to poor quality code when inserting or extracting i64 vector elements.
If the vector element is loaded or stored, it can be treated as an f64 value
and loaded or stored directly from a VPR register.  Use the pre-legalization
DAG combiner to cast those vector elements to f64 types so that the type
legalizer won't mess them up.  Radar 8755338.

llvm-svn: 122319
2010-12-21 06:43:19 +00:00
Rafael Espindola 98d93c5294 Layout one section until no relaxations are done and then move to the next
section.

This helps because in practice sections form a dag with debug sections pointing
to text sections. Finishing up the text sections first makes the debug section
relaxation trivial.

llvm-svn: 122314
2010-12-21 04:22:09 +00:00
Eric Christopher c874f6c9ff Arm and thumb call instructions are also in different orders.
Fixes rdar://8782223

llvm-svn: 122313
2010-12-21 03:50:43 +00:00
Chris Lattner 3e5fbd74ed rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
something that just glues two nodes together, even if it is
sometimes used for flags.

llvm-svn: 122310
2010-12-21 02:38:05 +00:00
Eric Christopher 6df5ff8ce6 If we're not using reg+reg offset we're using reg+imm, set the opcode
to be the one we want to use. bugpoint reduced testcase is a little large,
I'll see if I can simplify it down more.

Fixes part of rdar://8782207

llvm-svn: 122307
2010-12-21 02:12:07 +00:00
Chris Lattner 17f906be96 improve "cannot yet select" errors a trivial amount: now
they are just as useless, but at least a bit more gramatical

llvm-svn: 122305
2010-12-21 02:07:03 +00:00
Bill Wendling cdcc4fc048 Fix a copy-pasto. When the tBR_JTr instruction was converted to using the
tPseudoInst class, its size was changed from "special" to "2 bytes". This is
incorrect because the jump table will no longer be taken into account when
calculating branch offsets.
<rdar://problem/8782216>

llvm-svn: 122303
2010-12-21 01:57:15 +00:00
Bill Wendling 18581a4ac0 Comment cleanups.
llvm-svn: 122302
2010-12-21 01:54:40 +00:00
Jakob Stoklund Olesen 2530cd2a4c Add EdgeBundles to SplitKit.
Edge bundles is an annotation on the CFG that turns it into a bipartite directed
graph where each basic block is connected to an outgoing and an ingoing bundle.
These bundles are useful for identifying regions of the CFG for live range
splitting.

llvm-svn: 122301
2010-12-21 01:50:21 +00:00
Jakob Stoklund Olesen 4c278f82c8 Use IntEqClasses to compute connected components of live intervals.
llvm-svn: 122296
2010-12-21 00:48:17 +00:00
Jakob Stoklund Olesen baee655c5e Add ADT/IntEqClasses.h as a light-weight implementation of EquivalenceClasses.h.
This implementation already exists as ConnectedVNInfoEqClasses in
LiveInterval.cpp, and it seems to be generally useful to have a light-weight way
of forming equivalence classes of small integers.

IntEqClasses doesn't allow enumeration of the elements in a class.

llvm-svn: 122293
2010-12-21 00:04:46 +00:00
Owen Anderson c6beda80ff Speculatively revert the use of DenseMap in LazyValueInfo, which may be causing Linux self-host failures.
llvm-svn: 122291
2010-12-20 23:53:19 +00:00
Owen Anderson 9be3ec6264 Attempt to appease the DragonEgg buildbots.
llvm-svn: 122288
2010-12-20 23:23:18 +00:00
Owen Anderson aa81496c76 Revert r122114 (CallbackVH observing use-list changes) because it caused severe slowdowns on the Linux self-host configuration.
llvm-svn: 122279
2010-12-20 22:28:03 +00:00
Nate Begeman 4b9db07b02 Implement feedback from Bruno on making pblendvb an x86-specific ISD node in addition to being an intrinsic, and convert
lowering to use it.  Hopefully the pattern fragment is doing the right thing with XMM0, looks correct in testing.

llvm-svn: 122277
2010-12-20 22:04:24 +00:00
Owen Anderson 813a2c45a8 Convert one of LVI's primary maps to a DenseMap, now that we know are more assured of iterator stability.
llvm-svn: 122273
2010-12-20 21:30:54 +00:00
Wesley Peck ae58e7b179 Teach the MBlaze disassembler to disassemble special purpose registers.
llvm-svn: 122269
2010-12-20 21:18:04 +00:00
Roman Divacky 55184ddd35 Set the value of absolute symbols.
llvm-svn: 122268
2010-12-20 21:14:39 +00:00
Duncan Sands eaff500c7b Oops, forgot to add the pass itself!
llvm-svn: 122265
2010-12-20 21:07:42 +00:00
Duncan Sands a436cbe4bf Add a new convenience pass for testing InstructionSimplify. Previously
it could only be tested indirectly, via instcombine, gvn or some other
pass that makes use of InstructionSimplify, which means that testcases
had to be carefully contrived to dance around any other transformations
that that pass did.

llvm-svn: 122264
2010-12-20 20:54:37 +00:00
Wesley Peck 3307d7cbad Teach the MBlaze asm parser how to parse special purpose register names.
llvm-svn: 122261
2010-12-20 20:43:24 +00:00
Dale Johannesen 0a291a36f2 Cosmetic changes.
llvm-svn: 122259
2010-12-20 20:10:50 +00:00
Benjamin Kramer f7957d0463 Add a check missing from my last commit and avoid a potential overflow situation.
llvm-svn: 122258
2010-12-20 20:00:31 +00:00
Owen Anderson d83f98a51e More LVI cleanups, including trying to simplify the process of maintaining the OverDefinedCache.
llvm-svn: 122256
2010-12-20 19:33:41 +00:00
Owen Anderson 64c2c5798a Reuse the reference into the LVI cache throughout the solver subsystem. This is much easier to
verify as being safe thanks its recent de-recursivization.

llvm-svn: 122254
2010-12-20 18:18:16 +00:00
Benjamin Kramer 2bca3a67b3 Reduce indentation.
llvm-svn: 122249
2010-12-20 16:21:59 +00:00
Benjamin Kramer 68531baea9 Teach InstCombine to merge (icmp ult (X + CA), C1) | (icmp eq X, C2) into (icmp ult (X + CA), C1 + 1) if C2 + CA == C1.
InstCombine creates these so now we compile x == 23 || x == 24 || x == 25 to
  %x.off = add i32 %x, -23
  %1 = icmp ult i32 %x.off, 3
instead of
  %x.off = add i32 %x, -23
  %1 = icmp ult i32 %x.off, 2
  %cmp3 = icmp eq i32 %x, 25
  %ret2 = or i1 %1, %cmp3

llvm-svn: 122248
2010-12-20 16:18:51 +00:00
Daniel Dunbar ca2511d849 Add header...
llvm-svn: 122247
2010-12-20 15:45:51 +00:00
Daniel Dunbar 7da045e59f X86/MC/Mach-O: Split out createX86MachObjectWriter().
llvm-svn: 122246
2010-12-20 15:07:39 +00:00
Duncan Sands ed6d6c33dd Have SimplifyBinOp dispatch Xor, Add and Sub to the corresponding methods
(they had just been forgotten before).  Adding Xor causes "main" in the
existing testcase 2010-11-01-lshr-mask.ll to be hugely more simplified.

llvm-svn: 122245
2010-12-20 14:47:04 +00:00
Michael J. Spencer 6d4b7e7e83 Support/PathV2: Add missing has_relative_path impl.
llvm-svn: 122243
2010-12-20 13:30:28 +00:00
Duncan Sands 70db5e7cb2 There is no need for isAssociative to take the type as an argument anymore.
llvm-svn: 122242
2010-12-20 13:10:23 +00:00
Chris Lattner 27ca8ebd4b fix PR8807 by making transformConstExprCastCall aware of byval arguments.
llvm-svn: 122238
2010-12-20 08:36:38 +00:00
Chris Lattner 7398965b67 various cleanups for transformConstExprCastCall
llvm-svn: 122237
2010-12-20 08:25:06 +00:00
Chris Lattner 0f11495289 when eliding a byval copy due to inlining a readonly function, we have
to make sure that the reused alloca has sufficient alignment.

llvm-svn: 122236
2010-12-20 08:10:40 +00:00