fa5dc82fda
Get the type of a shift from the shift, not from its shift
...
count operand. These should be the same but apparently are
not always, and this is cleaner anyway. This improves the
code in an existing test.
llvm-svn: 122354
2010-12-21 20:06:19 +00:00
d64931df77
Shift by the word size is invalid IR; don't create it.
...
llvm-svn: 122353
2010-12-21 20:00:06 +00:00
2a7ff99979
fix some typos
...
llvm-svn: 122349
2010-12-21 18:05:22 +00:00
83cce8e7ab
Fix indentation, add comment.
...
llvm-svn: 122345
2010-12-21 17:16:58 +00:00
3b8af41a3e
Visit instructions deterministically. Use a FIFO so as to approximately
...
visit instructions before their uses, since InstructionSimplify does a
better job in that case. All this prompted by Frits van Bommel.
llvm-svn: 122343
2010-12-21 17:08:55 +00:00
8c5bfcaa29
Missing logic for nested CALLSEQ_START/END.
...
llvm-svn: 122342
2010-12-21 17:07:24 +00:00
e7cbb64ec0
If an instruction simplifies, try again to simplify any uses of it. This is
...
not very important since the pass is only used for testing, but it does make
it more realistic. Suggested by Frits van Bommel.
llvm-svn: 122336
2010-12-21 16:12:03 +00:00
ff78eda678
MC/Mach-O: Shuffle enums a bit to make it harder to inadvertently use the wrong
...
type.
llvm-svn: 122334
2010-12-21 15:26:45 +00:00
fecc642224
While I don't think any later transforms can fire, it seems cleaner to
...
not assume this (for example in case more transforms get added below
it). Suggested by Frits van Bommel.
llvm-svn: 122332
2010-12-21 15:03:43 +00:00
5def0d6791
Fix inverted condition noticed by Frits van Bommel.
...
llvm-svn: 122331
2010-12-21 14:48:48 +00:00
d0eb6d39f8
Pull a few more simplifications out of instcombine (there are still
...
plenty left though!), in particular for multiplication.
llvm-svn: 122330
2010-12-21 14:00:22 +00:00
ee3ec6eb94
Teach InstructionSimplify about distributive laws. These transforms fire
...
quite often, but don't make much difference in practice presumably because
instcombine also knows them and more.
llvm-svn: 122328
2010-12-21 13:32:22 +00:00
f64e690c4f
Move checking of the recursion limit into the various Thread methods.
...
No functionality change.
llvm-svn: 122327
2010-12-21 09:09:15 +00:00
6c7a52cf80
Add generic simplification of associative operations, generalizing
...
a couple of existing transforms. This fires surprisingly often, for
example when compiling gcc "(X+(-1))+1->X" fires quite a lot as well
as various "and" simplifications (usually with a phi node operand).
Most of the time this doesn't make a real difference since the same
thing would have been done elsewhere anyway, eg: by instcombine, but
there are a few places where this results in simplifications that we
were not doing before.
llvm-svn: 122326
2010-12-21 08:49:00 +00:00
79ebc7186e
Incremental progress towards a new implementation of StrongPHIElimination. Most
...
of the problems with my last attempt were in the updating of LiveIntervals
rather than the coalescing itself. Therefore, I decided to get that right first
by essentially reimplementing the existing PHIElimination using LiveIntervals.
It works correctly, with only a few tests failing (which may not be legitimate
failures) and no new verifier failures (at least as far as I can tell, I didn't
count the number per file).
llvm-svn: 122321
2010-12-21 06:54:43 +00:00
1a20c2aedd
Add ARM-specific DAG combining to cast i64 vector element load/stores to f64.
...
Type legalization splits up i64 values into pairs of i32 values, which leads
to poor quality code when inserting or extracting i64 vector elements.
If the vector element is loaded or stored, it can be treated as an f64 value
and loaded or stored directly from a VPR register. Use the pre-legalization
DAG combiner to cast those vector elements to f64 types so that the type
legalizer won't mess them up. Radar 8755338.
llvm-svn: 122319
2010-12-21 06:43:19 +00:00
98d93c5294
Layout one section until no relaxations are done and then move to the next
...
section.
This helps because in practice sections form a dag with debug sections pointing
to text sections. Finishing up the text sections first makes the debug section
relaxation trivial.
llvm-svn: 122314
2010-12-21 04:22:09 +00:00
c874f6c9ff
Arm and thumb call instructions are also in different orders.
...
Fixes rdar://8782223
llvm-svn: 122313
2010-12-21 03:50:43 +00:00
3e5fbd74ed
rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
...
something that just glues two nodes together, even if it is
sometimes used for flags.
llvm-svn: 122310
2010-12-21 02:38:05 +00:00
6df5ff8ce6
If we're not using reg+reg offset we're using reg+imm, set the opcode
...
to be the one we want to use. bugpoint reduced testcase is a little large,
I'll see if I can simplify it down more.
Fixes part of rdar://8782207
llvm-svn: 122307
2010-12-21 02:12:07 +00:00
17f906be96
improve "cannot yet select" errors a trivial amount: now
...
they are just as useless, but at least a bit more gramatical
llvm-svn: 122305
2010-12-21 02:07:03 +00:00
cdcc4fc048
Fix a copy-pasto. When the tBR_JTr instruction was converted to using the
...
tPseudoInst class, its size was changed from "special" to "2 bytes". This is
incorrect because the jump table will no longer be taken into account when
calculating branch offsets.
<rdar://problem/8782216>
llvm-svn: 122303
2010-12-21 01:57:15 +00:00
18581a4ac0
Comment cleanups.
...
llvm-svn: 122302
2010-12-21 01:54:40 +00:00
2530cd2a4c
Add EdgeBundles to SplitKit.
...
Edge bundles is an annotation on the CFG that turns it into a bipartite directed
graph where each basic block is connected to an outgoing and an ingoing bundle.
These bundles are useful for identifying regions of the CFG for live range
splitting.
llvm-svn: 122301
2010-12-21 01:50:21 +00:00
4c278f82c8
Use IntEqClasses to compute connected components of live intervals.
...
llvm-svn: 122296
2010-12-21 00:48:17 +00:00
baee655c5e
Add ADT/IntEqClasses.h as a light-weight implementation of EquivalenceClasses.h.
...
This implementation already exists as ConnectedVNInfoEqClasses in
LiveInterval.cpp, and it seems to be generally useful to have a light-weight way
of forming equivalence classes of small integers.
IntEqClasses doesn't allow enumeration of the elements in a class.
llvm-svn: 122293
2010-12-21 00:04:46 +00:00
c6beda80ff
Speculatively revert the use of DenseMap in LazyValueInfo, which may be causing Linux self-host failures.
...
llvm-svn: 122291
2010-12-20 23:53:19 +00:00
9be3ec6264
Attempt to appease the DragonEgg buildbots.
...
llvm-svn: 122288
2010-12-20 23:23:18 +00:00
aa81496c76
Revert r122114 (CallbackVH observing use-list changes) because it caused severe slowdowns on the Linux self-host configuration.
...
llvm-svn: 122279
2010-12-20 22:28:03 +00:00
4b9db07b02
Implement feedback from Bruno on making pblendvb an x86-specific ISD node in addition to being an intrinsic, and convert
...
lowering to use it. Hopefully the pattern fragment is doing the right thing with XMM0, looks correct in testing.
llvm-svn: 122277
2010-12-20 22:04:24 +00:00
813a2c45a8
Convert one of LVI's primary maps to a DenseMap, now that we know are more assured of iterator stability.
...
llvm-svn: 122273
2010-12-20 21:30:54 +00:00
ae58e7b179
Teach the MBlaze disassembler to disassemble special purpose registers.
...
llvm-svn: 122269
2010-12-20 21:18:04 +00:00
55184ddd35
Set the value of absolute symbols.
...
llvm-svn: 122268
2010-12-20 21:14:39 +00:00
eaff500c7b
Oops, forgot to add the pass itself!
...
llvm-svn: 122265
2010-12-20 21:07:42 +00:00
a436cbe4bf
Add a new convenience pass for testing InstructionSimplify. Previously
...
it could only be tested indirectly, via instcombine, gvn or some other
pass that makes use of InstructionSimplify, which means that testcases
had to be carefully contrived to dance around any other transformations
that that pass did.
llvm-svn: 122264
2010-12-20 20:54:37 +00:00
3307d7cbad
Teach the MBlaze asm parser how to parse special purpose register names.
...
llvm-svn: 122261
2010-12-20 20:43:24 +00:00
0a291a36f2
Cosmetic changes.
...
llvm-svn: 122259
2010-12-20 20:10:50 +00:00
f7957d0463
Add a check missing from my last commit and avoid a potential overflow situation.
...
llvm-svn: 122258
2010-12-20 20:00:31 +00:00
d83f98a51e
More LVI cleanups, including trying to simplify the process of maintaining the OverDefinedCache.
...
llvm-svn: 122256
2010-12-20 19:33:41 +00:00
64c2c5798a
Reuse the reference into the LVI cache throughout the solver subsystem. This is much easier to
...
verify as being safe thanks its recent de-recursivization.
llvm-svn: 122254
2010-12-20 18:18:16 +00:00
2bca3a67b3
Reduce indentation.
...
llvm-svn: 122249
2010-12-20 16:21:59 +00:00
68531baea9
Teach InstCombine to merge (icmp ult (X + CA), C1) | (icmp eq X, C2) into (icmp ult (X + CA), C1 + 1) if C2 + CA == C1.
...
InstCombine creates these so now we compile x == 23 || x == 24 || x == 25 to
%x.off = add i32 %x, -23
%1 = icmp ult i32 %x.off, 3
instead of
%x.off = add i32 %x, -23
%1 = icmp ult i32 %x.off, 2
%cmp3 = icmp eq i32 %x, 25
%ret2 = or i1 %1, %cmp3
llvm-svn: 122248
2010-12-20 16:18:51 +00:00
ca2511d849
Add header...
...
llvm-svn: 122247
2010-12-20 15:45:51 +00:00
7da045e59f
X86/MC/Mach-O: Split out createX86MachObjectWriter().
...
llvm-svn: 122246
2010-12-20 15:07:39 +00:00
ed6d6c33dd
Have SimplifyBinOp dispatch Xor, Add and Sub to the corresponding methods
...
(they had just been forgotten before). Adding Xor causes "main" in the
existing testcase 2010-11-01-lshr-mask.ll to be hugely more simplified.
llvm-svn: 122245
2010-12-20 14:47:04 +00:00
6d4b7e7e83
Support/PathV2: Add missing has_relative_path impl.
...
llvm-svn: 122243
2010-12-20 13:30:28 +00:00
70db5e7cb2
There is no need for isAssociative to take the type as an argument anymore.
...
llvm-svn: 122242
2010-12-20 13:10:23 +00:00
27ca8ebd4b
fix PR8807 by making transformConstExprCastCall aware of byval arguments.
...
llvm-svn: 122238
2010-12-20 08:36:38 +00:00
7398965b67
various cleanups for transformConstExprCastCall
...
llvm-svn: 122237
2010-12-20 08:25:06 +00:00
0f11495289
when eliding a byval copy due to inlining a readonly function, we have
...
to make sure that the reused alloca has sufficient alignment.
llvm-svn: 122236
2010-12-20 08:10:40 +00:00
0099744506
pull byval processing out to its own helper function.
...
llvm-svn: 122235
2010-12-20 07:57:41 +00:00
7394680a00
fix PR8769, a miscompilation by inliner when inlining a function with a byval
...
argument. The generated alloca has to have at least the alignment of the
byval, if not, the client may be making assumptions that the new alloca won't
satisfy.
llvm-svn: 122234
2010-12-20 07:45:28 +00:00
4ffda706d0
MachineVerifier should count landing pad successors as basic blocks rather than
...
out-edges. Fixes PR8824.
llvm-svn: 122228
2010-12-20 04:19:48 +00:00
660bce67f3
Teach MachineVerifier that early clobber defs begin at USE slots and other defs
...
begin at DEF slots. Fixes the second half of PR8813.
llvm-svn: 122225
2010-12-20 03:15:20 +00:00
bc2461c5f9
Add a missing check from r122218.
...
llvm-svn: 122224
2010-12-20 02:59:51 +00:00
0b3ca50ebb
implement type legalization promotion support for SMULO and UMULO, giving
...
ARM (and other 32-bit-only) targets support for i8 and i16 overflow
multiplies. The generated code isn't great, but this at least fixes
CodeGen/Generic/overflow.ll when running on ARM hosts.
llvm-svn: 122221
2010-12-20 02:05:39 +00:00
5c00d41688
now that addc/adde are gone, "ADDC" in the X86 backend uses EFLAGS results,
...
the same as setcc. Optimize ADDC(0,0,FLAGS) -> SET_CARRY(FLAGS). This is
a step towards finishing off PR5443. In the testcase in that bug we now get:
movq %rdi, %rax
addq %rsi, %rax
sbbq %rcx, %rcx
testb $1, %cl
setne %dl
ret
instead of:
movq %rdi, %rax
addq %rsi, %rax
movl $0, %ecx
adcq $0, %rcx
testq %rcx, %rcx
setne %dl
ret
llvm-svn: 122219
2010-12-20 01:37:09 +00:00
fc0c6b1ea9
Don't assume that an instruction ending a register's live range always reads
...
the register; it may be a dead def instead. Fixes PR8820.
llvm-svn: 122218
2010-12-20 01:22:37 +00:00
46b9efcad7
We lower setb to sbb with the hope that the and will go away, when it
...
doesn't, match it back to setb.
On a 64-bit version of the testcase before we'd get:
movq %rdi, %rax
addq %rsi, %rax
sbbb %dl, %dl
andb $1, %dl
ret
now we get:
movq %rdi, %rax
addq %rsi, %rax
setb %dl
ret
llvm-svn: 122217
2010-12-20 01:16:03 +00:00
1991c47ec1
Avoid dropping the address space when InstCombine optimizes memset
...
llvm-svn: 122215
2010-12-20 01:05:30 +00:00
9c26d2711b
use for loop over types.
...
llvm-svn: 122214
2010-12-20 01:03:27 +00:00
846c20d4e6
Change the X86 backend to stop using the evil ADDC/ADDE/SUBC/SUBE nodes (which
...
their carry depenedencies with MVT::Flag operands) and use clean and beautiful
EFLAGS dependences instead.
We do this by changing the modelling of SBB/ADC to have EFLAGS input and outputs
(which is what requires the previous scheduler change) and change X86 ISelLowering
to custom lower ADDC and friends down to X86ISD::ADD/ADC/SUB/SBB nodes.
With the previous series of changes, this causes no changes in the testsuite, woo.
llvm-svn: 122213
2010-12-20 00:59:46 +00:00
981afd206b
Fix a bug in the scheduler's handling of "unspillable" vregs.
...
Imagine we see:
EFLAGS = inst1
EFLAGS = inst2 FLAGS
gpr = inst3 EFLAGS
Previously, we would refuse to schedule inst2 because it clobbers
the EFLAGS of the predecessor. However, it also uses the EFLAGS
of the predecessor, so it is safe to emit. SDep edges ensure that
the right order happens already anyway.
This fixes 2 testsuite crashes with the X86 patch I'm going to
commit next.
llvm-svn: 122211
2010-12-20 00:55:43 +00:00
0cfe884874
the result of CheckForLiveRegDef is dead, remove it.
...
llvm-svn: 122209
2010-12-20 00:51:56 +00:00
ed69c6e4b9
reduce indentation, no functionality change.
...
llvm-svn: 122208
2010-12-20 00:50:16 +00:00
1b67d6c565
Ignore debug values when performing MachineVerifier liveness checks. Fixes
...
PR8822.
llvm-svn: 122207
2010-12-20 00:08:10 +00:00
1064992c84
Prevents PerformShuffleCombine from creating a node with an illegal type after legalize types
...
has run, e.g., prevent creating an i64 node from a v2i64 when i64 is not a legal type.
llvm-svn: 122206
2010-12-19 23:55:53 +00:00
0b111b1aee
Early clobber operands are allowed to be defined at use indices. This fixes one
...
half of PR8813.
llvm-svn: 122205
2010-12-19 23:50:53 +00:00
4fb9dd4c74
fix an oversight caught by Frits!
...
llvm-svn: 122204
2010-12-19 23:24:04 +00:00
251337e1c4
Fix PR8815 by checking for an explicit clobber def tied to a use operand in
...
ConnectedVNInfoEqClasses::Classify().
llvm-svn: 122202
2010-12-19 22:12:45 +00:00
9edf3f50bf
improve the setcc -> setcc_carry optimization to happen more
...
consistently by moving it out of lowering into dag combine.
Add some missing patterns for matching away extended versions of setcc_c.
llvm-svn: 122201
2010-12-19 22:08:31 +00:00
7e24173a3c
Fix PR8811 by teaching MachineVerifier about optional defs.
...
llvm-svn: 122199
2010-12-19 21:37:23 +00:00
b5cec4f11a
StrongPHIElimination will never run before TwoAddressInstructionPass.
...
llvm-svn: 122197
2010-12-19 21:32:29 +00:00
6dddab2ffe
simplify some code to just reuse a setcc if we can instead of
...
going through the CSE maps to get it.
llvm-svn: 122196
2010-12-19 21:23:48 +00:00
0de20af7ba
Add missing standard headers. Patch by Joerg Sonnenberger!
...
llvm-svn: 122193
2010-12-19 20:43:38 +00:00
b71afe82bf
Add missing std:: prefixes to some calls. C++ doesn't require that <cfoo>
...
headers provide symbols outside namespace std and the LLVM coding standards
state that we should prefix all of them.
llvm-svn: 122192
2010-12-19 20:42:43 +00:00
440b2804ff
teach MaskedValueIsZero how to analyze ADDE. This is
...
enough to teach it that ADDE(0,0) is known 0 except the
low bit, for example.
llvm-svn: 122191
2010-12-19 20:38:28 +00:00
b6252a376a
tidy up
...
llvm-svn: 122190
2010-12-19 20:24:28 +00:00
c37bb023b1
now that generic vector types aren't selected onto MMX operations,
...
we don't need -disable-mmx anymore.
llvm-svn: 122189
2010-12-19 20:19:20 +00:00
ae756e1980
reduce copy/paste programming with the power of for loops.
...
llvm-svn: 122187
2010-12-19 20:07:10 +00:00
1e8c032a6e
X86 supports i8/i16 overflow ops (except i8 multiplies), we should
...
generate them.
Now we compile:
define zeroext i8 @X(i8 signext %a, i8 signext %b) nounwind ssp {
entry:
%0 = tail call %0 @llvm.sadd.with.overflow.i8(i8 %a, i8 %b)
%cmp = extractvalue %0 %0, 1
br i1 %cmp, label %if.then, label %if.end
into:
_X: ## @X
## BB#0: ## %entry
subl $12, %esp
movb 16(%esp), %al
addb 20(%esp), %al
jo LBB0_2
Before we were generating:
_X: ## @X
## BB#0: ## %entry
pushl %ebp
movl %esp, %ebp
subl $8, %esp
movb 12(%ebp), %al
testb %al, %al
setge %cl
movb 8(%ebp), %dl
testb %dl, %dl
setge %ah
cmpb %cl, %ah
sete %cl
addb %al, %dl
testb %dl, %dl
setge %al
cmpb %al, %ah
setne %al
andb %cl, %al
testb %al, %al
jne LBB0_2
llvm-svn: 122186
2010-12-19 20:03:11 +00:00
3e635d2e99
move a transformation to a more logical place, simplifying it.
...
llvm-svn: 122183
2010-12-19 19:43:52 +00:00
5e0c0c72e9
recognize an unsigned add with overflow idiom into uadd.
...
This resolves a README entry and technically resolves PR4916,
but we still get poor code for the testcase in that PR because
GVN isn't CSE'ing uadd with add, filed as PR8817.
Previously we got:
_test7: ## @test7
addq %rsi, %rdi
cmpq %rdi, %rsi
movl $42, %eax
cmovaq %rsi, %rax
ret
Now we get:
_test7: ## @test7
addq %rsi, %rdi
movl $42, %eax
cmovbq %rsi, %rax
ret
llvm-svn: 122182
2010-12-19 19:37:52 +00:00
33dc3f0cfa
optimize uadd(x, cst) into a comparison when the normal
...
result is dead. This is required for my next patch to not
regress the testsuite.
llvm-svn: 122181
2010-12-19 19:35:32 +00:00
ce2995ae58
use IC.ReplaceInstUsesWith instead of a raw RAUW so that uses of
...
the old thing end up on the instcombine worklist. Not doing this
can cause an extra top-level iteration of instcombine, burning
compile time.
llvm-svn: 122179
2010-12-19 18:38:44 +00:00
79874566ce
generalize the sadd creation code to not require that the
...
sadd formed is half the size of the original type. We can
now compile this into a sadd.i8:
unsigned char X(char a, char b) {
int res = a+b;
if ((unsigned )(res+128) > 255U)
abort();
return res;
}
llvm-svn: 122178
2010-12-19 18:35:09 +00:00
c56c845377
fix another miscompile in the llvm.sadd formation logic: it wasn't
...
checking to see if the high bits of the original add result were dead.
Inserting a smaller add and zexting back to that size is not good enough.
This is likely to be the fix for 8816.
llvm-svn: 122177
2010-12-19 18:22:06 +00:00
713ab37965
Remove some checks for StrongPHIElim. These checks make it impossible to use an
...
alternative register allocator that does not require LiveIntervals by specifying
it on the command-line for a target that has StrongPHIElimination enabled by
default.
These checks are pretty meaningless anyways, since StrongPHIElimination and
PHIElimination are never used at the same time.
llvm-svn: 122176
2010-12-19 18:03:27 +00:00
f29562db25
fix a bug (possibly 8816) in the sadd forming xform: it isn't
...
profitable (or safe) to promote code when the add-with-constant
has other uses.
llvm-svn: 122175
2010-12-19 17:59:02 +00:00
ee61c1d820
rework the code added in r122072 to pull it out to its own
...
helper function, clean up comments, and reduce indentation.
No functionality change.
llvm-svn: 122174
2010-12-19 17:52:50 +00:00
408a684d29
Enhance LICM to promote alias sets whose pointers themselves are stored,
...
which doesn't affect the memory address being promoted.
llvm-svn: 122172
2010-12-19 05:57:25 +00:00
3337a81450
fix PR8602, a bug in an assertion: a volatile store *of* a pointer
...
does not make the alias set for that pointer volatile, just stores
*to* the pointer.
llvm-svn: 122171
2010-12-19 05:51:54 +00:00
77a8a71414
fix PR8642: if a critical edge has a PHI value that can trap,
...
isel is *required* to split the edge. PHI values get evaluated
on the edge, not in their predecessor block.
llvm-svn: 122170
2010-12-19 04:58:57 +00:00
fb888622c3
revert r122164, I'm going to go with a different approach.
...
llvm-svn: 122168
2010-12-19 04:23:03 +00:00
ee54636f0a
Fixed version of 122160 (the previous one would fold undefined symbols).
...
llvm-svn: 122167
2010-12-19 04:18:56 +00:00
9a2d4e04c7
Revert 122160 while I debug it.
...
llvm-svn: 122165
2010-12-19 03:22:05 +00:00
583ec6fa44
first step to fixing PR8642: don't fold away empty basic blocks
...
which have trapping constant exprs in them due to PHI nodes.
Eliminating them can cause the constant expr to be evalutated
on new paths if the input edges are critical.
llvm-svn: 122164
2010-12-19 03:02:34 +00:00
6fd80a5593
Move all folding to AttemptToFoldSymbolOffsetDifference.
...
llvm-svn: 122160
2010-12-19 02:15:04 +00:00
fce1fe16e0
Fix whitespace.
...
llvm-svn: 122158
2010-12-18 22:23:15 +00:00
ca93d8406d
Support/PathV1: Deprecate get{Basename,Dirname,Suffix}.
...
llvm-svn: 122157
2010-12-18 22:23:07 +00:00
6b8b4855ff
simplify this a bit.
...
llvm-svn: 122156
2010-12-18 20:22:49 +00:00
3eb4fedecf
Restore the behavior of frame lowering before my refactoring.
...
It turns out that ppc backend has really weird interdependencies
over different hooks and all stuff is fragile wrt small changes.
This should fix PR8749
llvm-svn: 122155
2010-12-18 19:53:14 +00:00
71d29167ea
Add support for lexing single quotes like 'c'.
...
This fixed 8615.
llvm-svn: 122150
2010-12-18 08:56:37 +00:00
c15ab07cff
Revert r122143 through r122140, which collectively broke the LLVMC tests on
...
the buildbots.
llvm-svn: 122149
2010-12-18 07:37:18 +00:00
b403e098a1
Merge isAbsolute into IsSymbolRefDifferenceFullyResolved.
...
llvm-svn: 122148
2010-12-18 06:27:54 +00:00
8396dd0893
Remove the MCObjectFormat class.
...
llvm-svn: 122147
2010-12-18 05:37:28 +00:00
293a7c1840
Add a FIXME and explain a hack.
...
llvm-svn: 122144
2010-12-18 04:19:20 +00:00
01cf728ea9
Fix whitespace.
...
llvm-svn: 122142
2010-12-18 04:13:46 +00:00
4f63507d05
Support/PathV1: Deprecate get{Basename,Dirname,Suffix}.
...
llvm-svn: 122141
2010-12-18 04:13:36 +00:00
1ea7f18caa
Fix the note.
...
llvm-svn: 122139
2010-12-18 04:01:45 +00:00
5004f4a9b5
Revert 122011, 122012, 122013, 122023 adding back an important optimization.
...
I added a note, but suggestions on how to add a test are really welcome.
llvm-svn: 122138
2010-12-18 03:57:21 +00:00
1fa7958eaa
Apparently, operandices is not a word.
...
llvm-svn: 122135
2010-12-18 03:28:32 +00:00
fdaae0d16f
Move some data to the TargetWriter.
...
llvm-svn: 122134
2010-12-18 03:27:34 +00:00
3b2966dc7d
Teach the inline spiller to attempt folding a load instruction into its single
...
use before rematerializing the load.
This allows us to produce:
addps LCPI0_1(%rip), %xmm2
Instead of:
movaps LCPI0_1(%rip), %xmm3
addps %xmm3, %xmm2
Saving a register and an instruction. The standard spiller already knows how to
do this.
llvm-svn: 122133
2010-12-18 03:04:14 +00:00
2a9f194b00
Tweak debug spew.
...
llvm-svn: 122132
2010-12-18 03:04:11 +00:00
429bb1e2cc
r120333 changed the opcode for the Thumb1 stuff from ARM::tMOVr to
...
ARM::tMOVgpr2gpr. But this check didn't change. As a result, we were getting
misaligned references to the jump table from an ADR instruction.
There is a test case, but unfortunately it's sensitive to random code changes.
<rdar://problem/8782223>
llvm-svn: 122131
2010-12-18 02:13:59 +00:00
a4dda53686
RemoveUnusedCPEntries can change things. Track it.
...
llvm-svn: 122129
2010-12-18 01:53:06 +00:00
7971a3eaff
Check that the register is live-in to the loop header before inserting copies in
...
the loop predecessors.
The register can be live-out from a predecessor without being live-in to the
loop header if there is a critical edge from the predecessor.
llvm-svn: 122123
2010-12-18 01:06:19 +00:00
1d108cb962
Fix GCC warning:
...
lib/CodeGen/RegAllocGreedy.cpp:311: error: unused variable 'PhysReg' [-Wunused-variable]
llvm-svn: 122122
2010-12-18 01:05:55 +00:00
625ccf8222
Relax push instructions.
...
llvm-svn: 122121
2010-12-18 01:01:34 +00:00
55a700b0cf
Make LazyValueInfo non-recursive.
...
llvm-svn: 122120
2010-12-18 01:00:40 +00:00
eda2a9ec89
Rearrange some Neon multiclasses. No functional changes.
...
llvm-svn: 122119
2010-12-18 00:42:58 +00:00
762a55b19f
Support/PathV1: Deprecate getLast.
...
llvm-svn: 122116
2010-12-18 00:19:10 +00:00
e663aeacf9
Add support to CallbackVH to receive notification when a Value's use-list changes.
...
llvm-svn: 122114
2010-12-18 00:07:15 +00:00
bf4550e3fb
Pass a Banner argument to the machine code verifier both from
...
createMachineVerifierPass and MachineFunction::verify.
The banner is printed before the machine code dump, just like the printer pass.
llvm-svn: 122113
2010-12-18 00:06:56 +00:00
00871c71e9
Fix result type of Neon floating-point comparisons against zero.
...
The result vector elements are always integers. Radar 8782191.
llvm-svn: 122112
2010-12-18 00:04:33 +00:00
f268d0303b
Add some missing entries in ARMTargetLowering::getTargetNodeName.
...
llvm-svn: 122111
2010-12-18 00:04:26 +00:00
5e3605552e
Whitespace fixes. No functionality change.
...
llvm-svn: 122110
2010-12-17 23:27:41 +00:00
cf846100d8
Avoid dereferencing end() in collectInterferingVRegs() when there is no
...
interference.
llvm-svn: 122108
2010-12-17 23:16:38 +00:00
2e98ee31b3
Make the -verify-regalloc command line option available to base classes as
...
RegAllocBase::VerifyEnabled.
Run the machine code verifier in a few interesting places during RegAllocGreedy.
llvm-svn: 122107
2010-12-17 23:16:35 +00:00
1740e00104
Enable loop splitting in RegAllocGreedy.
...
The heuristics split around the largest loop where the current register may be
allocated without interference.
llvm-svn: 122106
2010-12-17 23:16:32 +00:00
7aa18bf46a
Add vector versions of some existing scalar transforms to aid codegen in matching psign & pblend operations to the IR produced by clang/gcc for their C idioms.
...
llvm-svn: 122105
2010-12-17 23:12:19 +00:00
3fff1fd49b
During local stack slot allocation, the materializeFrameBaseRegister function
...
may be called. If the entry block is empty, the insertion point iterator will be
the "end()" value. Calling ->getParent() on it (among others) causes problems.
Modify materializeFrameBaseRegister to take the machine basic block and insert
the frame base register at the beginning of that block. (It's very similar to
what the code does all ready. The only difference is that it will always insert
at the beginning of the entry block instead of after a previous materialization
of the frame base register. I doubt that that matters here.)
<rdar://problem/8782198>
llvm-svn: 122104
2010-12-17 23:09:14 +00:00
5408144add
Fix a DAGCombiner crash when folding binary vector operations with constant
...
BUILD_VECTOR operands where the element type is not legal. I had previously
changed this code to insert TRUNCATE operations, but that was just wrong.
llvm-svn: 122102
2010-12-17 23:06:49 +00:00
a7dabbd2cf
Avoid report_fatal_error in ARM's PrintAsmOperand method.
...
The standard error handling in AsmPrinter::EmitInlineAsm handles this much
better, so just use it.
llvm-svn: 122100
2010-12-17 23:06:42 +00:00
ec3ff9c727
Remove trailing whitespace.
...
llvm-svn: 122099
2010-12-17 23:06:32 +00:00
97b72c99d2
Add support for matching psign & plendvb to the x86 target
...
Remove unnecessary pandn patterns, 'vnot' patfrag looks through bitcasts
llvm-svn: 122098
2010-12-17 22:55:37 +00:00
79855298b9
Thumb's forced-PC-alignment requirement applies to the _total_ displacement, not just to the fragment relative
...
portion. While the fragment boundary is usually already aligned, it is possible for it not to be, which
would lead to a non-aligned final displacement.
llvm-svn: 122091
2010-12-17 21:49:48 +00:00
cd538afa52
Add a transform to DAG Combiner. This improves the
...
code for the case where 32-bit divide by constant is
turned into 64-bit multiply by constant. 8771012.
llvm-svn: 122090
2010-12-17 21:45:49 +00:00
559e09e39d
Support/Path: Deprecate PathV1::isAbsolute.
...
llvm-svn: 122086
2010-12-17 21:21:31 +00:00
ffa42ced39
PathV2: Use StringRef::substr to simplify substring creation.
...
llvm-svn: 122085
2010-12-17 20:27:37 +00:00
a043b62870
Allow missing kill flags on an untied operand of a two-address instruction when
...
the operand uses the same register as a tied operand:
%r1 = add %r1, %r1
If add were a three-address instruction, kill flags would be required on at
least one of the uses. Since it is a two-address instruction, the tied use
operand must not have a kill flag.
This change makes the kill flag on the untied use operand optional.
llvm-svn: 122082
2010-12-17 19:18:41 +00:00
97f1de7347
If The ARM WriteNopData() gets an unaligned byte count to pad out, fill in with
...
a partial value. rdar://8782954
llvm-svn: 122078
2010-12-17 19:03:02 +00:00
cb520cd8cb
Missed some StringRefRefs.
...
llvm-svn: 122077
2010-12-17 18:59:09 +00:00
06ab8b648c
Add bits 31-28 to the Thumb2 encoding of TBB/TBH.
...
llvm-svn: 122076
2010-12-17 18:42:56 +00:00
4416dfa8fb
Handle 2 and 4 byte data blob fixup values for ARM.
...
llvm-svn: 122075
2010-12-17 18:39:10 +00:00
292b44baea
Pass StringRefs by value, for consistency.
...
llvm-svn: 122074
2010-12-17 18:19:06 +00:00
38b6d494d5
Add MachineLoopRange comparators for sorting loop lists by number and by area.
...
llvm-svn: 122073
2010-12-17 18:13:52 +00:00
1294ea7d53
Reapply r121905 (automatic synthesis of @llvm.sadd.with.overflow) with a fix for a bug that manifested itself
...
on the DragonEgg self-host bot. Unfortunately, the testcase is pretty messy and doesn't reduce well due to
interactions with other parts of InstCombine.
llvm-svn: 122072
2010-12-17 18:08:00 +00:00
d11460a65b
Store and free the TargetObjectWriter.
...
llvm-svn: 122070
2010-12-17 18:01:31 +00:00
6b5e56c2b1
Stub out explicit MCELFObjectTargetWriter interface.
...
llvm-svn: 122067
2010-12-17 17:45:22 +00:00
f0e24d426a
Move createELFObjectWriter to its own header.
...
llvm-svn: 122064
2010-12-17 16:59:53 +00:00
e5f49c4ff2
SimplifyCFG: Ranges can be larger than 64 bits. Fixes Release-selfhost build.
...
llvm-svn: 122054
2010-12-17 10:48:14 +00:00
a29e1bf8ad
Fix mismatched new[]/delete.
...
llvm-svn: 122053
2010-12-17 09:56:50 +00:00
affe15fd67
Don't feed 19 bit immediates to ILA.
...
Patch (slightly modified) by Visa Putkinen.
llvm-svn: 122052
2010-12-17 09:36:09 +00:00
df63335844
Use getFixupKindInfo to implement isFixupKindPCRel, ELF version.
...
llvm-svn: 122050
2010-12-17 07:28:17 +00:00
d14b0f1db7
improve switch formation to handle small range
...
comparisons formed by comparisons. For example,
this:
void foo(unsigned x) {
if (x == 0 || x == 1 || x == 3 || x == 4 || x == 6)
bar();
}
compiles into:
_foo: ## @foo
## BB#0: ## %entry
cmpl $6, %edi
ja LBB0_2
## BB#1: ## %entry
movl %edi, %eax
movl $91, %ecx
btq %rax, %rcx
jb LBB0_3
instead of:
_foo: ## @foo
## BB#0: ## %entry
cmpl $2, %edi
jb LBB0_4
## BB#1: ## %switch.early.test
cmpl $6, %edi
ja LBB0_3
## BB#2: ## %switch.early.test
movl %edi, %eax
movl $88, %ecx
btq %rax, %rcx
jb LBB0_4
This catches a bunch of cases in GCC, which look like this:
%804 = load i32* @which_alternative, align 4, !tbaa !0
%805 = icmp ult i32 %804, 2
%806 = icmp eq i32 %804, 3
%or.cond121 = or i1 %805, %806
%807 = icmp eq i32 %804, 4
%or.cond124 = or i1 %or.cond121, %807
br i1 %or.cond124, label %.thread, label %808
turning this into a range comparison.
llvm-svn: 122045
2010-12-17 06:20:15 +00:00
e054a782fc
MC/ARM: Use aggressive symbol folding (important for jump tables, for example).
...
llvm-svn: 122044
2010-12-17 06:00:24 +00:00
137d422e50
MC/Expr: Implemnt more aggressive folding during symbol evaluation using
...
IsSymbolRefDifferenceFullyResolved(). For example, we will now fold away
something like:
--
_a:
...
L0:
...
L1:
...
.long (L1 - L0) / 2
--
llvm-svn: 122043
2010-12-17 05:50:33 +00:00
2ee6c9b8c9
MC/Mach-O: On second thought, use a custom hook for enabling aggressive
...
IsSymbolRefDifferenceFullyResolved, it turns out this does change behavior on
enough cases for x86-32 that I would rather wait a bit on it.
- In practice, we will want to change this eventually because it only means we
generate less relocations (it also eliminates the need for the horrible
'.set' hack that Darwin requires in some places).
llvm-svn: 122042
2010-12-17 05:50:29 +00:00
b27bb86ba5
MC/Mach-O: Implement IsSymbolRefDifferenceFullyResolved.
...
- Unlike for fixups, we always do the "reliable" thing (not just for x86_64).
- Since Darwin 'as' would typically reject things that using this will allow,
we don't need to worry about compatibility.
llvm-svn: 122038
2010-12-17 04:54:58 +00:00
f2adf782ab
MC/ObjectWriter: Add a new IsSymbolRefDifferenceFullyResolved target format specific hook.
...
- Currently just has stub implementations for Mach-O, ELF, and COFF.
llvm-svn: 122037
2010-12-17 04:54:54 +00:00
9c7f3a46d8
Provide LiveIntervalUnion::Query::checkLoopInterference.
...
This is a three-way interval list intersection between a virtual register, a
live interval union, and a loop. It will be used to identify interference-free
loops for live range splitting.
llvm-svn: 122034
2010-12-17 04:09:47 +00:00
50269280f8
MC/Assembler: Strip out object writer arguments, now that it is always available
...
-- and remove FIXME asking for the same!
llvm-svn: 122032
2010-12-17 02:45:59 +00:00
42a037abb1
MC/Assembler: Make the MCObjectWriter available through the lifetime of the
...
assembler.
llvm-svn: 122031
2010-12-17 02:45:41 +00:00
f638b26f17
Trailing whitespace and 80 column fixups.
...
llvm-svn: 122026
2010-12-17 02:10:59 +00:00
d2867f13a0
MC/Target: Remove HasScatteredSymbols target hook variable, which has been
...
superceded and was effectively dead.
llvm-svn: 122024
2010-12-17 02:06:08 +00:00
e491ea4630
MC/Expr: Simplify.
...
llvm-svn: 122023
2010-12-17 02:05:45 +00:00
bfc6904fc6
Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation.
...
Radar 8776599
llvm-svn: 122018
2010-12-17 01:21:12 +00:00
261aad8e16
Use PairDRegs to implement ConcatVectors. No functionality change.
...
llvm-svn: 122017
2010-12-17 01:21:08 +00:00
137dcdba8a
Fix a comment typo.
...
llvm-svn: 122016
2010-12-17 01:21:05 +00:00
93dc2b808f
Revert r64460. strtol and friends cannot be marked readonly, even with
...
a null endptr argument, because they may write to errno.
This fixes a seflhost miscompile observed on Linux targets when TBAA
was enabled.
llvm-svn: 122014
2010-12-17 01:09:43 +00:00
f89156da92
MC: Remove another dead MCAssembler argument, and update clients.
...
llvm-svn: 122013
2010-12-17 01:07:35 +00:00
f15aeb8d01
MC: Remove dead MCAssembler argument -- Rafael, can you check the FIXME I added
...
here?
llvm-svn: 122012
2010-12-17 01:07:31 +00:00
9af1335b5d
MC: Simplify (remove unnecessary MCAssembler argument, obsoleted by containment
...
in MCAsmLayout).
llvm-svn: 122011
2010-12-17 01:07:28 +00:00
33d571e2ae
Write => in a more normal form.
...
llvm-svn: 122009
2010-12-17 01:07:22 +00:00
76793bac89
MC/Expr: Simplify (and add a FIXME).
...
llvm-svn: 122008
2010-12-17 01:07:20 +00:00
32c74ea3ab
"Fix" FDE alignment to match what gas does.
...
llvm-svn: 122006
2010-12-17 00:28:02 +00:00
654cc4a81c
Make pushq produce signed relocations.
...
llvm-svn: 122005
2010-12-16 22:50:01 +00:00
266f4092d7
Fix MBlaze backend call instructions so that arguments passed through registers
...
are correctly marked as used. This removes a hack where the call instructions
marked all possible argument registers as used in the tablegen description.
llvm-svn: 121994
2010-12-16 19:41:31 +00:00
b5743b9d76
Pseudo-ize the Thumb1 tBfar pattern. rdar://8777974
...
llvm-svn: 121990
2010-12-16 19:11:16 +00:00
395a09922b
MC/Expr: Add a doxyment.
...
llvm-svn: 121988
2010-12-16 18:36:25 +00:00
03fcccbb47
MC/Mach-O: Lift some MachObjectWriter arguments into the target specific
...
interface.
llvm-svn: 121981
2010-12-16 17:21:02 +00:00
8888a9604d
MC/Mach-O: Stub out explicit MCMachObjectTargetWriter interface.
...
llvm-svn: 121973
2010-12-16 16:09:19 +00:00
7ee218127a
Fix indentation (per style guide).
...
llvm-svn: 121972
2010-12-16 16:08:43 +00:00
73b8713d7c
MC/Mach-O: Move createMachObjectWriter into MCMachObjectWriter.h.
...
llvm-svn: 121971
2010-12-16 16:08:33 +00:00
9d1ed19982
MC/Mach-O: Use fixup info instead of hard coded list.
...
llvm-svn: 121970
2010-12-16 15:42:31 +00:00
9bbe849fc3
Fix a bug in the loop in JumpThreading::ProcessThreadableEdges() where it could falsely produce a MultipleDestSentinel value if the first predecessor ended with an 'indirectbr'. If that happened, it caused an unnecessary FindMostPopularDest() call.
...
This wasn't a correctness problem, but it broke the fast path for single-predecessor blocks.
llvm-svn: 121966
2010-12-16 12:16:00 +00:00
8d1ab6f6e1
Speculatively revert commit 121905 since it looks like it might have broken the
...
dragonegg self-host buildbot. Original commit message:
Add an InstCombine transform to recognize instances of manual overflow-safe addition
(performing the addition in a wider type and explicitly checking for overflow), and
fold them down to intrinsics. This currently only supports signed-addition, but could
be generalized if someone works out the magic constant formulas for other operations.
llvm-svn: 121965
2010-12-16 09:40:54 +00:00
39a0ffc394
MemoryBuffer now return an error_code and returns a OwningPtr<MemoryBuffer> via an out parm.
...
llvm-svn: 121958
2010-12-16 03:29:14 +00:00
0c9d9fdd81
MC: Move target specific fixup info descriptors to TargetAsmBackend instead of
...
the MCCodeEmitter, which seems like a better organization.
- Also, cleaned up some magic constants while in the area.
llvm-svn: 121953
2010-12-16 03:20:06 +00:00
4c1386add9
1. ARM/MC/ELF: A few more ELF relocs for .o
...
2. Fixed EmitLocalCommonSymbol for ELF (Yes, they exist. :)
Test added.
llvm-svn: 121951
2010-12-16 03:12:17 +00:00
ecd0c8a557
MC: Make TargetAsmBackend available to the AsmStreamer.
...
- Treaty talks on the non-proliferation of MC objects broke down.
llvm-svn: 121949
2010-12-16 03:05:59 +00:00
91ab4ffd96
Update a comment.
...
llvm-svn: 121946
2010-12-16 02:55:10 +00:00
e1a17a3473
Make memcpyopt TBAA-aware.
...
llvm-svn: 121944
2010-12-16 02:51:19 +00:00
2e071faed8
lib/Support/regexec.c: Let Regex LLP64-aware.
...
On LLP64 Win64, 'states1' (for small version) was expanded to 'char *' for large version. Thus small version would be mischosen when nstates > 32 regardless of sizeof(long) on Win64.
llvm-svn: 121942
2010-12-16 01:48:15 +00:00
e9afc740a8
Delete an extra "Imm5 = ", caught by GCC's -Wsequence-point but not by Clang
...
(see PR4579).
llvm-svn: 121939
2010-12-16 01:34:26 +00:00
9613a09e5c
Remove fixup_arm_thumb_ldst. The code was never calling the "fixup" stuff for
...
it. I.e., it was always an immediate value.
llvm-svn: 121932
2010-12-16 00:50:33 +00:00
637813a258
Add tSpill and tRestore to the opcodes to replace with tSTRi and tLDRi
...
respectively.
It may be a bug that these opcodes are getting this far into machine code
generation.
llvm-svn: 121931
2010-12-16 00:49:54 +00:00
f5b17c32d2
Add encodings for Thumb1 Spill and Restore pseudos.
...
llvm-svn: 121929
2010-12-16 00:38:41 +00:00
2c9d342f04
Enable TBAA by default.
...
llvm-svn: 121923
2010-12-15 23:58:44 +00:00
4467aa5294
Preserve TBAA tags when doing load PRE.
...
llvm-svn: 121921
2010-12-15 23:53:55 +00:00
bfef309d11
Thumb1 had two patterns for the same load-from-constant-pool instruction.
...
Canonicalize on tLDRpci and remove tLDRcp.
llvm-svn: 121920
2010-12-15 23:52:36 +00:00
347f4c32e8
Don't handle -arm-long-calls in fast isel for now.
...
llvm-svn: 121919
2010-12-15 23:47:29 +00:00
e7601e97e1
Start using SplitKit and MachineLoopRanges in RegAllocGreedy in preparation of
...
live range splitting around loops guided by register pressure.
So far, trySplit() simply prints a lot of debug output.
llvm-svn: 121918
2010-12-15 23:46:13 +00:00
5e97781386
Add MachineLoopRanges analysis.
...
A MachineLoopRange contains the intervals of slot indexes covered by the blocks
in a loop. This representation of the loop blocks is more efficient to compare
against interfering registers during register coalescing.
llvm-svn: 121917
2010-12-15 23:41:23 +00:00
7d3bde98f1
If we're changing the frame register to a physical register other than SP, we
...
need to use tLDRi and tSTRi instead of tLDRspi and tSTRspi respectively.
llvm-svn: 121915
2010-12-15 23:32:27 +00:00
6217ecd634
Whitespace cleanups.
...
llvm-svn: 121914
2010-12-15 23:31:24 +00:00
f991d4f587
Better fix for opt build
...
llvm-svn: 121910
2010-12-15 23:14:45 +00:00
be69d8e2f3
Only rr forms of ADD*_DB are commutable.
...
llvm-svn: 121908
2010-12-15 22:57:36 +00:00
1cf8881299
Add an InstCombine transform to recognize instances of manual overflow-safe addition
...
(performing the addition in a wider type and explicitly checking for overflow), and
fold them down to intrinsics. This currently only supports signed-addition, but could
be generalized if someone works out the magic constant formulas for other operations.
Fixes <rdar://problem/8558713>.
llvm-svn: 121905
2010-12-15 22:32:38 +00:00
15f96baa01
Fix opt -Werror build
...
llvm-svn: 121904
2010-12-15 22:21:20 +00:00
b7ff5a0f20
Teach machine cse to commute instructions.
...
llvm-svn: 121903
2010-12-15 22:16:21 +00:00
fa27a8621c
Add Neon VCVT instructions for f32 <-> f16 conversions.
...
Clang is now providing intrinsics for these and so we need to support them
in the backend. Radar 8068427.
llvm-svn: 121902
2010-12-15 22:14:12 +00:00
05b18f143f
Reapply r121886, and also update DecomposeGEPExpression to keep
...
it in sync.
llvm-svn: 121895
2010-12-15 20:49:55 +00:00
d02b65982e
Revert r121886. DecomposeGEPExpression needs to be kept
...
in sync.
llvm-svn: 121892
2010-12-15 20:39:25 +00:00
0c558b2080
Lower the MBlaze target specific calling conventions for "interrupt_handler"
...
and "save_volatiles" correctly. This completes the custom calling convention
functionality changes for the MBlaze backend that were started in 121888.
llvm-svn: 121891
2010-12-15 20:27:28 +00:00
949ab7889c
Strengthen GetUnderlyingObject using InstructionSimplify.
...
While LLVM's main design is that analysis code shouldn't
go out of its way to understand code which hasn't been
InstCombined, analysis utility routines like this can
find themselves being called in the middle of transform
passes when instcombine hasn't had a chance to run.
llvm-svn: 121886
2010-12-15 20:10:26 +00:00
a4fcd2418d
Move Value::getUnderlyingObject to be a standalone
...
function so that it can live in Analysis instead of
VMCore.
llvm-svn: 121885
2010-12-15 20:02:24 +00:00
fdb174b6ef
Add some special purpose register definitions to the MBlaze backend and cleanup some old, unused floating point register definitions.
...
llvm-svn: 121882
2010-12-15 19:35:36 +00:00
c8fa5fcc42
Fix typo in r121875.
...
llvm-svn: 121880
2010-12-15 19:24:24 +00:00
23477c2ee5
Tweak a few pseudo-inst pattern base classes.
...
llvm-svn: 121878
2010-12-15 19:03:16 +00:00
11678bd299
Clean up some of LVI:
...
* mergeIn now uses constant folding for constants that are provably not-equal.
* sink some sanity checks from the get*() methods into the mark*() methods, to ensure that we never have a constant/notconstant ConstantInt
* some textual cleanups, whitespace changes, removing "else" after return, that sort of thing.
llvm-svn: 121877
2010-12-15 18:57:18 +00:00
d42257ceef
The new t2LEApcrel* pseudo instructions need the size specified.
...
rdar://8768390
llvm-svn: 121876
2010-12-15 18:48:45 +00:00
622ad5170b
Implement cleanups suggested by Daniel.
...
llvm-svn: 121875
2010-12-15 18:48:27 +00:00
1066ef6b24
Fix build.
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llvm-svn: 121872
2010-12-15 18:07:48 +00:00
28e769cc54
Detect and enumerate bypass loops.
...
Bypass loops have the current live range live through, but contain no uses or
defs. Splitting around a bypass loop can free registers for other uses inside
the loop by spilling the split range.
llvm-svn: 121871
2010-12-15 17:49:52 +00:00
4391f34aba
Separate SplitAnalysis::getSplitLoops().
...
This method returns the set of loops with uses that are candidates for
splitting.
llvm-svn: 121870
2010-12-15 17:41:19 +00:00
0a2c416894
Move Sub simplifications and additional Add simplifications out of
...
instcombine and into InstructionSimplify.
llvm-svn: 121861
2010-12-15 14:07:39 +00:00
019a418808
If we detect that the instruction we are simplifying is unreachable, arrange for
...
it to be replaced by undef rather than not replaced at all, the idea being that
this may reduce the amount of work done by whoever called InstructionSimplify.
llvm-svn: 121860
2010-12-15 11:02:22 +00:00
3d1803495e
Teach jump threading to "look through" a select when the branch direction of a terminator depends on it.
...
When it sees a promising select it now tries to figure out whether the condition of the select is known in any of the predecessors and if so it maps the operands appropriately.
llvm-svn: 121859
2010-12-15 09:51:20 +00:00
03e7576dee
Add fixups for Thumb LDR/STR instructions.
...
llvm-svn: 121858
2010-12-15 08:51:02 +00:00
844f6b6cfb
Relax alignment fragments.
...
With this we don't need the EffectiveSize field anymore. Without that field
LayoutFragment only updates offsets and we don't need to invalidate the
current fragment when it is relaxed (only the ones following it).
This is also a very small improvement in the accuracy of the layout info as
we now use the after relaxation size immediately.
llvm-svn: 121857
2010-12-15 08:45:53 +00:00
8911d03504
Patch by David Meyer to avoid a O(N^2) behaviour when relaxing fragments.
...
Since we now don't update addresses so early, we might relax a bit more than
we need to. This is simillar to the issue in PR8467.
llvm-svn: 121856
2010-12-15 07:39:29 +00:00
5174921b5b
add another overflow idiom
...
llvm-svn: 121854
2010-12-15 07:28:58 +00:00
2e33985300
add a note about overflow idiom recognition.
...
llvm-svn: 121853
2010-12-15 07:25:55 +00:00
f80f18a11a
Generalize an assert.
...
llvm-svn: 121851
2010-12-15 07:12:24 +00:00
27ecda1efd
add a shift/imul missed optimization
...
llvm-svn: 121850
2010-12-15 07:10:43 +00:00
aded09f27f
add a note about a SPEC hack that gcc mainline does.
...
llvm-svn: 121849
2010-12-15 06:38:24 +00:00
15090e1eb0
take care of some todos, transforming [us]mul_lohi into
...
a wider mul if the wider mul is legal.
llvm-svn: 121848
2010-12-15 06:04:19 +00:00
b86dceea1b
when transforming a MULHS into a wider MUL, there is no need to SRA the
...
result, the top bits are truncated off anyway, just use SRL.
llvm-svn: 121846
2010-12-15 05:51:39 +00:00
e893e2601e
make qsort predicate more conformant by returning 0 for equal values.
...
llvm-svn: 121838
2010-12-15 04:52:41 +00:00
832a5daab5
Reapply r121808 now that the missing patterns have been supplied.
...
llvm-svn: 121820
2010-12-15 01:03:19 +00:00
1171e9e81d
Add some missing patterns now that tLDRB and tLDRH are split into reg and
...
immediate versions.
llvm-svn: 121819
2010-12-15 00:58:57 +00:00
35609d97ae
Fix PR8790, another instance where unreachable code can cause instruction simplification to fail,
...
this case involve a select that simplifies to itself.
llvm-svn: 121817
2010-12-15 00:55:35 +00:00
15c85c916f
Cleanup trailing whitespace.
...
llvm-svn: 121816
2010-12-15 00:52:44 +00:00
20480d26e9
Revert r121808 until I can fix the build.
...
llvm-svn: 121815
2010-12-15 00:04:00 +00:00
eda5177ca6
thumb adr fixup needs alignment just like the t2 version.
...
llvm-svn: 121812
2010-12-14 23:47:35 +00:00
5ab38b59e6
Comments and cleaning.
...
llvm-svn: 121809
2010-12-14 23:42:48 +00:00
00adcd6ed9
Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. In
...
particular, we want
ldr r2, [r3]
to be equivalent to
ldr r2, [r3, #0 ]
and not
ldr r2, [r3, r0]
llvm-svn: 121808
2010-12-14 23:40:49 +00:00
Dale Johannesen