678b07fe3c
[AVX-512] Remove masking from 512-bit vpermil builtins. The backend now has versions without masking so wrap it with select.
...
This will allow the backend to constant fold these to generic shuffle vectors like 128-bit and 256-bit without having to working about handling masking.
llvm-svn: 289351
2016-12-11 01:26:52 +00:00
6aefe00ccf
[X86] Replace valignd/q builtins with appropriate __builtin_shufflevector.
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llvm-svn: 287733
2016-11-23 01:47:12 +00:00
698528d83b
[X86][AVX512] Replace lossless i32/u32 to f64 conversion intrinsics with generic IR
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Both the (V)CVTDQ2PD (i32 to f64) and (V)CVTUDQ2PD (u32 to f64) conversion instructions are lossless and can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics without affecting final codegen.
This patch removes the clang builtins and their use in the headers - a future patch will deal with removing the llvm intrinsics.
This is an extension patch to D20528 which dealt with the equivalent sse/avx cases.
Differential Revision: https://reviews.llvm.org/D26686
llvm-svn: 287088
2016-11-16 09:27:40 +00:00
5e0709d60b
[AVX-512] Replace masked dword and qword variable shift builtins with unmasked builtins and a select.
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This is part of a set of changes to allow InstCombine in the backend to optimize variable shifts without having to know about masking.
llvm-svn: 286757
2016-11-13 07:26:34 +00:00
2c8f49e67b
[AVX-512] Use scalar vfmsub/vfnmsub mask3 intrinsics instead of inverting the mask argument of a vfmadd intrinsic.
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Summary: Inverting the mask argument does not reflect the intended semantics of the intrinsic.
Reviewers: igorb, delena
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D26019
llvm-svn: 286733
2016-11-12 23:24:34 +00:00
1a44193afd
[AVX-512] Convert the rest of the masked shift by immediate and by single element builtins over to the newly added unmasked builtins and a select.
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This should also fix PR30691 since the new builtins are handled like the legacy builtins in the backend.
llvm-svn: 286714
2016-11-12 07:16:59 +00:00
e60a41ca28
[X86][AVX512][Clang] Add support for mask_{move|store|load}_s{s/d} and int2mask/mask2int intrinsics.
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Differential Revision: https://reviews.llvm.org/D26021
llvm-svn: 286229
2016-11-08 12:00:30 +00:00
08bf53ffda
[AVX-512] Remove masked vector insert builtins and replace with native shufflevectors and selects.
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Unfortunately, the backend currently doesn't fold masks into the instructions correctly when they come from these shufflevectors. I'll work on that in a future commit.
llvm-svn: 285667
2016-11-01 05:47:56 +00:00
93ffabd28d
[AVX-512] Remove masked vector extract builtins and replace with native shufflevectors and selects.
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Unfortunately, the backend currently doesn't fold masks into the instructions correctly when they come from these shufflevectors. I'll work on that in a future commit.
llvm-svn: 285540
2016-10-31 04:30:56 +00:00
531ce28311
[AVX-512] Replace 64-bit element and 512-bit vector pmin/pmax builtins with native IR like we do for 128/256-bit, but with the addition of masking.
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llvm-svn: 284956
2016-10-24 04:04:24 +00:00
0c5da26572
[AVX-512] Replace 512-bit pmovzx/sx builtins with native IR.
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llvm-svn: 284936
2016-10-23 07:35:47 +00:00
9e43ccfe68
[Clang][AVX512][BuiltIn]Adding missing intrinsics move_{sd|ss} to clang
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Differential Revision: http://reviews.llvm.org/D21021
llvm-svn: 283314
2016-10-05 12:56:06 +00:00
c4a8228bcc
[AVX-512] Use native IR for masked 512-bit add/sub/mul/div ps/pd intrinsics when rounding mode isn't used.
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llvm-svn: 283073
2016-10-02 17:43:00 +00:00
4910755107
[AVX-512] Add _MM_FROUND_NO_EXC to test cases that pass a rounding mode intrinsics. This is preparation for a follow up commit that will check validity of rounding mode argument.
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llvm-svn: 283053
2016-10-01 21:03:46 +00:00
b107a22afb
[X86] Remove the mm_malloc.h include guard hack from the X86 builtins tests
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The X86 clang/test/CodeGen/*builtins.c tests define the mm_malloc.h include
guard as a hack for avoiding its inclusion (mm_malloc.h requires a hosted
environment since it expects stdlib.h to be available - which is not the case
in these internal clang codegen tests).
This patch removes this hack and instead passes -ffreestanding to clang cc1.
Differential Revision: https://reviews.llvm.org/D24825
llvm-svn: 282581
2016-09-28 11:59:09 +00:00
2e250e8845
[avx512] Add aliases to some missing avx512 intrinsics.
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Differential Revision:https: //reviews.llvm.org/D24961
llvm-svn: 282488
2016-09-27 14:06:32 +00:00
5fbabd77c7
[X86] Fix some illegal rounding modes in some builtin test cases to ones that would properly compile to valid assembly.
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llvm-svn: 282137
2016-09-22 06:13:33 +00:00
f43e4a1728
[AVX-512] Remove masked integer mullo builtins and replace with native IR.
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llvm-svn: 280597
2016-09-03 19:19:49 +00:00
0e18976b8d
[AVX-512] Remove masked integer add/sub builtins and replace with native IR.
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llvm-svn: 280596
2016-09-03 18:29:35 +00:00
2f344b788c
[AVX512] integer comparisions enumeration.
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fix Bug 28842 https://llvm.org/bugs/show_bug.cgi?id=28842
Differential Revision: https://reviews.llvm.org/D22212
llvm-svn: 277955
2016-08-07 10:43:04 +00:00
abb2b54ad3
After PR28761 use -Wall with -Werror in builtins tests to identify
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possible problems in headers.
llvm-svn: 277696
2016-08-04 06:02:50 +00:00
45db56c375
[X86] Add missing __x86_64__ qualifiers on a bunch of intrinsics that assume 64-bit GPRs are available.
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Usages of these intrinsics in a 32-bit build results in assertions in the backend.
llvm-svn: 276249
2016-07-21 07:38:39 +00:00
4d61a3c2d8
[AVX512] Replace masked AND/OR/XOR intrinsics with native code and remove the builtins.
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llvm-svn: 275049
2016-07-11 06:14:18 +00:00
6e76fb61a7
[X86] Use __butilin_shufflevector for 512-bit shufps intrinsics.
...
llvm-svn: 275012
2016-07-10 05:57:21 +00:00
f5a8837e1b
[X86][AVX512] Converted the VBROADCAST intrinsics to generic IR
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llvm-svn: 274544
2016-07-05 12:59:33 +00:00
136332888a
[X86][AVX512F] add float/double abs intrinsics
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add abs intrinsics that use native LLVM-IR.
change _mm512_mask[z]_and_epi{32|64} to use select intrinsic
Differential Revision: http://reviews.llvm.org/D21973
llvm-svn: 274542
2016-07-05 12:24:14 +00:00
2a383c9273
[X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z.
...
llvm-svn: 274525
2016-07-04 22:18:01 +00:00
427154db2a
[X86][AVX512] Converted the VSHUFPD intrinsics to generic IR
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llvm-svn: 274523
2016-07-04 21:30:47 +00:00
30db811526
[X86][AVX512] Converted the VPERMPD/VPERMQ intrinsics to generic IR
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llvm-svn: 274502
2016-07-04 13:34:44 +00:00
17388f2569
[X86][AVX512] Converted the VPERMILPD/VPERMILPS intrinsics to generic IR
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llvm-svn: 274492
2016-07-04 11:06:15 +00:00
275d721485
[X86][AVX512] Converted the MOVDDUP/MOVSLDUP/MOVSHDUP masked intrinsics to generic IR
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llvm companion patch imminent
llvm-svn: 274442
2016-07-02 17:16:25 +00:00
70d4bb566c
Update the expected masked load/store intrinsics names in tests
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The mangling of their names was changed in order to support arbitrary addrspace pointers as arguments in rL274043.
llvm-svn: 274044
2016-06-28 18:28:45 +00:00
79f53ca0b5
[AVX512] Replace masked unpack builtins with shufflevector and selects.
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llvm-svn: 273533
2016-06-23 06:36:42 +00:00
d1691c7026
[AVX512] Replace masked integer cmp and ucmp builtins with native IR.
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llvm-svn: 273378
2016-06-22 04:47:58 +00:00
a54c21e742
[AVX512] Use native IR for mask pcmpeq/pcmpgt intrinsics.
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llvm-svn: 272787
2016-06-15 14:06:34 +00:00
223676d2cc
[Clang][AVX512][intrinsics] Adding missing intrinsics div_pd and div_ps
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Differential Revision: http://reviews.llvm.org/D20626
llvm-svn: 272658
2016-06-14 12:38:58 +00:00
880f0c252b
[X86][AVX512F] bugfix - sqrtps should get __mask16 as mask parameter
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CR: Michael Zuckerman
llvm-svn: 272549
2016-06-13 15:15:57 +00:00
beca5f295c
[Clang][X86] Convert non-temporal store builtins to generic __builtin_nontemporal_store in headers
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We can now use __builtin_nontemporal_store instead of target specific builtins for naturally aligned nontemporal stores which avoids the need for handling in CGBuiltin.cpp
The scalar integer nontemporal (unaligned) store builtins will have to wait as __builtin_nontemporal_store currently assumes natural alignment and doesn't accept the 'packed struct' trick that we use for normal unaligned load/stores.
The nontemporal loads require further backend support before we can safely convert them to __builtin_nontemporal_load
Differential Revision: http://reviews.llvm.org/D21272
llvm-svn: 272540
2016-06-13 09:57:52 +00:00
7cc9263ec2
[AVX512] Implement masked and 512-bit pshufd intrinsics directly with __builtin_shufflevector and __builtin_ia32_select.
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llvm-svn: 272467
2016-06-11 12:50:19 +00:00
aadb876200
[AVX512] Emit select instruction instead of using x86 specific instrinsics.
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This will allow us to remove the x86 instrinics from the backend.
Differential Revision: http://reviews.llvm.org/D21060
llvm-svn: 272141
2016-06-08 13:59:20 +00:00
95721ac863
[Clang][AVX512]Adding set4 intrinsics
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Differential Revision: http://reviews.llvm.org/D20866
llvm-svn: 271835
2016-06-05 15:43:30 +00:00
f36f6eb036
[Clang][AVX512][Intrinsics] Adding two definitions _mm512_setzero and _mm512_setzero_epi32
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Differential Revision: http://reviews.llvm.org/D20871
llvm-svn: 271832
2016-06-05 15:12:52 +00:00
89f657611c
[X86][AVX512] add intrinsics of Scalar FP to integer
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Differential Revision: http://reviews.llvm.org/D20861
llvm-svn: 271499
2016-06-02 08:11:35 +00:00
6170c15fc6
[Clang][Intrinsics][avx512] Continue Adding round cvt to clang
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And remove trailing spaces in intrinsic f test
Differential Revision: http://reviews.llvm.org/D20810
llvm-svn: 271398
2016-06-01 14:41:41 +00:00
e6aa66a53d
[Clang][Intrinsics][avx512] Adding round intrinsics fot max/min/sqrt instruction set to clang
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Differential Revision: http://reviews.llvm.org/D20812
llvm-svn: 271373
2016-06-01 08:34:03 +00:00
c301c194ec
[Clang][Intrinsics][avx512] Adding round roundscale to clang
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Differential Revision: http://reviews.llvm.org/D20815
llvm-svn: 271368
2016-06-01 07:35:44 +00:00
186d86738d
[Clang][Intrinsics][avx512] Adding round cvt to clang
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Differential Revision: http://reviews.llvm.org/D20790
llvm-svn: 271265
2016-05-31 11:27:34 +00:00
4b060e31c9
[AVX512] Convert masked load builtins to generic masked load intrinsics instead of the x86 specific ones.
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This will allow the x86 intrinsics to be removed from the backend.
llvm-svn: 271253
2016-05-31 06:58:07 +00:00
6e891fbdd2
[AVX512] Emit generic masked store instrinsics instead of using x86 specific intrinsics.
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This will allow us to remove the x86 instrinics from the backend.
llvm-svn: 271246
2016-05-31 01:50:10 +00:00
9fcf3552ad
[Clang][avx512][builtin] Adding missing intrinsics for cvt
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Differential Revision: http://reviews.llvm.org/D20618
llvm-svn: 271205
2016-05-30 13:22:12 +00:00
cbdbbac875
[AVX512] Add masked v16i32 and v8i64 unaligned store tests.
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llvm-svn: 271134
2016-05-28 18:59:06 +00:00
22c47e606a
Adding missing _mm512_castsi512_si256 intrinsic.
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llvm-svn: 270851
2016-05-26 14:32:11 +00:00
6f08cebf36
[Clang][AVX512][BUILTIN] Adding intrinsics for set1
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Differential Revision: http://reviews.llvm.org/D20562
llvm-svn: 270825
2016-05-26 06:54:52 +00:00
1f4381f810
[AVX512] Don't rely on value names. They're different in release builds.
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llvm-svn: 270704
2016-05-25 14:30:01 +00:00
d5cc6cd262
[Clang][AVX512][BUILTIN] Add missing intrinsics for cast
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Differential Revision: http://reviews.llvm.org/D20523
llvm-svn: 270699
2016-05-25 14:04:21 +00:00
e6542002fc
[Clang][AVX512][BUILTIN]adding missing intrinsics for movdaq instruction set
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Differential Revision: http://reviews.llvm.org/D20514
llvm-svn: 270401
2016-05-23 08:01:48 +00:00
504c01cc67
Don't rely on value numbers in test, those are fragile and change in Release (no asserts) builds.
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llvm-svn: 270085
2016-05-19 17:57:35 +00:00
178113e8cc
[Clang][AVX512][intrinsics] continue completing missing set intrinsics
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Differential Revision: http://reviews.llvm.org/D20160
llvm-svn: 270047
2016-05-19 12:07:49 +00:00
2cacc35343
[Clang][AVX512] completing missing intrinsics [pandnd].
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Differential Revision: http://reviews.llvm.org/D20101
llvm-svn: 269939
2016-05-18 15:25:53 +00:00
dbbe4a5542
[AVX512] Fix return types in several test cases to match the intrinsic they're testing.
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llvm-svn: 269738
2016-05-17 04:41:32 +00:00
bf05a4589e
[Clang][AVX512] completing missing intrinsics for [vpabs] instruction set
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Differential Revision: http://reviews.llvm.org/D20069
llvm-svn: 269680
2016-05-16 18:57:24 +00:00
cb85677471
[Clang][AVX512] completing missing intrinsics [vsqrt|vrsqrt|vrcp14 ].
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Differential Revision: http://reviews.llvm.org/D20068
llvm-svn: 269649
2016-05-16 11:42:01 +00:00
9c6c85f1ad
[AVX512] Add typecasts to some intrinsics to avoid doing operations on the __m512/__m512i/__m512d types.
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llvm-svn: 269631
2016-05-16 06:38:36 +00:00
e5cc18054a
[AVX512] Use correct types in test case.
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llvm-svn: 269622
2016-05-16 01:09:19 +00:00
dca1f230ae
[AVX512] Add intrinsics for 512-bit insertf32x8/insertf32x4/inserti32x4.
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llvm-svn: 269617
2016-05-15 21:26:20 +00:00
13d3c002df
[clang][AVX512] completing missing set intrinsics
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Differential Revision: http://reviews.llvm.org/D20099
llvm-svn: 269172
2016-05-11 11:41:29 +00:00
5e2c6b6200
[clang][AVX512] completing missing intrinsics for [vpermt2d|vptestm] instruction set.
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Differential Revision: http://reviews.llvm.org/D20096
llvm-svn: 269170
2016-05-11 11:21:18 +00:00
d4fbaef2b0
clang/test/CodeGen/avx512f-builtins.c: Fix for -Asserts.
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llvm-svn: 269079
2016-05-10 17:16:12 +00:00
e9e8e573e3
[Clang][AVX512] completing missing intrinsics [load/store]
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Differential Revision: http://reviews.llvm.org/D20063
llvm-svn: 269056
2016-05-10 13:13:54 +00:00
de860e5585
[Clang][AVX512] completing missing intrinsics [vmin/vmax]{sd|sq|uq|ud}.
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Differential Revision: http://reviews.llvm.org/D20064
llvm-svn: 269042
2016-05-10 11:34:19 +00:00
2564d2f5fe
[Clang][AVX512] completing missing intrinsics [vextractf].
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Differential Revision: http://reviews.llvm.org/D20061
llvm-svn: 269037
2016-05-10 10:14:50 +00:00
7360d8a9cc
[Clang][AVX512] completing missing intrinsics [roundscale, ceil, floor]
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Differential Revision: http://reviews.llvm.org/D20070
llvm-svn: 269022
2016-05-10 07:30:58 +00:00
f9be3bb1d5
[clang][AVX512] completing missing intrinsics [vmin/vmax].
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Differential Revision: http://reviews.llvm.org/D20062
llvm-svn: 268910
2016-05-09 12:38:49 +00:00
f15447537f
[Clang][AVX512] completing missing intrinsics [CVT]
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Differential Revision: http://reviews.llvm.org/D20056
llvm-svn: 268903
2016-05-09 10:32:51 +00:00
e6f7389b5a
[Clang][Builtin][AVX512] Adding intrinsics fot cvt{u}si2s{d|s} cvt{sd|ss}2{ss|sd} instruction set
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Differential Revision: http://reviews.llvm.org/D19765
llvm-svn: 268481
2016-05-04 08:55:11 +00:00
71dfcb42eb
Change test to use regex instead of explicit value numbers. NFC.
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We were seeing an internal failure when running this test. I can't
see a good reason for the difference, but the simple fix is to use
%{{.*}} instead of %1.
llvm-svn: 268416
2016-05-03 18:32:01 +00:00
c66770313a
[clang][AVX512][BuiltIn] Adding intrinsics for cast{pd|ps|si}128_{pd|ps|si}512 and castsi256_si512 instruction set
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Differential Revision: http://reviews.llvm.org/D19858
llvm-svn: 268387
2016-05-03 14:26:52 +00:00
138fc5b5a8
[Clang][AVX512][Builtin] Adding intrinsics for vcvttpd2udq instruction set
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Differential Revision: http://reviews.llvm.org/D19768
llvm-svn: 268373
2016-05-03 11:05:24 +00:00
708e759b86
[Clang][AVX512][BUILTIN] Adding intrinsics for compressstore{df|di|sf|si} instruction set.
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Differential Revision: http://reviews.llvm.org/D19808
llvm-svn: 268372
2016-05-03 10:42:46 +00:00
5f0e96e56a
[CLANG][AVX512][BUILTIN]movap{d|s}{128|256|512}
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Differential Revision: http://reviews.llvm.org/D17818
llvm-svn: 268230
2016-05-02 14:02:01 +00:00
d6e68ce75f
[Clang][AVX512][BuiltIn] Adding intrinsics for cvtps2pd instruction set
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Differential Revision: http://reviews.llvm.org/D19774
llvm-svn: 268217
2016-05-02 09:42:31 +00:00
6a0e0871db
[Clang][avx512][builtin] Adding intrinsics for vexpand{d|q|ps|pd} instrctuon set
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Differential Revision: http://reviews.llvm.org/D19467
llvm-svn: 268214
2016-05-02 08:36:41 +00:00
c62f27e3f4
[Clang][BuiltIn][avx512] Adding intrinsics for vpshufd instruction set
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Differential Revision: http://reviews.llvm.org/D19580
llvm-svn: 268213
2016-05-02 07:35:27 +00:00
ac1e519944
[clang][Builtin][AVX512] Adding intrinsics for vmovshdup and vmovsldup instruction set
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Differential Revision: http://reviews.llvm.org/D19595
llvm-svn: 268196
2016-05-01 14:43:43 +00:00
0b9d105a16
[clang][BuiltIn][AVX512]Adding intrinsics for cmp{ss|sd} instruction set.
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Differential Revision: http://reviews.llvm.org/D19601
llvm-svn: 268028
2016-04-29 11:01:16 +00:00
41f5a37707
[Clang][AVX512][Builtin] Adding intrinsics for compress instruction set
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Differential Revision: http://reviews.llvm.org/D19599
llvm-svn: 268013
2016-04-29 08:52:02 +00:00
533e065bdc
[Clang][BuiltIn][AVX512] Adding intrinsics fot align{d|q} and palignr instruction set
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Differential Revision: http://reviews.llvm.org/D19588
llvm-svn: 267876
2016-04-28 12:47:30 +00:00
8c2900f44d
[Clang][BuiltIn][AVX512] Adding intrinsics without mask for VBROADCAST and VPBROADCAST instruction set .
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Differential Revision: http://reviews.llvm.org/D19196
llvm-svn: 267696
2016-04-27 11:43:14 +00:00
7c85a8cb46
[Clang][BuiltIn][AVX512]Adding intrinsics for vmovntdqa vmovntpd vmovntps instruction set
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Differential Revision: http://reviews.llvm.org/D19529
llvm-svn: 267690
2016-04-27 10:44:15 +00:00
fa508e8b6d
[Clang][Builtin][AVX512]Adding k-register logic intrinsics KAND, KANDN, KOR, KORTEST, KXNOR, KXOR, KUNPACK instruction set.
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Differential Revision: http://reviews.llvm.org/D19466
llvm-svn: 267425
2016-04-25 16:42:29 +00:00
fcf32c2f00
[Clang][AVX512][BUILTIN] Adding intrinsics for VSCATTERPF{1|0}{DPS|QPS|DPD|QPD} instruction set
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Differential Revision: http://reviews.llvm.org/D19313
llvm-svn: 267398
2016-04-25 13:01:40 +00:00
8938e836c4
[Clang][AVX512][BuiltIn] Adding support to intrinsics of VPERMD and VPERMW instruction set
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Differential Revision: http://reviews.llvm.org/D19195
llvm-svn: 267380
2016-04-25 05:32:35 +00:00
743d68c3cb
[clang][AVX512][Builtin] adding intrinsics for vf{n}madd{ss|sd} and vf{n}sub{ss|sd} instruction set
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Differential Revision: http://reviews.llvm.org/D19320
llvm-svn: 267135
2016-04-22 10:56:24 +00:00
a1ceca20b6
[Clang][AVX512][BUILTIN] Adding scalar intrinsics for rsqrt14 ,rcp14, getexp and getmant instruction set
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Differential Revision: http://reviews.llvm.org/D19326
llvm-svn: 267129
2016-04-22 10:06:10 +00:00
4fa96af4db
[Clang][AVX512][BuiltIn] Adding intrinsics of VGATHER{DPS|DPD} , VPGATHER{QD|QQ|DD|DQ} and VGATHERPF{0|1}{DPS|QPS|DPD|QPD} instruction set .
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Differential Revision: http://reviews.llvm.org/D19224
llvm-svn: 266983
2016-04-21 12:47:27 +00:00
6fa512cecf
[Clang][Builtin][AVX512] Adding intrinsics for VGETMANT{PD|PS} and VGETEXP{PD|PS} instruction set
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Differential Revision: http://reviews.llvm.org/D19197
llvm-svn: 266763
2016-04-19 17:10:29 +00:00
ef2979af50
[Clang][AVX512][BUILTIN] Adding intrinsics support to VEXTRACT{I|F} and VINSERT{I|F} instruction set
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Differential Revision: http://reviews.llvm.org/D19097
llvm-svn: 266745
2016-04-19 15:18:23 +00:00
0a3508a8d3
[Clang][AVX512][BUILTIN] Adding support for intrinsics of vpmov{d|q}{b|w|d}{128|256|512} instruction set
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Differential Revision: http://reviews.llvm.org/D19055
llvm-svn: 266280
2016-04-14 07:56:51 +00:00
d871531687
[Clang][AVX512][Builtin] Adding intrinsics of vpmovus{d|q}{b|w|d}{128|256|512} instruction set
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Differential Revision: http://reviews.llvm.org/D19050
llvm-svn: 266278
2016-04-14 06:48:09 +00:00
e1680617b0
[Clang][AVX512][Builtin] Adding support to intrinsics of pmovs{d|q}{b|w|d}{128|256|512} instruction set
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Differential Revision: http://reviews.llvm.org/D19023
llvm-svn: 266202
2016-04-13 15:02:04 +00:00
04fb3bc682
[Clang][BuiltIn][avx512] Adding avx512 (shuf,sqrt{ss|sd},rsqrt ) builtin to clang
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llvm-svn: 266048
2016-04-12 07:59:39 +00:00
81f468c859
[Clang][AVX512][BuiltIn] Adding avx512 ( psll{d|q}512,psllv{16si|8di},psra{d|q}512,psrav{16si|8di},pternlog{d|q}{128|256|512} ) builtin to clang
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Differential Revision: http://reviews.llvm.org/D18926
llvm-svn: 265964
2016-04-11 17:04:21 +00:00
6b5f4d8ad1
[CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtin
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Differential Revision: http://reviews.llvm.org/D17693
llvm-svn: 265952
2016-04-11 15:46:39 +00:00
1af947a7b3
[Clang][AVX512][BuiltIn] Adding avx512 ( punpck{h|l}{dq|qdq}{128|256|512},rndscale{ss|sd}, {scalef{ss|sd|pd512|ps512} ) builtin to clang
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Differential Revision: http://reviews.llvm.org/D18929
llvm-svn: 265935
2016-04-11 12:32:31 +00:00
07525091e6
[Clang][AVX512][BuiltIn] Adding avx512 ( ptest{n}m{b|w}{128|256|512} ) builtin to clang
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Differential Revision: http://reviews.llvm.org/D18924
llvm-svn: 265928
2016-04-11 10:22:07 +00:00
d8d2f62107
[Clang][AVX512][BuiltIn] Adding avx512 ( vperm{i|t}2var, vpermil{var}{ps|pd}{256|512} ) builtin to clang.
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Differential Revision: http://reviews.llvm.org/D18933
llvm-svn: 265915
2016-04-11 07:15:34 +00:00
8d16199b7b
[Clang][AVX512][BuiltIn] Adding avx512 ( vcvt ) builtin to clang
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Differential Revision: http://reviews.llvm.org/D18932
llvm-svn: 265904
2016-04-10 17:24:03 +00:00
cdd54c83d8
Adding avx512 (unpck{h|l}{pd|ps}, rcp14{pd|ps}{128|256},vplzcnt{d|q} ) builtin to clang
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Differential Revision: http://reviews.llvm.org/D18931
llvm-svn: 265896
2016-04-10 12:54:23 +00:00
def78750b7
[CLANG][avx512][BUILTIN] Adding fixupimm{pd|ps|sd|ss}
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getexp{sd|ss} getmant{sd|ss} kunpck{di|si} loada{pd|ps} loaddqu{di|hi|qi|si} max{sd|ss} min{sd|ss} kmov16 builtins to clang
Differential Revision: http://reviews.llvm.org/D18215
llvm-svn: 264574
2016-03-28 12:23:09 +00:00
e71d59fc4f
[CLANG][AVX512][BUILTIN] Add builtin vcomi{ss|sd}
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Differential Revision: http://reviews.llvm.org/D17919
llvm-svn: 262847
2016-03-07 19:15:00 +00:00
0d67e4b5d6
[CLANG][AVX512][BUILTIN] movddup{128|256|512}
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Differential Revision: http://reviews.llvm.org/D17826
llvm-svn: 262617
2016-03-03 13:43:05 +00:00
ffbb67a8e2
[CLANG][AVX512][BUILTIN] movdqa{32|64}{load|store|}{128|256|512}
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Differential Revision: http://reviews.llvm.org/D17812
llvm-svn: 262598
2016-03-03 09:26:01 +00:00
d176d744af
[CLANG][AVX512][BUILTIN] Adding PSRL{DI|QI}{128|256|512} builtin
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Differential Revision: http://reviews.llvm.org/D17714
llvm-svn: 262355
2016-03-01 17:49:03 +00:00
1ac360cca4
[CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtin
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Differential Revision: http://reviews.llvm.org/D17693
llvm-svn: 262321
2016-03-01 11:38:16 +00:00
e98cc7477f
[CLANG] [AVX512] [BUILTIN] Adding prorv{d|q}{128|256|512} builtin to clang
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Differential Revision: http://reviews.llvm.org/D17512
llvm-svn: 261641
2016-02-23 15:59:47 +00:00
0231f1649b
[CLANG] [AVX512] [BUILTIN] Adding pro{lv|r}{d|q}{128|256|512} builtin to clang
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Differential Revision: http://reviews.llvm.org/D17506
llvm-svn: 261635
2016-02-23 13:41:13 +00:00
38a2727764
[CLANG] [AVX512] [BUILTIN] Adding prol{d|q|w}{128|256|512} builtin to clang .
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Differential Revision: http://reviews.llvm.org/D16985
llvm-svn: 261516
2016-02-22 09:05:41 +00:00
7a33dce4ef
[CLANG] [AVX512] [BUILTIN] Adding pmovzx{b|d|w}{w|d|q}{128|256|512} builtin to clang
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Differential Revision: http://reviews.llvm.org/D16961
llvm-svn: 261471
2016-02-21 14:00:11 +00:00
7cdb72f7ea
[CLANG] [AVX512] [BUILTIN] Adding pmovsx{b|d|w}{w|d|q}{128|256|512} builtin to clang
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Differential Revision: http://reviews.llvm.org/D16955
llvm-svn: 261196
2016-02-18 09:09:34 +00:00
803f43bf6d
[x86] Filecheck is case sensitive. Capitalize directives.
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llvm-svn: 255916
2015-12-17 19:01:55 +00:00
cd875efa78
Canonicalize some of the x86 builtin tests and either remove or comment
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about optimization options.
llvm-svn: 250271
2015-10-14 05:40:21 +00:00
5aba9925c0
[X86][SSE] Add _mm_undefined_* intrinsics
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Added missing SSE/AVX 'undefined' intrinsics (PR24040):
_mm_undefined_pd, _mm_undefined_ps + _mm_undefined_si128
_mm256_undefined_pd, _mm256_undefined_ps + _mm256_undefined_si256
_mm512_undefined, _mm512_undefined_ps, _mm512_undefined_pd + _mm512_undefined_epi32
Added builtin intrinsicss:
__builtin_ia32_undef128, __builtin_ia32_undef256 + __builtin_ia32_undef512
Differential Revision: http://reviews.llvm.org/D12052
llvm-svn: 246083
2015-08-26 21:17:12 +00:00
f6a58b6dff
[X86][AVX512F] Add FP scalar intrinsics
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intrinsics for: add/sub/mul/div/min/max in their FP scalar versions
Differential Revision: http://reviews.llvm.org/D11418
llvm-svn: 243009
2015-07-23 12:13:32 +00:00
ffeb624483
[X86][AVX512F] add FP arithmetic intrinsics
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add/div/mul/sub include rounding versions
Differential Revision: http://reviews.llvm.org/D11354
llvm-svn: 242790
2015-07-21 15:27:28 +00:00
c563c2c61a
AVX-512: Implemented AVX-512 FMA intrinsics and tests.
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by Igor Breger
http://reviews.llvm.org/D10797
llvm-svn: 240928
2015-06-29 09:20:57 +00:00
5a26b25471
minor test fix
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llvm-svn: 238924
2015-06-03 13:42:46 +00:00
23fccde1b1
AVX-512: Changed CC parameter in "cmp" intrinsic
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from i8 to i32 according to the Intel Spec
llvm-svn: 236980
2015-05-11 09:03:41 +00:00
35dc8c0944
AVX-512: added intrinsics for KNL and SKX
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by Asaf Badouh (asaf.badouh@intel.com )
llvm-svn: 235986
2015-04-28 13:28:01 +00:00
29da2fba46
AVX-512: added clang intrinsics for logical and, or xor for 512 bits
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by Asaf Badouh (asaf.badouh@intel.com )
llvm-svn: 233794
2015-04-01 06:54:16 +00:00
a953f2825b
Update Clang tests to handle explicitly typed load changes in LLVM.
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llvm-svn: 230795
2015-02-27 21:19:58 +00:00
53565c60e7
[X86] Add other flavors of AVX512 cmpps/cmppd intrinsics.
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llvm-svn: 227773
2015-02-01 22:27:40 +00:00
67826a5883
[X86] Rename _mm512_valign_epi64/32 intrinsics to _mm512_alignr_epi64/32 to match Intel docs. Make immediate argument to them an ICE. Fix mask size for the alignd version.
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llvm-svn: 227713
2015-02-01 07:35:40 +00:00
2f25a5a875
[X86] Add more of the AVX512 integer comparision intrinsics. This adds 128 and 256 bit vectors of dwords and qwords.
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llvm-svn: 227075
2015-01-26 08:11:49 +00:00
4cac1c2318
[X86] Add AVX512F integer comparision intrinsics to header file.
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llvm-svn: 227067
2015-01-25 23:30:07 +00:00
f893edeaea
[AVX512] Add sub-vector FP extracts
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Analogous to AVX2, these need to be implemented as macros to properly
propagate the immediate index operand.
Part of <rdar://problem/17688758>
llvm-svn: 226496
2015-01-19 20:12:05 +00:00
f557b09f14
[x86] Mark that the AVX-512 cmpps/cmppd builtins need an ICE for the comparison immediate. This requires converting to a macro in the header file.
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llvm-svn: 226421
2015-01-19 01:18:19 +00:00
c0cff244fc
[AVX512] Add intrinsics for masked aligned FP loads and stores
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Part of <rdar://problem/17688758>
llvm-svn: 226298
2015-01-16 18:51:50 +00:00
d47dec4690
Fix typo in r225922.
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llvm-svn: 226297
2015-01-16 18:51:46 +00:00
63a951eb1c
[AVX512] Add FP unpack intrinsics
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These are implemented with __builtin_shufflevector just like AVX.
We have some tests on the LLVM side to assert that these shufflevectors do
indeed generate the corresponding unpck instruction.
Part of <rdar://problem/17688758>
llvm-svn: 225922
2015-01-14 01:31:17 +00:00
b9f3a911c9
[AVX512] Added VPCMPEQ intrinisics to headers.
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Added tests.
Patch by Maxim Blumenthal <maxim.blumenthal@intel.com>
llvm-svn: 219319
2014-10-08 17:18:13 +00:00
2278fcbf0c
[AVX512] Add FMA intrinsics
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Part of <rdar://problem/17688758>
llvm-svn: 215666
2014-08-14 17:17:57 +00:00
4abc07cb75
[AVX512] Add intrinsics for FP scalar broadcasts
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Similar approach to the set1 intrinsics is used: implement in terms of vector
initializers and then ensure with an LLVM test that a broadcast is generated
at the end.
Part of <rdar://problem/17688758>
llvm-svn: 215486
2014-08-13 00:29:01 +00:00
5bf7baa938
[AVX512] Add intrinsic for valignd/q
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Note that similar to palingr, we could further optimize these to emit
shufflevector when the shift count is <=64. This however does not
change the overall design that unlike palignr we would still need the LLVM
intrinsic corresponding to this intruction to handle the >64 cases. (palignr
uses the psrldq intrinsic in this case.)
llvm-svn: 214891
2014-08-05 17:28:23 +00:00
da82bcc4dd
[AVX512] Add unaligned FP load intrinsics
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Part of <rdar://problem/17688758>
llvm-svn: 214380
2014-07-31 04:00:39 +00:00
2db1d2fb32
[AVX512] Add intrinsic for knot
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Part of <rdar://problem/17688758>
llvm-svn: 214316
2014-07-30 16:51:27 +00:00
c871ff95f3
[AVX512] Add some of the FP cast intrinsics
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Part of <rdar://problem/17688758>
llvm-svn: 214315
2014-07-30 16:51:24 +00:00
f42e7a274a
[AVX512] Add set1 intrinsics
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(Dropped the byte and word variants from the patch. Turns out these are not
part of AVX512F but only AVX512BW/VL.)
Part of <rdar://problem/17688758>
llvm-svn: 214314
2014-07-30 16:51:22 +00:00
fce1ad0b99
[AVX512] Add non-masking FP store intrinsics
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Part of <rdar://problem/17688758>
llvm-svn: 214099
2014-07-28 17:14:45 +00:00
a3ebe6214b
[AVX512] Add FP add/sub/mul intrinsics
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Part of <rdar://problem/17688758>
llvm-svn: 214098
2014-07-28 17:14:42 +00:00
062ba618f5
[AVX512] Add CHECK-LABELs to test/CodeGen/avx512f-builtins.c
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llvm-svn: 214095
2014-07-28 17:14:36 +00:00
Craig Topper