forked from OSchip/llvm-project
36 lines
1.5 KiB
LLVM
36 lines
1.5 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope %s
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; creating v4i16->v4f16 and v4f16->v4i16 bitcasts in the selection DAG is rather
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; difficult, so this test has to throw in some llvm.amdgcn.wqm to get them
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; CHECK-LABEL: {{^}}test_to_i16:
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; CHECK: s_endpgm
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define amdgpu_ps void @test_to_i16(<4 x i32> inreg, <4 x half> inreg) #0 {
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%a_tmp = call <4 x half> @llvm.amdgcn.wqm.v4f16(<4 x half> %1)
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%a_i16_tmp = bitcast <4 x half> %a_tmp to <4 x i16>
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%a_i16 = call <4 x i16> @llvm.amdgcn.wqm.v4i16(<4 x i16> %a_i16_tmp)
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%a_i32 = bitcast <4 x i16> %a_i16 to <2 x i32>
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call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> %a_i32, <4 x i32> %0, i32 0, i32 0, i32 0)
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ret void
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}
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; CHECK-LABEL: {{^}}test_to_half:
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; CHECK: s_endpgm
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define amdgpu_ps void @test_to_half(<4 x i32> inreg, <4 x i16> inreg) #0 {
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%a_tmp = call <4 x i16> @llvm.amdgcn.wqm.v4i16(<4 x i16> %1)
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%a_half_tmp = bitcast <4 x i16> %a_tmp to <4 x half>
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%a_half = call <4 x half> @llvm.amdgcn.wqm.v4f16(<4 x half> %a_half_tmp)
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%a_i32 = bitcast <4 x half> %a_half to <2 x i32>
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call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> %a_i32, <4 x i32> %0, i32 0, i32 0, i32 0)
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ret void
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}
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declare <4 x half> @llvm.amdgcn.wqm.v4f16(<4 x half>) #1
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declare <4 x i16> @llvm.amdgcn.wqm.v4i16(<4 x i16>) #1
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declare void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32>, <4 x i32>, i32, i32, i32) #0
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readonly }
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