forked from OSchip/llvm-project
44 lines
1.1 KiB
LLVM
44 lines
1.1 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; Check that we generate compare to predicate register.
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define i32 @compare1(i32 %a, i32 %b) nounwind {
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; CHECK: p{{[0-3]}} = {{!?}}cmp.eq(r{{[0-9]+}},r{{[0-9]+}})
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entry:
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%cmp = icmp ne i32 %a, %b
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%add = add nsw i32 %a, %b
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%sub = sub nsw i32 %a, %b
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%add.sub = select i1 %cmp, i32 %add, i32 %sub
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ret i32 %add.sub
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}
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define i32 @compare2(i32 %a) nounwind {
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; CHECK: p{{[0-3]}} = {{!?}}cmp.eq(r{{[0-9]+}},#10)
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entry:
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%cmp = icmp ne i32 %a, 10
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%add = add nsw i32 %a, 10
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%sub = sub nsw i32 %a, 10
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%add.sub = select i1 %cmp, i32 %add, i32 %sub
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ret i32 %add.sub
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}
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define i32 @compare3(i32 %a, i32 %b) nounwind {
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; CHECK: p{{[0-3]}} = cmp.gt(r{{[0-9]+}},r{{[0-9]+}})
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entry:
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%cmp = icmp sgt i32 %a, %b
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%sub = sub nsw i32 %a, %b
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%add = add nsw i32 %a, %b
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%sub.add = select i1 %cmp, i32 %sub, i32 %add
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ret i32 %sub.add
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}
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define i32 @compare4(i32 %a) nounwind {
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; CHECK: p{{[0-3]}} = cmp.gt(r{{[0-9]+}},#10)
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entry:
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%cmp = icmp sgt i32 %a, 10
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%sub = sub nsw i32 %a, 10
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%add = add nsw i32 %a, 10
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%sub.add = select i1 %cmp, i32 %sub, i32 %add
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ret i32 %sub.add
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}
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