forked from OSchip/llvm-project
62 lines
1.7 KiB
LLVM
62 lines
1.7 KiB
LLVM
; RUN: llc -march=hexagon -enable-pipeliner=false < %s | FileCheck %s
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; RUN: llc -march=hexagon -enable-pipeliner < %s
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; REQUIRES: asserts
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; CHECK-NOT: and(
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; CHECK-NOT: or(
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; CHECK-NOT: combine(0
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; CHECK: add
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; CHECK: add(
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; CHECK-NEXT: memuh(
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; CHECK-NEXT: endloop
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%s.22 = type { i64 }
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@g0 = common global i32 0, align 4
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; Function Attrs: nounwind
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define i64 @f0(%s.22* nocapture %a0, i32 %a1) #0 {
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b0:
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%v0 = bitcast %s.22* %a0 to i16*
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%v1 = load i16, i16* %v0, align 2, !tbaa !0
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%v2 = zext i16 %v1 to i64
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%v3 = icmp sgt i32 %a1, 0
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br i1 %v3, label %b1, label %b4
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b1: ; preds = %b0
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br label %b2
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b2: ; preds = %b2, %b1
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%v4 = phi i16* [ %v8, %b2 ], [ %v0, %b1 ]
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%v5 = phi i32 [ %v10, %b2 ], [ undef, %b1 ]
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%v6 = phi i32 [ %v15, %b2 ], [ 0, %b1 ]
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%v7 = phi i64 [ %v14, %b2 ], [ %v2, %b1 ]
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%v8 = getelementptr inbounds i16, i16* %v4, i32 1
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%v9 = trunc i64 %v7 to i32
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%v10 = add i32 %v5, %v9
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%v11 = load i16, i16* %v8, align 2, !tbaa !0
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%v12 = zext i16 %v11 to i64
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%v13 = and i64 %v7, -4294967296
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%v14 = or i64 %v12, %v13
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%v15 = add nsw i32 %v6, 1
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%v16 = icmp eq i32 %v15, %a1
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br i1 %v16, label %b3, label %b2
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b3: ; preds = %b2
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br label %b4
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b4: ; preds = %b3, %b0
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%v17 = phi i32 [ undef, %b0 ], [ %v10, %b3 ]
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%v18 = phi i64 [ %v2, %b0 ], [ %v14, %b3 ]
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store volatile i32 %v17, i32* @g0, align 4, !tbaa !4
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ret i64 %v18
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}
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attributes #0 = { nounwind }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"short", !2}
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!2 = !{!"omnipotent char", !3}
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!3 = !{!"Simple C/C++ TBAA"}
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!4 = !{!5, !5, i64 0}
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!5 = !{!"long", !2}
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