forked from OSchip/llvm-project
76 lines
1.8 KiB
LLVM
76 lines
1.8 KiB
LLVM
; RUN: llc -march=hexagon -O3 -hexagon-small-data-threshold=0 < %s | FileCheck %s
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; This lit test validates that storetrunc for a 64bit value picks a store
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; absolute pattern instead of base + index store pattern. This will facilitate
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; the constant extender optimization pass to move the immediate value to a register
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; if there are more than two uses and replace all the uses of the constant.
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; Generation of absolute pattern for a 64 bit truncated value also aviods an
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; extra move.
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@g0 = external global i8, align 8
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@g1 = external global i16, align 8
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@g2 = external global i32, align 8
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; CHECK-LABEL: f0:
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; CHECK: memd(##441656) = r{{[0-9]+}}
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define void @f0(i64 %a0) #0 {
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b0:
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store volatile i64 %a0, i64* inttoptr (i32 441656 to i64*)
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ret void
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}
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; CHECK-LABEL: f1:
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; CHECK: memw(##441656) = r{{[0-9]+}}
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define void @f1(i64 %a0) #0 {
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b0:
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%v0 = trunc i64 %a0 to i32
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store volatile i32 %v0, i32* inttoptr (i32 441656 to i32*)
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ret void
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}
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; CHECK-LABEL: f2:
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; CHECK: memh(##441656) = r{{[0-9]+}}
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define void @f2(i64 %a0) #0 {
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b0:
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%v0 = trunc i64 %a0 to i16
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store volatile i16 %v0, i16* inttoptr (i32 441656 to i16*)
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ret void
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}
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; CHECK-LABEL: f3:
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; CHECK: memb(##441656) = r{{[0-9]+}}
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define void @f3(i64 %a0) #0 {
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b0:
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%v0 = trunc i64 %a0 to i8
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store volatile i8 %v0, i8* inttoptr (i32 441656 to i8*)
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ret void
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}
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; CHECK-LABEL: f4:
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; CHECK: memw(##g2) = r{{[0-9]+}}
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define void @f4(i64 %a0) #0 {
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b0:
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%v0 = trunc i64 %a0 to i32
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store volatile i32 %v0, i32* @g2
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ret void
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}
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; CHECK-LABEL: f5:
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; CHECK: memh(##g1) = r{{[0-9]+}}
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define void @f5(i64 %a0) #0 {
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b0:
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%v0 = trunc i64 %a0 to i16
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store volatile i16 %v0, i16* @g1
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ret void
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}
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; CHECK-LABEL: f6:
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; CHECK: memb(##g0) = r{{[0-9]+}}
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define void @f6(i64 %a0) #0 {
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b0:
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%v0 = trunc i64 %a0 to i8
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store volatile i8 %v0, i8* @g0
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ret void
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}
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attributes #0 = { nounwind }
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