forked from OSchip/llvm-project
39 lines
1.1 KiB
LLVM
39 lines
1.1 KiB
LLVM
; RUN: llc -march=hexagon -enable-pipeliner < %s
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; REQUIRES: asserts
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; Function Attrs: nounwind
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define void @f0(i32* nocapture %a0) #0 {
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b0:
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br i1 undef, label %b1, label %b2
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b1: ; preds = %b1, %b0
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%v0 = phi i64 [ %v9, %b1 ], [ 0, %b0 ]
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%v1 = phi i32 [ %v10, %b1 ], [ 0, %b0 ]
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%v2 = getelementptr inbounds i32, i32* %a0, i32 %v1
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%v3 = load i32, i32* %v2, align 4, !tbaa !0
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%v4 = zext i32 %v3 to i64
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%v5 = load i32, i32* undef, align 4, !tbaa !0
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%v6 = zext i32 %v5 to i64
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%v7 = shl nuw i64 %v6, 32
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%v8 = or i64 %v7, %v4
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%v9 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %v0, i64 %v8, i64 %v8)
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%v10 = add nsw i32 %v1, 4
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%v11 = icmp slt i32 %v10, undef
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br i1 %v11, label %b1, label %b2
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b2: ; preds = %b1, %b0
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%v12 = phi i64 [ 0, %b0 ], [ %v9, %b1 ]
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ret void
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}
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; Function Attrs: nounwind readnone
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declare i64 @llvm.hexagon.M2.vdmacs.s0(i64, i64, i64) #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2}
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!2 = !{!"omnipotent char", !3}
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!3 = !{!"Simple C/C++ TBAA"}
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