forked from OSchip/llvm-project
31 lines
963 B
LLVM
31 lines
963 B
LLVM
; RUN: llc -march=hexagon -O2 -simplifycfg-require-and-preserve-domtree=1 < %s
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; REQUIRES: asserts
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; Function Attrs: noinline nounwind ssp
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define fastcc void @f0() #0 {
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b0:
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%v0 = add i32 0, 39
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%v1 = and i32 %v0, -8
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br i1 undef, label %b1, label %b2
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b1: ; preds = %b1, %b0
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%v2 = phi i32 [ %v10, %b1 ], [ undef, %b0 ]
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%v3 = phi i8* [ %v7, %b1 ], [ undef, %b0 ]
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%v4 = ptrtoint i8* %v3 to i32
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%v5 = add i32 %v4, %v1
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%v6 = bitcast i8* %v3 to i32*
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store i32 %v5, i32* %v6, align 4
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%v7 = getelementptr inbounds i8, i8* %v3, i32 %v1
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%v8 = getelementptr inbounds i8, i8* %v3, i32 0
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%v9 = bitcast i8* %v8 to i32*
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store i32 1111638594, i32* %v9, align 4
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%v10 = add nsw i32 %v2, -1
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%v11 = icmp sgt i32 %v10, 0
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br i1 %v11, label %b1, label %b2
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b2: ; preds = %b1, %b0
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ret void
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}
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attributes #0 = { noinline nounwind ssp "target-cpu"="hexagonv55" }
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