llvm-project/llvm/test/MC/Disassembler/AArch64
Sam Parker daed9de622 [AArch64] CCSIDR2 system register
Implement the 'Current Cache Size' register that has been introduced
as part of the Armv8.3 architecture. I originally missed this, and
(hopefully) should be the final patch for assembler support.

Differential Revision: https://reviews.llvm.org/D41396

llvm-svn: 321155
2017-12-20 08:56:41 +00:00
..
a64-ignored-fields.txt
arm64-advsimd.txt [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
arm64-arithmetic.txt
arm64-basic-a64-undefined.txt
arm64-bitfield.txt
arm64-branch.txt
arm64-canonical-form.txt
arm64-crc32.txt
arm64-crypto.txt
arm64-invalid-logical.txt
arm64-logical.txt
arm64-memory.txt
arm64-non-apple-fmov.txt
arm64-scalar-fp.txt
arm64-system.txt
armv8.1a-atomic.txt
armv8.1a-lor.txt
armv8.1a-pan.txt
armv8.1a-rdma.txt
armv8.1a-vhe.txt
armv8.2a-at.txt
armv8.2a-dotprod.txt [ARM][AArch64] Cortex-A75 and Cortex-A55 support 2017-08-21 08:43:06 +00:00
armv8.2a-mmfr2.txt
armv8.2a-persistent-memory.txt
armv8.2a-statistical-profiling.txt
armv8.2a-uao.txt
armv8.3a-ID_ISAR6_EL1.txt [AArch64] IDSAR6 register assembler support 2017-08-31 08:36:45 +00:00
armv8.3a-complex.txt [AArch64] v8.3-a complex number support 2017-08-31 09:27:04 +00:00
armv8.3a-js.txt [ARM][AArch64] v8.3-A Javascript Conversion 2017-08-22 11:08:21 +00:00
armv8.3a-rcpc.txt [ARM][AArch64] Cortex-A75 and Cortex-A55 support 2017-08-21 08:43:06 +00:00
armv8.3a-signed-pointer.txt [AArch64] Enable ARMv8.3-A pointer authentication 2017-08-11 13:14:00 +00:00
basic-a64-instructions.txt [AArch64] CCSIDR2 system register 2017-12-20 08:56:41 +00:00
basic-a64-undefined.txt
basic-a64-unpredictable.txt
fullfp16-neg.txt
fullfp16-neon-neg.txt
gicv3-regs.txt
ldp-offset-predictable.txt
ldp-postind.predictable.txt
ldp-preind.predictable.txt
lit.local.cfg
neon-instructions.txt
ras-extension.txt
trace-regs.txt