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aperture-regs.ll
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AMDGPU: Fix disassembly of aperture registers
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2017-02-18 18:41:41 +00:00 |
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dpp_vi.txt
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[AMDGPU] Disassembler: fix for disaasembling v_mac_f32/16_dpp/sdwa
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2016-12-22 11:30:48 +00:00 |
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ds_vi.txt
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[AMDGPU][MC] Fix for Bug 28211 + LIT tests
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2017-04-07 13:07:13 +00:00 |
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exp_vi.txt
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[AMDGPU][MC] Fixed bugs in export instruction
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2017-05-19 13:36:09 +00:00 |
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flat_gfx9.txt
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AMDGPU/GCN: Bring processors in sync with AMDGPUUsage
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2017-12-08 20:52:28 +00:00 |
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flat_vi.txt
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AMDGPU: Remove tfe bit from flat instruction definitions
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2017-05-11 17:38:33 +00:00 |
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gfx8_dasm_all.txt
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[AMDGPU][mc][tests] Updated generated lit tests for GFX8/9
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2017-11-22 15:47:27 +00:00 |
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gfx9_dasm_all.txt
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AMDGPU/GCN: Bring processors in sync with AMDGPUUsage
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2017-12-08 20:52:28 +00:00 |
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lit.local.cfg
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…
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literal16_vi.txt
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[AMDGPU][MC] Corrected v_madak/madmk to avoid printing "_e32" in disassembler output
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2017-05-10 13:00:28 +00:00 |
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mac.txt
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AMDGPU: Fix crash when disassembling VOP3 mac
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2017-04-10 17:58:06 +00:00 |
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mimg_vi.txt
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AMDGPU: Partially fix disassembly of MIMG instructions
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2017-12-13 21:07:51 +00:00 |
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mov.txt
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…
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mtbuf_vi.txt
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[AMDGPU] Add intrinsics for tbuffer load and store
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2017-06-22 16:29:22 +00:00 |
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mubuf_vi.txt
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nop.txt
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sdwa_gfx9.txt
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[AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tma
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2017-12-11 15:23:20 +00:00 |
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sdwa_vi.txt
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[AMDGPU] SDWA: remove omod src operand for VOP2b instructions
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2017-11-21 14:11:59 +00:00 |
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si-support.txt
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AMDGPU: Replace assert with report_fatal_error
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2017-02-15 21:50:34 +00:00 |
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smem_vi.txt
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[AMDGPU] Disassembler: fix s_buffer_store_dword instructions
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2016-12-05 09:58:51 +00:00 |
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smrd_vi.txt
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sop1_vi.txt
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[AMDGPU][MC] Corrected src0 size for s_cbranch_join
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2017-04-12 12:40:19 +00:00 |
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sop2_vi.txt
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sopc_vi.txt
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[AMDGPU][MC] Corrected disassembler to decode instructions with 2 literals
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2017-05-19 14:27:52 +00:00 |
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sopk_vi.txt
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sopp_vi.txt
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trap_gfx9.txt
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[AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers
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2017-12-22 15:18:06 +00:00 |
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trap_vi.txt
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[AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers
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2017-12-22 15:18:06 +00:00 |
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vintrp.txt
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AMDGPU: Change vintrp printing
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2016-12-14 16:36:12 +00:00 |
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vop1.txt
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AMDGPU: Fix handling of 16-bit immediates
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2016-12-10 00:39:12 +00:00 |
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vop1_gfx9.txt
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AMDGPU/GCN: Bring processors in sync with AMDGPUUsage
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2017-12-08 20:52:28 +00:00 |
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vop1_vi.txt
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vop2_vi.txt
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[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}
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2017-11-20 18:24:21 +00:00 |
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vop3_gfx9.txt
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AMDGPU/GCN: Bring processors in sync with AMDGPUUsage
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2017-12-08 20:52:28 +00:00 |
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vop3_vi.txt
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[AMDGPU][MC][GFX9] Added integer clamping support for VOP3 opcodes
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2017-08-16 13:51:56 +00:00 |
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vopc_vi.txt
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