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modify the tempalte

This commit is contained in:
leeyunlong 2025-06-24 19:54:50 +08:00
parent 41b613f5f7
commit 137d858801
4 changed files with 13 additions and 15 deletions
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5
Scripts/gen_sram_wrap/template_sram_sp_wrap.v
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@ -11,7 +11,7 @@ module ${SramWrapName} #(
input wire [$clog2(DEPTH)-1:0] A,
input wire [WIDTH-1:0] D,
input wire [WIDTH-1:0] BWEB,
input wire mem_ctrl_sd,
input wire mem_ctrl_bus_sd,
input wire [64 -1:0] mem_ctrl_bus,
output wire [WIDTH-1:0] Q
);
@ -24,7 +24,7 @@ wire [ADDR_WIDTH-1:0] sram_addr;
wire [WIDTH-1:0] sram_rdata;
wire [WIDTH-1:0] sram_wdata;
wire SD = mem_ctrl_sd;
wire SD = mem_ctrl_bus_sd;
wire [2-1:0] RTSEL = mem_ctrl_bus[49:48];
wire [2-1:0] WTSEL = mem_ctrl_bus[45:44];
@ -49,7 +49,6 @@ wire [2-1:0] WTSEL = mem_ctrl_bus[45:44];
);
end
else begin : ILLEGAL_SRAM_SIZE
$display("Error: Unsupported SRAM size %d x %d for TSMC N12 SRAM", WIDTH, DEPTH);
end
`elsif USE_N12_SNPS_SRAM

9
Scripts/gen_sram_wrap/template_sram_sp_wrap_asmbly.v
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@ -11,7 +11,7 @@ module ${SramWrapName} #(
input wire [$clog2(DEPTH)-1:0] A,
input wire [WIDTH-1:0] D,
input wire [WIDTH-1:0] BWEB,
input wire mem_ctrl_sd,
input wire mem_ctrl_bus_sd,
input wire [64 -1:0] mem_ctrl_bus,
output wire [WIDTH-1:0] Q
);
@ -33,13 +33,13 @@ localparam COMPILE_WIDTH = ${CompileWidth};
localparam ADDR_COMPILE_WIDTH = $clog2(COMPILE_DEPTH);
wire SD = mem_ctrl_sd;
wire SD = mem_ctrl_bus_sd;
wire [2-1:0] RTSEL = mem_ctrl_bus[49:48];
wire [2-1:0] WTSEL = mem_ctrl_bus[45:44];
`ifdef USE_N12_TSMC_SRAM
wire[ASSEMBLY_DEPTH_NUMS - 1:] sram_ceb_sub;
wire[ASSEMBLY_DEPTH_NUMS - 1:0] sram_ceb_sub;
wire[WIDTH - 1:0] sram_rdata_sub[ASSEMBLY_DEPTH_NUMS - 1:0];
wire [ADDR_WIDTH -1:ADDR_COMPILE_WIDTH] sram_sel = sram_addr[ADDR_WIDTH -1:ADDR_COMPILE_WIDTH];
@ -51,7 +51,7 @@ genvar gv_col;
generate
for(gv_row=0; gv_row<ASSEMBLY_DEPTH_NUMS; gv_row=gv_row+1) begin: GEN_ASSEMBLY_SRAM_row
//== Judge Chip enable
sram_ceb_sub[gv_row] = ((sram_ceb==1'b0) && (sram_addr[ADDR_WIDTH -1:ADDR_COMPILE_WIDTH]==gv_row)) ? 1'b0 : 1'b1; // CEB for each row
assign sram_ceb_sub[gv_row] = ((sram_ceb==1'b0) && (sram_addr[ADDR_WIDTH -1:ADDR_COMPILE_WIDTH]==gv_row)) ? 1'b0 : 1'b1; // CEB for each row
for(gv_col=0; gv_col<ASSEMBLY_WIDTH_NUMS; gv_col=gv_col+1) begin: GEN_ASSEMBLY_SRAM_col
//== SRAM Instance
if(DEPTH==${Depth} && WIDTH==${Width}) begin : GEN_${Depth}x${Width}_SRAM
@ -74,7 +74,6 @@ generate
);
end
else begin : ILLEGAL_SRAM_SIZE
$display("Error: Unsupported SRAM size %d x %d for TSMC N12 SRAM", WIDTH, DEPTH);
end
end
end

6
Scripts/gen_sram_wrap/template_sram_tp_wrap.v
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@ -13,8 +13,8 @@ module ${SramWrapName} #(
input wire REB, // Read Enable, Active-low
input wire [$clog2(DEPTH)-1:0] AB, // Read Address
input wire mem_ctrl_sd,
input wire mem_ctrl_bus,
input wire mem_ctrl_bus_sd,
input wire [64 -1:0] mem_ctrl_bus,
output wire [WIDTH-1:0] Q // Read Data Output
);
@ -29,7 +29,7 @@ module ${SramWrapName} #(
wire [ADDR_WIDTH-1:0] sram_raddr;
wire [WIDTH-1:0] sram_rdata;
wire SD = mem_ctrl_sd;
wire SD = mem_ctrl_bus_sd;
wire [2 -1:0] RTSEL = mem_ctrl_bus[63:62];
wire [2 -1:0] MTSEL = mem_ctrl_bus[59:58];
wire [2 -1:0] WTSEL = mem_ctrl_bus[55:54];

8
Scripts/gen_sram_wrap/template_sram_tp_wrap_asmbly.v
View File

@ -13,8 +13,8 @@ module ${SramWrapName} #(
input wire REB, // Read Enable, Active-low
input wire [$clog2(DEPTH)-1:0] AB, // Read Address
input wire mem_ctrl_sd,
input wire mem_ctrl_bus,
input wire mem_ctrl_bus_sd,
input wire [64 -1:0] mem_ctrl_bus,
output wire [WIDTH-1:0] Q // Read Data Output
);
@ -35,7 +35,7 @@ module ${SramWrapName} #(
localparam ADDR_COMPILE_WIDTH = $clog2(COMPILE_DEPTH);
wire SD = mem_ctrl_sd;
wire SD = mem_ctrl_bus_sd;
wire [2 -1:0] RTSEL = mem_ctrl_bus[63:62];
wire [2 -1:0] MTSEL = mem_ctrl_bus[59:58];
wire [2 -1:0] WTSEL = mem_ctrl_bus[55:54];
@ -44,7 +44,7 @@ module ${SramWrapName} #(
wire[ASSEMBLY_DEPTH_NUMS - 1:0] sram_web_sub;
wire[ASSEMBLY_DEPTH_NUMS - 1:0] sram_reb_sub;
wire[WIDTH - 1:0] sram_wdata_sub[ASSEMBLY_DEPTH_NUMS - 1:0];
wire[WIDTH - 1:0] sram_rdata_sub[ASSEMBLY_DEPTH_NUMS - 1:0];
wire [ADDR_WIDTH -1:ADDR_COMPILE_WIDTH] sram_sel = sram_raddr[ADDR_WIDTH -1:ADDR_COMPILE_WIDTH];
assign sram_rdata = sram_rdata_sub[sram_sel];