Commit Graph

48578 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes 276eb8debf Reintroduce r135730, this is indeed the right approach, there is no
native 256-bit vector instruction to do scalar_to_vector.

llvm-svn: 136001
2011-07-25 23:05:16 +00:00
Benjamin Kramer c956033947 Add a note about efficient codegen for binary log.
llvm-svn: 135996
2011-07-25 22:30:00 +00:00
Jakub Staszak e92d047b51 BranchProbability::print returns void now.
llvm-svn: 135994
2011-07-25 22:27:42 +00:00
Eli Friedman cbd3ba91b7 Make sure this DAGCombine actually returns an UNDEF of the correct type; PR10476.
llvm-svn: 135993
2011-07-25 22:25:42 +00:00
Jakub Staszak 49993f26bf Add BlockFrequency class.
llvm-svn: 135992
2011-07-25 22:24:51 +00:00
Jim Grosbach 3a9cbeed73 ARM assembly parsing and encoding for SSAT instruction.
Fix the Rn register encoding for both SSAT and USAT. Update the parsing of the
shift operand to correctly handle the allowed shift types and immediate ranges
and issue meaningful diagnostics when an illegal value or shift type is
specified. Add aliases to parse an ommitted shift operand (default value of
'lsl #0').

Add tests for diagnostics and proper encoding.

llvm-svn: 135990
2011-07-25 22:20:28 +00:00
Andrew Trick 990f771a9a Add clarifying comments for the new arguments to UnrollLoop.
llvm-svn: 135988
2011-07-25 22:17:47 +00:00
Evan Cheng 55c8a78716 Refactoring fail.
llvm-svn: 135986
2011-07-25 22:16:37 +00:00
Evan Cheng 6099cf16e5 Move CBackend and CppBackend MC initialization to TargetInfo.
llvm-svn: 135982
2011-07-25 21:44:12 +00:00
Eli Friedman ea8c66fea5 Get rid of an incorrect optimization for shuffles with PALIGNR and simplify isPALIGNRMask.
Addresses PR10466, although the crash from that PR only triggers in cases where DAGCombine misses optimizing a shuffle.

llvm-svn: 135980
2011-07-25 21:36:45 +00:00
Evan Cheng 9eec764c15 Fix more MC layering violations.
llvm-svn: 135979
2011-07-25 21:32:49 +00:00
Evan Cheng 21b42e2498 More MC layering violations.
llvm-svn: 135978
2011-07-25 21:29:26 +00:00
Chandler Carruth b2561029b1 Add a missing enumerator to this switch. Currently its in the
assert-path code, as previously we would have fallen off the end of the
function, but please review and let me know if this should go somewhere
else.

This fixes a Clang warning:
lib/MC/MCMachOStreamer.cpp:201:11: error: enumeration value 'MCSA_IndirectSymbol' not handled in switch [-Werror,-Wswitch-enum]
  switch (Attribute) {
          ^
1 error generated.

llvm-svn: 135976
2011-07-25 21:21:08 +00:00
Rafael Espindola e96fd5a4fe Add LLVMAddTargetLibraryInfo to the C API.
llvm-svn: 135975
2011-07-25 21:20:54 +00:00
Evan Cheng 61faa55b74 Separate MCInstPrinter registration from AsmPrinter registration.
llvm-svn: 135974
2011-07-25 21:20:24 +00:00
Nick Lewycky 77cb8e681f Add missing space (this line is no longer pushing the 80-column limit).
llvm-svn: 135973
2011-07-25 21:16:04 +00:00
Jim Grosbach 3ddf6aa503 Simply ARM so_reg MIOperandInfo definitions.
The shift immediate encoding, printing, etc. is handled directly by the
enclosing operand definition, so it should be a vanilla immediate, not a
nested complex operand (shift_imm).

llvm-svn: 135968
2011-07-25 21:04:58 +00:00
Rafael Espindola 7281395c8c Add LLVMAddLowerExpectIntrinsicPass to the C API.
llvm-svn: 135966
2011-07-25 20:57:59 +00:00
Evan Cheng f60768a14e Fix last bits of MC layer issues. llvm-mc doesn't need to initialize TargetMachine's anymore.
llvm-svn: 135963
2011-07-25 20:53:02 +00:00
Jim Grosbach ac798e1533 ARM asm operand renaming. Make things a bit more explicit.
llvm-svn: 135959
2011-07-25 20:49:51 +00:00
Jim Grosbach eeaab22166 More simple cleanup of ARM asm operand definitions.
llvm-svn: 135958
2011-07-25 20:38:18 +00:00
Evan Cheng f5bf19530b Code clean up.
llvm-svn: 135954
2011-07-25 20:18:48 +00:00
Evan Cheng d2e165d48b Refactor MBlaze target to separate MC routines from Target routines.
llvm-svn: 135953
2011-07-25 20:18:18 +00:00
Bill Wendling 43ab71a9a8 Update the comment. This feature is available only on Darwin at the moment. Though it's not Darwin-specific.
llvm-svn: 135951
2011-07-25 20:15:15 +00:00
Jim Grosbach 2d6ef44d39 Make assembly parser method names more consistent.
llvm-svn: 135950
2011-07-25 20:14:50 +00:00
Oscar Fuentes 47d4aaf8ad Unbreak the build.
llvm-svn: 135949
2011-07-25 20:13:36 +00:00
Jim Grosbach 46d575acc6 Tidy up formatting.
Remove some inititalizers that are the same as the default, move defs next to
their (singular) uses and generally simplify some formatting of asm operand
definitions.

llvm-svn: 135946
2011-07-25 20:06:30 +00:00
Jim Grosbach 5ed9fe8037 Tidy up a bit.
llvm-svn: 135945
2011-07-25 20:00:32 +00:00
Evan Cheng 20b31548e6 Missed a file.
llvm-svn: 135943
2011-07-25 19:55:33 +00:00
Evan Cheng 61d4a20f0f Refactor PPC target to separate MC routines from Target routines.
llvm-svn: 135942
2011-07-25 19:53:23 +00:00
Evan Cheng b25310095f More refactoring.
llvm-svn: 135939
2011-07-25 19:33:48 +00:00
Jakub Staszak 875ebd5f5d Rename BlockFrequency to BlockFrequencyInfo and MachineBlockFrequency to
MachineBlockFrequencyInfo.

llvm-svn: 135937
2011-07-25 19:25:40 +00:00
Evan Cheng 7e763d86ba Refactor X86 target to separate MC code from Target code.
llvm-svn: 135930
2011-07-25 18:43:53 +00:00
Bill Wendling 2dc0005b3c Changed disabled code into a flag.
llvm-svn: 135924
2011-07-25 18:04:49 +00:00
Bill Wendling 1d10909cb7 Remove dead variable.
llvm-svn: 135923
2011-07-25 18:01:27 +00:00
Bill Wendling b97270d58a After we've modified the prolog to save volatile registers, generate the compact
unwind encoding for that function. This simply crawls through the prolog looking
for machine instrs marked as "frame setup". It can calculate from these what the
compact unwind should look like.

This is currently disabled because of needed linker support. But initial tests
look good.

llvm-svn: 135922
2011-07-25 18:00:28 +00:00
Jim Grosbach 38b1ed8ce2 Move some ELF directives into ELF asm parser.
The .local, .hidden, .internal, and .protected are not legal for all supported
file formats (in particular, they're invalid for MachO). Move the parsing for
them into the ELF assembly parser since that's the format they're for.
Similarly, .weak is used by COFF and ELF, but not MachO, so move the parsing
to the COFF and ELF asm parsers. Previously, using any of these directives
on Darwin would result in an assertion failure in the parser; now we get
a diagnostic as we should.

rdar://9827089

llvm-svn: 135921
2011-07-25 17:55:35 +00:00
Jim Grosbach 1a55fa61e2 Tidy up. 80 columns.
llvm-svn: 135917
2011-07-25 17:11:29 +00:00
Jakob Stoklund Olesen 450111718c Add an RS_Split2 stage used for loop prevention.
This mechanism already exists, but the RS_Split2 stage makes it clearer.

When live range splitting creates ranges that may not be making
progress, they are marked RS_Split2 instead of RS_New. These ranges may
be split again, but only in a way that can be proven to make progress.

For local ranges, that means they must be split into ranges used by
strictly fewer instructions.

For global ranges, region splitting is bypassed and the RS_Split2
ranges go straight to per-block splitting.

llvm-svn: 135912
2011-07-25 15:25:43 +00:00
Jakob Stoklund Olesen 3ef8cf1370 Rename live range stages to better reflect how they are used.
The stage is used to control where a live range is going, not where it
is coming from. Live ranges created by splitting will usually be marked
RS_New, but some are marked RS_Spill to avoid wasting time trying to
split them again.

The old RS_Global and RS_Local stages are merged - they are really the
same thing for local and global live ranges.

llvm-svn: 135911
2011-07-25 15:25:41 +00:00
Frits van Bommel ede0dc6dda Shorten some expressions by using ArrayRef::slice().
llvm-svn: 135910
2011-07-25 15:13:01 +00:00
Jay Foad 89d9b81a3a Use ArrayRef in the (protected) constructors of ConstantArray, ConstantStruct and ConstantVector.
llvm-svn: 135905
2011-07-25 10:14:44 +00:00
Jay Foad d1b7849d49 Convert GetElementPtrInst to use ArrayRef.
llvm-svn: 135904
2011-07-25 09:48:08 +00:00
Chris Lattner d757d3f5c2 switch Triple to take twines instead of stringrefs.
llvm-svn: 135889
2011-07-24 20:45:08 +00:00
Chris Lattner 9650f0678c Add Twine support for characters, and switch twine to use a union internally
to eliminate some casting.

llvm-svn: 135888
2011-07-24 20:44:30 +00:00
Jakob Stoklund Olesen 73a9eb9f81 Never extend live ranges for <undef> uses.
llvm-svn: 135886
2011-07-24 20:33:23 +00:00
Jakob Stoklund Olesen 56a56eb80e Correctly handle <undef> tied uses when rewriting after a split.
This fixes PR10463. A two-address instruction with an <undef> use
operand was incorrectly rewritten so the def and use no longer used the
same register, violating the tie constraint.

Fix this by always rewriting <undef> operands with the register a def
operand would use.

llvm-svn: 135885
2011-07-24 20:23:50 +00:00
Roman Divacky aaba17e89b Set PPCII::MO_DARWIN_STUB only on MacOSX < 10.5.
llvm-svn: 135866
2011-07-24 08:22:56 +00:00
Jakob Stoklund Olesen ecad62f909 Add RAGreedy::calcCompactRegion.
This method computes the edge bundles that should be live when splitting
around a compact region. This is independent of interference.

The function returns false if the live range was already a compact
region, or the compact region doesn't have any live bundles - it would
be the same as splitting around basic blocks.

Compact regions are computed using the normal spill placement code. We
pretend there is interference in all live-through blocks that don't use
the live range. This removes all edges from the Hopfield network used
for spill placement, so it converges instantly.

llvm-svn: 135847
2011-07-23 03:41:57 +00:00
Jakob Stoklund Olesen f500ccece7 Fix bug in SplitEditor::splitLiveThroughBlock when switching registers.
If there is no interference and no last split point, we cannot
enterIntvBefore(Stop) - that function needs a real instruction.

Use enterIntvAtEnd instead for that very easy case.

This code doesn't currently run, it is needed by multi-way splitting.

llvm-svn: 135846
2011-07-23 03:32:26 +00:00
Jakob Stoklund Olesen a953bf135f Prepare RAGreedy::growRegion for compact regions.
A split candidate can have a null PhysReg which means that it doesn't
map to a real interference pattern. Instead, pretend that all through
blocks have interference.

This makes it possible to generate compact regions where the live range
doesn't go through blocks that don't use it. The live range will still
be live between directly connected blocks with uses.

Splitting around a compact region tends to produce a live range with a
high spill weight, so it may evict a less dense live range.

llvm-svn: 135845
2011-07-23 03:22:33 +00:00
Jakob Stoklund Olesen 0ab5d0ee5b Add a simple method for marking blocks with interference in and out.
This method matches addLinks - All the listed blocks are considered to
have interference, so they add a negative bias to their bundles.

This could also be done by addConstraints, but that requires building a
separate BlockConstraint array.

llvm-svn: 135844
2011-07-23 03:10:19 +00:00
Jakob Stoklund Olesen cacefc7dca Allow null interference cursors to be queried.
They always report 'no interference'.

llvm-svn: 135843
2011-07-23 03:10:17 +00:00
NAKAMURA Takumi 287bc6bdf6 ARMMCTargetDesc.h: Fixup to add DataTypes.h, or uint32_t would be unavailable.
llvm-svn: 135837
2011-07-23 01:16:22 +00:00
Evan Cheng f2596bc62a Move TargetAsmParser.h TargetAsmBackend.h and TargetAsmLexer.h to MC where they belong.
llvm-svn: 135833
2011-07-23 00:45:41 +00:00
Andrew Trick 1cabe54fab Move trip count discovery outside of the generic LoopUnroll helper. This
removes its dependence on canonical induction variables.

llvm-svn: 135829
2011-07-23 00:33:05 +00:00
Andrew Trick 279e7a6c83 whitespace
llvm-svn: 135828
2011-07-23 00:29:16 +00:00
Evan Cheng 6376593ed1 createXXXMCCodeGenInfo should be static.
llvm-svn: 135826
2011-07-23 00:01:04 +00:00
Evan Cheng ad5f485957 Sink ARM mc routines into MCTargetDesc.
llvm-svn: 135825
2011-07-23 00:00:19 +00:00
Jim Grosbach 801e0a3fde ARM SSAT instruction 5-bit immediate handling.
The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield.
Update the representation such that we store the operand as 0-31, allowing us
to remove the encoder method and the special case handling in the disassembler.
Update the assembly parser and the instruction printer accordingly.

llvm-svn: 135823
2011-07-22 23:16:18 +00:00
Dan Gohman 6320f52ff4 Move the last uses of RetainFunc etc. over to using getRetainCallee() etc.
so that a declaration for objc_retain is created when needed if it doesn't
already exist. rdar://9825114.

llvm-svn: 135821
2011-07-22 22:29:21 +00:00
Jim Grosbach e7e1e163db ARM assembly parsing and encoding updates.
Tests for SMULBB, SMLALBT, SMLALTB, SMLALTT, and SMULL. Fix parsing of SMULLS.

llvm-svn: 135817
2011-07-22 22:06:05 +00:00
Evan Cheng 8c886a40d2 Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,
InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.

llvm-svn: 135812
2011-07-22 21:58:54 +00:00
Bill Wendling 4d9aa512f8 Emit the __compact_unwind section first. If there are any frames which weren't
emitted, emit them next as CIE/FDEs.

llvm-svn: 135807
2011-07-22 21:18:59 +00:00
Bruno Cardoso Lopes a89039998d Fix PR10422 by adding the necessary AVX UCOMISD memory versions to
load folding logic

llvm-svn: 135801
2011-07-22 20:53:20 +00:00
Jim Grosbach 8dfcc0bb92 ARM assembly parsing and encoding of SMLAL instruction.
Fix parsing of carry-setting variant SMLALS and add tests.

llvm-svn: 135797
2011-07-22 20:18:21 +00:00
Jim Grosbach d7c8c35301 ARM encoding and assembly parsing of SMLAD{X} instructions.
Fix encoding of destination register. Add tests.

llvm-svn: 135796
2011-07-22 20:11:20 +00:00
Bruno Cardoso Lopes d23a324132 Add v8f32->v8i32 bitcast. Fixes PR10440
llvm-svn: 135794
2011-07-22 19:51:02 +00:00
Rafael Espindola 77242dd537 Turn shuffles into unpacks for VT == MVT::v2i64 and MVT::v2f64
too. Patch by Jeff Muizelaar.

llvm-svn: 135789
2011-07-22 18:56:05 +00:00
Dan Gohman c535278cf1 Fix x86's XALUO lowering to return its replacement values instead
of doing the RAUW calls for the overflow value itself. This makes
it more consistent with how the rest of LegalizeDAG works.

llvm-svn: 135788
2011-07-22 18:45:15 +00:00
Owen Anderson 3fa7ca84d9 Fix test failures caused by my so_reg refactoring.
llvm-svn: 135785
2011-07-22 18:30:30 +00:00
Jim Grosbach d1f8bde10f ARM assembly parsing and encoding for SMC instruction.
llvm-svn: 135782
2011-07-22 18:13:31 +00:00
Jim Grosbach bc9d841878 Clean up a few more comments.
These instruction definitions are for the assembler, too, not just the
disassembler.

llvm-svn: 135781
2011-07-22 18:06:01 +00:00
Jim Grosbach 163eb27c1a Tidy up.
llvm-svn: 135779
2011-07-22 18:04:10 +00:00
Jim Grosbach 39f9388a9d Thumb assembly support for SETEND instruction.
llvm-svn: 135778
2011-07-22 17:52:23 +00:00
Jim Grosbach 9afae0d01b Tidy up.
llvm-svn: 135777
2011-07-22 17:46:13 +00:00
Jim Grosbach 0a547701a4 ARM assembly parsing and encoding for SETEND instruction.
Add parsing and diagnostics for malformed inputs. Tests for diagnostics and
for correct encodings.

llvm-svn: 135776
2011-07-22 17:44:50 +00:00
Jim Grosbach 41d084f807 Tidy up.
llvm-svn: 135771
2011-07-22 16:59:04 +00:00
Jay Foad 17bab44308 Fix more MSVC warnings caused by a cases I missed when converting
ConstantExpr::getGetElementPtr to use ArrayRef.

llvm-svn: 135762
2011-07-22 08:52:50 +00:00
Jay Foad 040dd82f44 Convert IRBuilder::CreateGEP and IRBuilder::CreateInBoundsGEP to use
ArrayRef.

llvm-svn: 135761
2011-07-22 08:16:57 +00:00
Chandler Carruth 43025a0869 Move TargetRegistry.cpp from lib/Support to lib/Target where it belongs.
The header file was already properly located. The previous need for it
in Support had to do with the version string printing which was fixed in
r135757.

Also update build dependencies where libraries that needed the
functionality of the Target library (in the form of the TargetRegistry)
were picking it up via Support. This is pretty pervasive, essentially
every TargetInfo library (ARMInfo, etc) uses TargetRegistry, making it
depend on Target. All of these were previously just sneaking by.

llvm-svn: 135760
2011-07-22 08:16:53 +00:00
Jay Foad 71f19ac6af Fix an MSVC warning, caused by a case I missed when converting
ConstantExpr::getGetElementPtr to use ArrayRef.

llvm-svn: 135758
2011-07-22 07:54:01 +00:00
Chandler Carruth 2d71c421f9 Move the registered target printing in version strings completely out of
the Support library. Now its part of the TargetRegistry, and the three
commands that care about this explicitly register this extra bit of
version information.

The set of commands which care was computed by intersecting those which
use the Support library's version string printing and those that
initialize all the registered targets in a way that produces
a meaningful list. The only odd ball out is that 'clang -cc1as -version'
no longer prints the registered targets. I don't think anyone is really
interested in that (especially as the fact that llvm-mc does so is under
a FIXME), but if someone really does want this back I'll happily apply
the same patch there.

llvm-svn: 135757
2011-07-22 07:50:48 +00:00
Chandler Carruth 2baac02c94 Move the logic for printing the registered targets into a static
function on the TargetRegistry. Also clean it up and use the modern LLVM
utility libraries available instead of rolling a few things manually.

llvm-svn: 135756
2011-07-22 07:50:44 +00:00
Chandler Carruth ea7e55272c Add an extension point to the CommandLine library where clients can
register extra version information to be printed. This is designed to
allow those tools which link in various targets to also print those
registered targets under --version.

Currently this printing logic is embedded into the Support library
directly; a huge layering violation. This is the first step to hoisting
it out into the tools without adding lots of duplicated code.

llvm-svn: 135755
2011-07-22 07:50:40 +00:00
NAKAMURA Takumi af8d50ddb3 lib/Support/Triple.cpp: Recognize "-march=ppc32" to llc properly, as quick hack.
FIXME: There is an inconsistency. llvm::Triple does not understand "ppc32" and PowerPC/TargetInfo holds "ppc32".
llvm-svn: 135745
2011-07-22 04:02:22 +00:00
Jakub Staszak b82bbf40bb Allow getBlockFreq to return 0.
llvm-svn: 135742
2011-07-22 02:24:57 +00:00
Benjamin Kramer 959b7e9df7 GCC complains about the angle of this line.
Remove the escaped newline.

llvm-svn: 135739
2011-07-22 01:02:57 +00:00
Jakub Staszak 7987ea7460 Revert patch which broke some IfConversion tests.
llvm-svn: 135738
2011-07-22 00:55:15 +00:00
Jakub Staszak 76d711582c Fix typo in #include which revealed in the case-sensitive filesystem.
llvm-svn: 135734
2011-07-22 00:39:00 +00:00
Bruno Cardoso Lopes 1872173841 Remove the 128-bit special handling from SCALAR_TO_VECTOR. This isn't
the way to go. Doing this here will prevent several node matches later,
and would have to force looking all the way through several
VINSERTF128/VEXTRACTF128 chains to optimize simple things.

llvm-svn: 135730
2011-07-22 00:15:10 +00:00
Bruno Cardoso Lopes 612e56174b -Inspected a AVX code block added by someone in early Feb. This was never used
and was actually very wrong, fix it and make it simpler. Also remove the
ConcatVectors function, which is unused now.

- Fix a introduction of useless nodes in r126664 and r126264. The
VUNPCKL* should never be introduced cause we don't want duplicate
nodes for 128 AVX and non-AVX modes, the actual instruction
difference only exists during isel, but not for target specific DAG
nodes. We only introduce V* target nodes when there is no 128-bit
version already there.

- Fix a fragile test and make it more useful.

llvm-svn: 135729
2011-07-22 00:15:07 +00:00
Bruno Cardoso Lopes 91eff5140f Add a DAGCombine for transforming 128->256 casts into a simple
vxorps + vinsertf128 pair of instructions

llvm-svn: 135727
2011-07-22 00:15:00 +00:00
Bruno Cardoso Lopes dbebd01269 Introduce a new function to lower 256-bit vectors which are not
direclty supported and should be promoted and handled by smaller
shuffles

llvm-svn: 135726
2011-07-22 00:14:56 +00:00
Bruno Cardoso Lopes 95d037721b Rename function to be more specific and be more strict about its usage
llvm-svn: 135725
2011-07-22 00:14:53 +00:00
Jakub Staszak 44860314d2 Use MachineBranchProbabilityInfo instead of MachineLoopInfo in IfConversion.
llvm-svn: 135724
2011-07-21 23:48:55 +00:00
Owen Anderson 0491270f99 Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn necessitates a lot of changes to related bits.
llvm-svn: 135722
2011-07-21 23:38:37 +00:00
Dan Gohman e106aee6f5 Fix MergeInVectorType to check for vector types with the same alloc
size but different element types, so that it filters out the cases
that CreateShuffleVectorCast doesn't handle. This fixes rdar://9786827.

llvm-svn: 135721
2011-07-21 23:30:09 +00:00
Jim Grosbach 72e7c4f9ac ARM Asm parser range checking for [0,31] immediates.
llvm-svn: 135719
2011-07-21 23:26:25 +00:00
Jakub Staszak cb7c0a4927 Add missing getAnalysisUsage in MachineBlockFrequency.
llvm-svn: 135714
2011-07-21 22:59:09 +00:00