llvm-project/llvm/lib/Target/AMDGPU
Jay Foad c08896d292 [AMDGPU] Return better Changed status from SILowerI1Copies
Differential Revision: https://reviews.llvm.org/D119946
2022-02-17 09:38:57 +00:00
..
AsmParser [AMDGPU] Add agpr_count to metadata and AsmParser 2022-02-16 15:17:23 -08:00
Disassembler Cleanup LLVMMC headers 2022-02-09 11:09:17 +01:00
MCA [llvm] Use = default (NFC) 2022-02-06 22:18:35 -08:00
MCTargetDesc [NFC][MC] remove unused argument `MCRegisterInfo` in `MCCodeEmitter` 2022-02-16 13:10:09 +08:00
TargetInfo Fix shlib builds for all lib/Target/*/TargetInfo libs 2021-10-08 15:21:13 -07:00
Utils [AMDGPU] Add agpr_count to metadata and AsmParser 2022-02-16 15:17:23 -08:00
AMDGPU.h Cleanup header dependencies in LLVMCore 2022-02-02 06:54:20 +01:00
AMDGPU.td [AMDGPU] Make enable-flat-scratch a subtarget feature 2022-02-11 18:23:07 +01:00
AMDGPUAliasAnalysis.cpp [NFC][AMDGPU] Reduce includes dependencies, part 2 2021-10-01 17:50:20 +03:00
AMDGPUAliasAnalysis.h [Target] Remove redundant member initialization (NFC) 2022-01-06 22:01:44 -08:00
AMDGPUAlwaysInlinePass.cpp [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols 2021-10-18 16:53:15 -06:00
AMDGPUAnnotateKernelFeatures.cpp [AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor. 2021-09-20 14:48:50 -07:00
AMDGPUAnnotateUniformValues.cpp [AMDGPU] Return better Changed status from AMDGPUAnnotateUniformValues 2022-02-17 09:31:42 +00:00
AMDGPUArgumentUsageInfo.cpp AMDGPU: Remove fixed function ABI option 2021-12-10 19:41:19 -05:00
AMDGPUArgumentUsageInfo.h
AMDGPUAsmPrinter.cpp [AMDGPU] Add agpr_count to metadata and AsmParser 2022-02-16 15:17:23 -08:00
AMDGPUAsmPrinter.h [AMDGPU] Lazily init pal metadata on first function 2022-02-04 18:39:35 +01:00
AMDGPUAtomicOptimizer.cpp [AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor. 2021-09-20 14:48:50 -07:00
AMDGPUAttributes.def [AMDGPU] replace hostcall module flag with function attribute 2022-02-11 22:51:56 +05:30
AMDGPUAttributor.cpp [AMDGPU] replace hostcall module flag with function attribute 2022-02-11 22:51:56 +05:30
AMDGPUCallLowering.cpp AMDGPU/GlobalISel: Fix flat_scratch_init handling for shaders 2022-01-27 10:20:52 -05:00
AMDGPUCallLowering.h AMDGPU/GlobalISel: Redo kernel argument load handling 2021-07-16 08:56:54 -04:00
AMDGPUCallingConv.td Revert "[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range" 2021-12-22 11:39:28 -05:00
AMDGPUCodeGenPrepare.cpp [ValueTracking][SelectionDAG] Rename ComputeMinSignedBits->ComputeMaxSignificantBits. NFC 2022-01-03 11:33:30 -08:00
AMDGPUCombine.td AMDGPU/GlobalISel: Add clamp combine 2021-12-03 12:49:39 +01:00
AMDGPUCombinerHelper.cpp [AMDGPU][GlobalISel] Fix insert point in FoldableFneg combine 2022-02-11 12:09:40 +01:00
AMDGPUCombinerHelper.h [AMDGPU][GlobalISel] Fold G_FNEG above when users cannot fold mods 2021-11-17 14:25:13 +01:00
AMDGPUCtorDtorLowering.cpp [amdgpu] Don't crash on empty global ctor/dtor 2021-11-16 14:36:08 +00:00
AMDGPUExportClustering.cpp [llvm] Use = default (NFC) 2022-02-06 22:18:35 -08:00
AMDGPUExportClustering.h
AMDGPUFeatures.td AMDGPU: Remove FeatureLocalMemorySize0 2021-09-02 22:43:01 -04:00
AMDGPUFixFunctionBitcasts.cpp Revert "AMDGPU: Remove AMDGPUFixFunctionBitcasts pass" 2021-12-16 21:21:32 +00:00
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUGISel.td [AMDGPU] Add a new intrinsic to control fp_trunc rounding mode 2022-02-11 12:08:23 -05:00
AMDGPUGenRegisterBankInfo.def
AMDGPUGlobalISelUtils.cpp
AMDGPUGlobalISelUtils.h [ADT] Move DenseMapInfo for ArrayRef/StringRef into respective headers (NFC) 2021-06-03 18:34:36 +02:00
AMDGPUHSAMetadataStreamer.cpp [AMDGPU] Add agpr_count to metadata and AsmParser 2022-02-16 15:17:23 -08:00
AMDGPUHSAMetadataStreamer.h [llvm] Use = default (NFC) 2022-02-06 22:18:35 -08:00
AMDGPUISelDAGToDAG.cpp [AMDGPU] Implement widening multiplies with v_mad_i64_i32/v_mad_u64_u32 2021-11-24 11:25:02 +00:00
AMDGPUISelDAGToDAG.h [AMDGPU] Implement widening multiplies with v_mad_i64_i32/v_mad_u64_u32 2021-11-24 11:25:02 +00:00
AMDGPUISelLowering.cpp [AMDGPU] Add a new intrinsic to control fp_trunc rounding mode 2022-02-11 12:08:23 -05:00
AMDGPUISelLowering.h [AMDGPU] Add a new intrinsic to control fp_trunc rounding mode 2022-02-11 12:08:23 -05:00
AMDGPUInstCombineIntrinsic.cpp [AMDGPU] Only match correct type for a16 2022-01-25 14:59:16 +01:00
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h [AMDGPU] Fix LOD bias in A16 combine 2022-01-21 12:09:06 +01:00
AMDGPUInstrInfo.td Revert "[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range" 2021-12-22 11:39:28 -05:00
AMDGPUInstructionSelector.cpp AMDGPU/GlobalISel: Fix assert on invalid cond code for llvm.amdgcn.icmp 2022-01-27 10:34:06 -05:00
AMDGPUInstructionSelector.h AMDGPU/GlobalISel: Introduce pseudo to copy sp in call sequences 2022-01-19 10:13:31 -05:00
AMDGPUInstructions.td [AMDGPU] Select no-return ds_* atomic ops in tblgen. 2022-02-10 09:26:37 +05:30
AMDGPULateCodeGenPrepare.cpp [AArch64, AMDGPU] Use make_early_inc_range (NFC) 2021-11-03 09:22:51 -07:00
AMDGPULegalizerInfo.cpp [AMDGPU] Add a new intrinsic to control fp_trunc rounding mode 2022-02-11 12:08:23 -05:00
AMDGPULegalizerInfo.h [AMDGPU] Add a new intrinsic to control fp_trunc rounding mode 2022-02-11 12:08:23 -05:00
AMDGPULibCalls.cpp [AMDGPU] Pull out repeated getVecSize() calls. NFC. 2022-02-10 16:31:36 +00:00
AMDGPULibFunc.cpp Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17" 2022-01-26 16:55:53 +01:00
AMDGPULibFunc.h [llvm] Use = default (NFC) 2022-02-06 22:18:35 -08:00
AMDGPULowerIntrinsics.cpp [AArch64, AMDGPU] Use make_early_inc_range (NFC) 2021-11-03 09:22:51 -07:00
AMDGPULowerKernelArguments.cpp [NFC] More get/removeAttribute() cleanup 2021-08-17 21:05:41 -07:00
AMDGPULowerKernelAttributes.cpp [AMDGPU] Fix pass name of AMDGPULowerKernelAttributes. NFC. 2021-07-06 15:03:31 -07:00
AMDGPULowerModuleLDSPass.cpp [AMDGPU] Merge AMDGPULDSUtils into AMDGPUMemoryUtils 2022-02-11 10:32:24 -08:00
AMDGPUMCInstLower.cpp [NFC][MC] remove unused argument `MCRegisterInfo` in `MCCodeEmitter` 2022-02-16 13:10:09 +08:00
AMDGPUMCInstLower.h [NFC][AMDGPU] Reduce includes dependencies, part 2 2021-10-01 17:50:20 +03:00
AMDGPUMIRFormatter.cpp
AMDGPUMIRFormatter.h [llvm] Use = default (NFC) 2022-02-06 22:18:35 -08:00
AMDGPUMachineCFGStructurizer.cpp [llvm] Use range-based for loops (NFC) 2021-12-11 11:29:12 -08:00
AMDGPUMachineFunction.cpp [Target] Remove redundant member initialization (NFC) 2022-01-06 22:01:44 -08:00
AMDGPUMachineFunction.h [Target] Remove unused forward declarations (NFC) 2022-01-02 10:20:15 -08:00
AMDGPUMachineModuleInfo.cpp
AMDGPUMachineModuleInfo.h
AMDGPUMacroFusion.cpp
AMDGPUMacroFusion.h
AMDGPUOpenCLEnqueuedBlockLowering.cpp [AMDGPU][NFC] Fix typos 2021-11-12 11:37:21 +01:00
AMDGPUPTNote.h [NFC] Fix endif comments to match with include guard 2022-01-07 15:52:59 +08:00
AMDGPUPerfHintAnalysis.cpp [AMDGPU] Return better Changed status from AMDGPUPerfHintAnalysis 2022-02-17 09:31:42 +00:00
AMDGPUPerfHintAnalysis.h [AMDGPU] Tune perfhint analysis to account access width 2021-07-21 12:46:10 -07:00
AMDGPUPostLegalizerCombiner.cpp Code quality: Combine V_RSQ 2021-11-30 17:17:15 +01:00
AMDGPUPreLegalizerCombiner.cpp [AMDGPU][GlobalISel] Fold G_FNEG above when users cannot fold mods 2021-11-17 14:25:13 +01:00
AMDGPUPrintfRuntimeBinding.cpp Reduce dependencies on llvm/BinaryFormat/Dwarf.h 2022-02-04 11:44:03 +01:00
AMDGPUPromoteAlloca.cpp Cleanup header dependencies in LLVMCore 2022-02-02 06:54:20 +01:00
AMDGPUPromoteKernelArguments.cpp [AMDGPU] Improve clobbering checks in the kernel argument promotion 2022-02-10 14:51:47 -08:00
AMDGPUPropagateAttributes.cpp AMDGPU: Use attributor to propagate amdgpu-flat-work-group-size 2021-10-22 16:23:50 -04:00
AMDGPURegBankCombiner.cpp AMDGPU/GlobalISel: Fix introducing f16 fmed3 for gfx8 2022-01-19 10:43:21 -05:00
AMDGPURegisterBankInfo.cpp [AMDGPU] Add a new intrinsic to control fp_trunc rounding mode 2022-02-11 12:08:23 -05:00
AMDGPURegisterBankInfo.h [AMDGPU] Remove selectStoreIntrinsic (NFC) 2021-11-14 19:40:44 -08:00
AMDGPURegisterBanks.td [AMDGPU] Add 224-bit vector types and link 192-bit types to MVTs 2021-06-24 12:41:22 +09:00
AMDGPUReplaceLDSUseWithPointer.cpp [AMDGPU] Merge AMDGPULDSUtils into AMDGPUMemoryUtils 2022-02-11 10:32:24 -08:00
AMDGPUResourceUsageAnalysis.cpp Hoist getTotalNumVGPRs into AMDGPUBaseInfo for use in both codegen and MC 2022-02-16 11:04:08 -08:00
AMDGPUResourceUsageAnalysis.h AMDGPU: Convert AMDGPUResourceUsageAnalysis to a Module pass 2022-02-04 15:56:04 -05:00
AMDGPURewriteOutArguments.cpp [AMDGPURewriteOutArguments] Don't use pointer element type 2022-02-08 16:10:41 +01:00
AMDGPUSearchableTables.td
AMDGPUSubtarget.cpp [AMDGPU] Make enable-flat-scratch a subtarget feature 2022-02-11 18:23:07 +01:00
AMDGPUSubtarget.h [llvm] Use = default (NFC) 2022-02-06 22:18:35 -08:00
AMDGPUTargetMachine.cpp Revert "AMDGPU: Remove AMDGPUFixFunctionBitcasts pass" 2021-12-16 21:21:32 +00:00
AMDGPUTargetMachine.h [Target] Remove unused forward declarations (NFC) 2022-01-02 10:20:15 -08:00
AMDGPUTargetObjectFile.cpp
AMDGPUTargetObjectFile.h
AMDGPUTargetTransformInfo.cpp [AMDGPU] Fixed physreg asm constraint parsing 2022-01-12 16:37:08 -08:00
AMDGPUTargetTransformInfo.h [Target][CodeGen] Remove default CostKind arguments on inner/impl TTI overrides 2021-09-22 15:28:08 +01:00
AMDGPUUnifyDivergentExitNodes.cpp [Analysis, Target, Transforms] Construct SmallVector with iterator ranges (NFC) 2021-09-07 09:19:33 -07:00
AMDGPUUnifyMetadata.cpp
AMDILCFGStructurizer.cpp [llvm] Use range-based for loops (NFC) 2021-12-11 22:34:07 -08:00
AMDKernelCodeT.h
BUFInstructions.td [AMDGPU][NFC] Alter ComplexPattern types to be consistent with their uses 2021-12-03 07:04:59 +00:00
CMakeLists.txt Revert "AMDGPU: Remove AMDGPUFixFunctionBitcasts pass" 2021-12-16 21:21:32 +00:00
CaymanInstructions.td Code quality: Combine V_RSQ 2021-11-30 17:17:15 +01:00
DSInstructions.td [AMDGPU] Rename DSAtomicCmpXChg to DSAtomicCmpXChgSwapped. NFC. 2022-02-10 14:54:44 +00:00
EXPInstructions.td
EvergreenInstructions.td Code quality: Combine V_RSQ 2021-11-30 17:17:15 +01:00
FLATInstructions.td [AMDGPU] Select no-return atomic ops in FLATInstructions.td. 2022-02-10 09:26:37 +05:30
GCNDPPCombine.cpp [AArch64, AMDGPU] Use make_early_inc_range (NFC) 2021-11-03 09:22:51 -07:00
GCNHazardRecognizer.cpp [AMDGPU] Prevent aliasing of SrcC and Dst in MAI 2022-01-26 14:48:20 -08:00
GCNHazardRecognizer.h [Target] Remove unused forward declarations (NFC) 2022-01-02 10:20:15 -08:00
GCNILPSched.cpp
GCNIterativeScheduler.cpp [AMDGPU][NFC] Fix typos 2021-11-12 11:37:21 +01:00
GCNIterativeScheduler.h
GCNMinRegStrategy.cpp [AMDGPU][NFC] Fix typos 2021-11-12 11:37:21 +01:00
GCNNSAReassign.cpp
GCNPreRAOptimizations.cpp [AMDGPU][NFC] Fix typos 2021-11-12 11:37:21 +01:00
GCNProcessors.td [AMDGPU] Add gfx1035 target 2021-06-24 14:32:41 -04:00
GCNRegPressure.cpp [NFC] Use Register instead of unsigned 2022-01-19 20:17:04 +08:00
GCNRegPressure.h
GCNSchedStrategy.cpp [AMDGPU] Fix debug values in scheduler not placed correctly when reverting 2022-02-07 11:01:13 -08:00
GCNSchedStrategy.h [NFC] Fix endif comments to match with include guard 2022-01-07 15:52:59 +08:00
GCNSubtarget.h [AMDGPU] Make enable-flat-scratch a subtarget feature 2022-02-11 18:23:07 +01:00
InstCombineTables.td
MIMGInstructions.td [AMDGPU][InstCombine] Remove zero image offset 2022-01-24 18:06:33 +01:00
R600.h [NFC][AMDGPU] Reduce includes dependencies. 2021-08-25 12:01:55 +03:00
R600.td [NFC][AMDGPU] Reduce includes dependencies. 2021-08-25 12:01:55 +03:00
R600AsmPrinter.cpp [NFC][AMDGPU] Reduce includes dependencies. 2021-08-25 12:01:55 +03:00
R600AsmPrinter.h
R600ClauseMergePass.cpp [Target] Use range-based for loops (NFC) 2021-11-22 08:21:07 -08:00
R600ControlFlowFinalizer.cpp [llvm] Use range-based for loops (NFC) 2021-12-11 22:34:07 -08:00
R600Defines.h
R600EmitClauseMarkers.cpp [Target] Use range-based for loops (NFC) 2021-11-22 08:21:07 -08:00
R600ExpandSpecialInstrs.cpp [Target] Use range-based for loops (NFC) 2021-11-22 08:21:07 -08:00
R600FrameLowering.cpp
R600FrameLowering.h
R600ISelDAGToDAG.cpp [NFC][AMDGPU] Reduce includes dependencies, part 2 2021-10-01 17:50:20 +03:00
R600ISelLowering.cpp [Target] Use range-based for loops (NFC) 2021-11-26 21:21:17 -08:00
R600ISelLowering.h [Target] Remove unused forward declarations (NFC) 2022-01-02 10:20:15 -08:00
R600InstrFormats.td
R600InstrInfo.cpp [llvm] Use range-based for loops (NFC) 2021-12-11 22:34:07 -08:00
R600InstrInfo.h [Target] Remove unused forward declarations (NFC) 2022-01-02 10:20:15 -08:00
R600InstrInfo.td [NFC][AMDGPU] Reduce includes dependencies. 2021-08-25 12:01:55 +03:00
R600Instructions.td Code quality: Combine V_RSQ 2021-11-30 17:17:15 +01:00
R600MCInstLower.cpp [NFC][AMDGPU] Reduce includes dependencies, part 2 2021-10-01 17:50:20 +03:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp [llvm] Use range-based for loops (NFC) 2021-12-11 11:29:12 -08:00
R600MachineScheduler.h [AMDGPU][NFC] Fix typos 2021-11-12 11:37:21 +01:00
R600OpenCLImageTypeLoweringPass.cpp [llvm] Use range-based for loops (NFC) 2021-12-11 11:29:12 -08:00
R600OptimizeVectorRegisters.cpp [Target] Use range-based for loops (NFC) 2021-12-17 10:11:08 -08:00
R600Packetizer.cpp [llvm] Use range-based for loops (NFC) 2021-12-11 22:34:07 -08:00
R600Processors.td AMDGPU: Remove FeatureLocalMemorySize0 2021-09-02 22:43:01 -04:00
R600RegisterInfo.cpp Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17" 2022-01-26 16:55:53 +01:00
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600Subtarget.cpp [NFC][AMDGPU] Reduce includes dependencies. 2021-08-25 12:01:55 +03:00
R600Subtarget.h [Target] Remove unused forward declarations (NFC) 2022-01-02 10:20:15 -08:00
R600TargetMachine.cpp Remove the verifyAfter mechanism that was replaced by D111397 2021-10-18 10:26:46 +01:00
R600TargetMachine.h [NFC][AMDGPU] Reduce includes dependencies. 2021-08-25 12:01:55 +03:00
R600TargetTransformInfo.cpp [NFC][AMDGPU] Reduce includes dependencies, part 2 2021-10-01 17:50:20 +03:00
R600TargetTransformInfo.h [NFC][AMDGPU] Reduce includes dependencies. 2021-08-25 12:01:55 +03:00
R700Instructions.td
SIAnnotateControlFlow.cpp [AMDGPU] Return better Changed status from SIAnnotateControlFlow 2022-02-17 09:38:57 +00:00
SIDefines.h [AMDGPU] HWRegs TMA and TBA also supported on gfx9 2022-02-03 09:36:10 -08:00
SIFixSGPRCopies.cpp [Target] Use range-based for loops (NFC) 2021-11-26 21:21:17 -08:00
SIFixVGPRCopies.cpp
SIFoldOperands.cpp [AMDGPU] Prevent aliasing of SrcC and Dst in MAI 2022-01-26 14:48:20 -08:00
SIFormMemoryClauses.cpp [AMDGPU][NFC] Fix typos in SIFormMemoryClauses description 2021-05-06 07:47:39 -07:00
SIFrameLowering.cpp AMDGPU: Add second emergency slot for SGPR to vmem for large frames 2022-02-02 19:05:05 -05:00
SIFrameLowering.h [Target] Remove unused forward declarations (NFC) 2022-01-02 10:20:15 -08:00
SIISelLowering.cpp [AMDGPU] Honor !invariant.load metadata on load-like intrinsics 2022-02-15 09:16:57 +00:00
SIISelLowering.h [AMDGPU] Use new target MMO flag MONoClobber 2022-02-02 17:12:36 +00:00
SIInsertHardClauses.cpp [AMDGPU] Ignore KILLs when forming clauses 2021-09-27 16:33:52 +02:00
SIInsertWaitcnts.cpp [AMDGPU] Fix AGPR offset for waitcnt 2022-02-14 15:16:21 -05:00
SIInstrFormats.td
SIInstrInfo.cpp AMDGPU: Reserve v32 if we may need to copy between AGPRs on gfx908 2022-02-08 11:14:52 -05:00
SIInstrInfo.h [AMDGPU] Use new target MMO flag MONoClobber 2022-02-02 17:12:36 +00:00
SIInstrInfo.td [AMDGPU] Add a new intrinsic to control fp_trunc rounding mode 2022-02-11 12:08:23 -05:00
SIInstructions.td [AMDGPU] Divergence-driven instruction selection for bfm patterns 2022-02-15 10:49:18 +00:00
SILateBranchLowering.cpp [AArch64, AMDGPU] Use make_early_inc_range (NFC) 2021-11-03 09:22:51 -07:00
SILoadStoreOptimizer.cpp [AMDGPU] SILoadStoreOptimizer: rewrite checkAndPrepareMerge. NFCI. 2022-02-04 17:17:29 +00:00
SILowerControlFlow.cpp [AMDGPU] Disable optimizeEndCf at -O0 2022-01-18 02:48:52 -05:00
SILowerI1Copies.cpp [AMDGPU] Return better Changed status from SILowerI1Copies 2022-02-17 09:38:57 +00:00
SILowerSGPRSpills.cpp AMDGPU: Add second emergency slot for SGPR to vmem for large frames 2022-02-02 19:05:05 -05:00
SIMachineFunctionInfo.cpp [AMDGPU] replace hostcall module flag with function attribute 2022-02-11 22:51:56 +05:30
SIMachineFunctionInfo.h [AMDGPU] replace hostcall module flag with function attribute 2022-02-11 22:51:56 +05:30
SIMachineScheduler.cpp [Target] Use range-based for loops (NFC) 2021-12-17 10:11:08 -08:00
SIMachineScheduler.h [AMDGPU][NFC] Fix typos 2021-11-12 11:37:21 +01:00
SIMemoryLegalizer.cpp [AMDGPU] Add SIMemoryLegalizer comments to clarify bit usage 2021-11-26 21:05:58 +09:00
SIModeRegister.cpp [AMDGPU] Add a new intrinsic to control fp_trunc rounding mode 2022-02-11 12:08:23 -05:00
SIOptimizeExecMasking.cpp
SIOptimizeExecMaskingPreRA.cpp
SIOptimizeVGPRLiveRange.cpp AMDGPU: Fix LiveVariables error after optimizing VGPR ranges 2022-01-17 09:38:35 -05:00
SIPeepholeSDWA.cpp [AMDGPU] Add a regclass flag for scalar registers 2021-12-01 23:31:07 -05:00
SIPostRABundler.cpp [AMDGPU] Fix SIPostRABundler crash on null register used by dbg value 2021-11-18 17:01:19 -08:00
SIPreAllocateWWMRegs.cpp
SIPreEmitPeephole.cpp [Target] Use range-based for loops (NFC) 2021-11-22 08:21:07 -08:00
SIProgramInfo.cpp
SIProgramInfo.h
SIRegisterInfo.cpp AMDGPU: Always reserve VGPR for AGPR copies on gfx908 2022-02-16 18:48:18 -05:00
SIRegisterInfo.h AMDGPU: Implement isAsmClobberable 2022-02-02 14:20:12 -05:00
SIRegisterInfo.td [TableGen][AMDGPU] Allow empty register classes 2022-02-11 17:30:04 +00:00
SISchedule.td [AMDGPU] Set most sched model resource's BufferSize to one 2021-12-01 22:31:28 -08:00
SIShrinkInstructions.cpp [AMDGPU] Remove dead code from shrinkScalarLogicOp 2022-02-09 17:07:12 +00:00
SIWholeQuadMode.cpp [AMDGPU][SIWholeQuadMode] Use the right VCC register to activate the correct lanes. 2022-01-26 08:54:39 -08:00
SMInstructions.td [AMDGPU] Mark time intrinsics as nomem, hassideeffects 2021-12-07 16:24:06 +00:00
SOPInstructions.td [AMDGPU] Divergence-driven abs instruction selection 2022-02-14 21:36:32 +03:00
VIInstrFormats.td
VOP1Instructions.td [AMDGPU] Add an implicit use of M0 to all V_MOV_B32_indirect_read/write 2021-11-19 19:00:17 +00:00
VOP2Instructions.td [AMDGPU] Enable divergence-driven XNOR selection 2022-01-26 15:33:10 +03:00
VOP3Instructions.td [AMDGPU] Add constrained shift pattern matches. 2021-10-26 19:07:19 +05:30
VOP3PInstructions.td [AMDGPU] Select VGPR versions of MFMA if possible 2022-02-08 10:19:41 -08:00
VOPCInstructions.td [AMDGPU] Set SALU, VALU and other instruction type flags on Real instructions 2021-06-16 13:36:02 +01:00
VOPInstructions.td [AMDGPU] Changing S_AND_B32 to V_AND_B32_e64 in the divergent 'trunc' to i1 pattern 2021-12-24 18:24:49 +03:00