mirror of https://github.com/RT-Thread/rt-thread
bsp: k230: add hwtimer support
K230 support 6 general hardware timers and 3 stc timers. This patch only implement drivers for general hw timers. Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
This commit is contained in:
parent
fe1308976e
commit
8525e08709
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@ -1497,6 +1497,7 @@ CONFIG_BSP_USING_SDIO0=y
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# CONFIG_BSP_SDIO0_1V8 is not set
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# CONFIG_BSP_SDIO0_1V8 is not set
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# CONFIG_BSP_USING_SDIO1 is not set
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# CONFIG_BSP_USING_SDIO1 is not set
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CONFIG_BSP_SD_MNT_DEVNAME="sd0p1"
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CONFIG_BSP_SD_MNT_DEVNAME="sd0p1"
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# CONFIG_BSP_USING_TIMERS is not set
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# CONFIG_BSP_USING_WDT is not set
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# CONFIG_BSP_USING_WDT is not set
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# CONFIG_BSP_UTEST_DRIVERS is not set
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# CONFIG_BSP_UTEST_DRIVERS is not set
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# end of Drivers Configuration
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# end of Drivers Configuration
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@ -39,6 +39,37 @@ menu "Drivers Configuration"
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default "sd0p1"
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default "sd0p1"
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endif
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endif
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menuconfig BSP_USING_TIMERS
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bool "Enable Hardware Timers"
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select RT_USING_HWTIMER
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default n
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if BSP_USING_TIMERS
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config BSP_USING_TIMER0
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bool "Enable Timer0"
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default n
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config BSP_USING_TIMER1
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bool "Enable Timer1"
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default n
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config BSP_USING_TIMER2
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bool "Enable Timer2"
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default n
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config BSP_USING_TIMER3
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bool "Enable Timer3"
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default n
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config BSP_USING_TIMER4
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bool "Enable Timer4"
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default n
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config BSP_USING_TIMER5
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bool "Enable Timer5"
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default n
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endif
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menuconfig BSP_USING_WDT
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menuconfig BSP_USING_WDT
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bool "Enable Watchdog Timer"
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bool "Enable Watchdog Timer"
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select RT_USING_WDT
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select RT_USING_WDT
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@ -0,0 +1,19 @@
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# RT-Thread building script for component
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from building import *
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cwd = GetCurrentDir()
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src = Glob('*.c')
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CPPPATH = [cwd]
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group = DefineGroup('TIMER', src, depend = ['BSP_USING_TIMERS'], CPPPATH = CPPPATH)
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objs = [group]
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list = os.listdir(cwd)
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for item in list:
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if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
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objs = objs + SConscript(os.path.join(item, 'SConscript'))
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Return('objs')
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@ -0,0 +1,333 @@
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/* Copyright (c) 2023, Canaan Bright Sight Co., Ltd
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* K230 Hardware Timer Driver
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*
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* K230 provides 9 timers, 6 general-purpose timers (TIMER0-TIMER5) and
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* 3 STC timers.
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* This driver only implements the general-purpose timers (TIMER0-TIMER5).
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* This driver only supports the ONESHOT mode.
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* Support frequency options: 12.5M(min), 25M, 50M, 100M(max)
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "riscv_io.h"
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#include "board.h"
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#include "ioremap.h"
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#include <rtdbg.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <rthw.h>
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#include "sysctl_rst.h"
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#include "drv_timer.h"
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#include <dfs_posix.h>
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static void k230_timer_stop(rt_hwtimer_t *timer);
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static void k230_timer_init(rt_hwtimer_t *timer, rt_uint32_t state)
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{
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struct k230_timer *kd_timer = rt_container_of(timer, struct k230_timer, device);
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uint8_t id = kd_timer->id;
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if (state == 0)
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{
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k230_timer_stop(timer);
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}
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else
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{
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sysctl_clk_set_leaf_parent(kd_timer->clk, kd_timer->clk_src);
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if (timer->freq == timer->info->minfreq)
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sysctl_clk_set_leaf_div(kd_timer->clk_src, 1, 8);
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if (timer->freq == timer->info->maxfreq)
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sysctl_clk_set_leaf_div(kd_timer->clk_src, 1, 1);
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if (timer->freq == 50*MHz)
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sysctl_clk_set_leaf_div(kd_timer->clk_src, 1, 2);
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if (timer->freq == 25*MHz)
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sysctl_clk_set_leaf_div(kd_timer->clk_src, 1, 4);
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}
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}
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static rt_err_t k230_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode)
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{
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struct k230_timer *kd_timer = rt_container_of(timer, struct k230_timer, device);
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uint8_t id = kd_timer->id;
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k230_timer_regs_t* reg = (k230_timer_regs_t *)kd_timer->base;
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reg->channel[id].load_count = cnt;
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reg->channel[id].control &= ~(TIMER_CR_INTERRUPT_MASK);
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reg->channel[id].control |= (TIMER_CR_USER_MODE | TIMER_CR_ENABLE);
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return RT_EOK;
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}
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static void k230_timer_stop(rt_hwtimer_t *timer)
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{
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struct k230_timer *kd_timer = rt_container_of(timer, struct k230_timer, device);
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uint8_t id = kd_timer->id;
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k230_timer_regs_t* reg = (k230_timer_regs_t *)kd_timer->base;
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reg->channel[id].control &= ~TIMER_CR_ENABLE;
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reg->channel[id].control |= TIMER_CR_INTERRUPT_MASK;
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}
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static rt_uint32_t k230_timer_get(rt_hwtimer_t *timer)
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{
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struct k230_timer *kd_timer = rt_container_of(timer, struct k230_timer, device);
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uint8_t id = kd_timer->id;
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k230_timer_regs_t* reg = (k230_timer_regs_t *)kd_timer->base;
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return reg->channel[id].current_value;
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}
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static rt_err_t k230_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
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{
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struct k230_timer *kd_timer = rt_container_of(timer, struct k230_timer, device);
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switch (cmd)
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{
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case HWTIMER_CTRL_FREQ_SET:
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timer->freq = *((rt_uint32_t*)arg);
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sysctl_clk_set_leaf_parent(kd_timer->clk, kd_timer->clk_src);
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if (timer->freq == timer->info->minfreq)
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sysctl_clk_set_leaf_div(kd_timer->clk_src, 1, 8);
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if (timer->freq == timer->info->maxfreq)
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sysctl_clk_set_leaf_div(kd_timer->clk_src, 1, 1);
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if (timer->freq == 50*MHz)
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sysctl_clk_set_leaf_div(kd_timer->clk_src, 1, 2);
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if (timer->freq == 25*MHz)
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sysctl_clk_set_leaf_div(kd_timer->clk_src, 1, 4);
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break;
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case HWTIMER_CTRL_STOP:
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k230_timer_stop(timer);
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break;
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case HWTIMER_CTRL_INFO_GET:
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if (arg == RT_NULL)
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{
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LOG_E("HWTIMER_CTRL_INFO_GET arg is NULL");
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return -RT_ERROR;
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}
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*(struct rt_hwtimer_info *)arg = *(kd_timer->device.info);
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break;
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case HWTIMER_CTRL_MODE_SET:
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if (arg == RT_NULL)
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{
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LOG_E("HWTIMER_CTRL_MODE_SET arg is NULL");
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return -RT_ERROR;
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}
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timer->mode = *(rt_hwtimer_mode_t *)arg;
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if (timer->mode != HWTIMER_MODE_ONESHOT)
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{
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LOG_E("mode is invalid/unsupported, only ONESHOT is supported");
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return -RT_ERROR;
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}
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break;
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default:
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LOG_E("HWTIMER_CTRL cmd is invalid");
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return -RT_ERROR;
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}
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return RT_EOK;
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}
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static int k230_timer_fops_open(struct dfs_file* fd)
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{
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rt_device_t device = (rt_device_t)fd->vnode->data;
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return rt_device_open(device, RT_DEVICE_OFLAG_RDWR);
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}
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static int k230_timer_fops_close(struct dfs_file* fd)
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{
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rt_device_t device = (rt_device_t)fd->vnode->data;
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return rt_device_close(device);
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}
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static const struct rt_hwtimer_info k230_timer_info =
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{
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100000000, /* the maximum count frequency can be set */
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12500000, /* the minimum count frequency can be set */
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0xFFFFFFFF, /* the maximum counter value */
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HWTIMER_CNTMODE_DW, /* Increment or Decreasing count mode */
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};
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static const struct rt_hwtimer_ops k230_timer_ops =
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{
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.init = k230_timer_init,
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.start = k230_timer_start,
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.stop = k230_timer_stop,
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.count_get = k230_timer_get,
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.control = k230_timer_ctrl,
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};
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static const struct dfs_file_ops k230_timer_fops = {
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k230_timer_fops_open,
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k230_timer_fops_close,
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};
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void k230_hwtimer_isr(int vector, void *param)
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{
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uint32_t ret;
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struct k230_timer *kd_timer = (struct k230_timer *)param;
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rt_hwtimer_t *hwtimer = (rt_hwtimer_t *)&(kd_timer->device);
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RT_ASSERT(kd_timer != RT_NULL && hwtimer != RT_NULL);
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int id = kd_timer->id;
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k230_timer_regs_t* reg = (k230_timer_regs_t *)kd_timer->base;
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ret = (reg->channel[id].eoi);
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rt_device_hwtimer_isr(hwtimer);
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}
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static struct k230_timer timer_devices[] =
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{
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#ifdef BSP_USING_TIMER0
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{
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.device.info = &k230_timer_info,
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.device.ops = &k230_timer_ops,
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.device.parent.fops = &k230_timer_fops,
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.name = "hwtimer0",
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.id = 0,
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.clk = SYSCTL_CLK_TIMER0,
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.clk_src = SYSCTL_CLK_TIMER0_SRC,
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.irq_num = IRQN_TIMER_0_INTERRUPT
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},
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#endif /* BSP_USING_TIMER0 */
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#ifdef BSP_USING_TIMER1
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{
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.device.info = &k230_timer_info,
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.device.ops = &k230_timer_ops,
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.device.parent.fops = &k230_timer_fops,
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.name = "hwtimer1",
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.id = 1,
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.clk = SYSCTL_CLK_TIMER1,
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.clk_src = SYSCTL_CLK_TIMER1_SRC,
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.irq_num = IRQN_TIMER_1_INTERRUPT
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},
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#endif /* BSP_USING_TIMER1 */
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#ifdef BSP_USING_TIMER2
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{
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.device.info = &k230_timer_info,
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.device.ops = &k230_timer_ops,
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.device.parent.fops = &k230_timer_fops,
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.name = "hwtimer2",
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.id = 2,
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.clk = SYSCTL_CLK_TIMER2,
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.clk_src = SYSCTL_CLK_TIMER2_SRC,
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.irq_num = IRQN_TIMER_2_INTERRUPT
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},
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#endif /* BSP_USING_TIMER0 */
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#ifdef BSP_USING_TIMER3
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{
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.device.info = &k230_timer_info,
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.device.ops = &k230_timer_ops,
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.device.parent.fops = &k230_timer_fops,
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.name = "hwtimer3",
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.id = 3,
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.clk = SYSCTL_CLK_TIMER3,
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.clk_src = SYSCTL_CLK_TIMER3_SRC,
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.irq_num = IRQN_TIMER_3_INTERRUPT
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},
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#endif /* BSP_USING_TIMER3 */
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#ifdef BSP_USING_TIMER4
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{
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.device.info = &k230_timer_info,
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.device.ops = &k230_timer_ops,
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.device.parent.fops = &k230_timer_fops,
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.name = "hwtimer4",
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.id = 4,
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.clk = SYSCTL_CLK_TIMER4,
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.clk_src = SYSCTL_CLK_TIMER4_SRC,
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.irq_num = IRQN_TIMER_4_INTERRUPT
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},
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#endif /* BSP_USING_TIMER4 */
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#ifdef BSP_USING_TIMER5
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{
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.device.info = &k230_timer_info,
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.device.ops = &k230_timer_ops,
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.device.parent.fops = &k230_timer_fops,
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.name = "hwtimer5",
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.id = 5,
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.clk = SYSCTL_CLK_TIMER5,
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.clk_src = SYSCTL_CLK_TIMER5_SRC,
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.irq_num = IRQN_TIMER_5_INTERRUPT
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},
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#endif /* BSP_USING_TIMER5 */
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||||||
|
|
||||||
|
#if !defined(BSP_USING_TIMER0) && \
|
||||||
|
!defined(BSP_USING_TIMER1) && \
|
||||||
|
!defined(BSP_USING_TIMER2) && \
|
||||||
|
!defined(BSP_USING_TIMER3) && \
|
||||||
|
!defined(BSP_USING_TIMER4) && \
|
||||||
|
!defined(BSP_USING_TIMER5)
|
||||||
|
#error "No hardware timer device enabled!"
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
int rt_hw_timer_init(void)
|
||||||
|
{
|
||||||
|
rt_uint8_t i, array_size;
|
||||||
|
|
||||||
|
array_size = sizeof(timer_devices) / sizeof(struct k230_timer);
|
||||||
|
if (array_size == 0)
|
||||||
|
{
|
||||||
|
LOG_E("No timer device defined!");
|
||||||
|
return -RT_ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
volatile void* base = (void *)rt_ioremap((void *)HW_TIMER_BASE_ADDR, HW_TIMER_IO_SIZE);
|
||||||
|
for (i = 0; i < array_size; i++)
|
||||||
|
{
|
||||||
|
timer_devices[i].base = (rt_ubase_t)base;
|
||||||
|
|
||||||
|
if (rt_device_hwtimer_register(&timer_devices[i].device, timer_devices[i].name, RT_NULL) != RT_EOK)
|
||||||
|
{
|
||||||
|
LOG_E("%s register failed!", timer_devices[i].name);
|
||||||
|
return -RT_ERROR;
|
||||||
|
}
|
||||||
|
LOG_D("%s register OK!", timer_devices[i].name);
|
||||||
|
|
||||||
|
rt_hw_interrupt_install(timer_devices[i].irq_num,
|
||||||
|
k230_hwtimer_isr,
|
||||||
|
&timer_devices[i],
|
||||||
|
timer_devices[i].name);
|
||||||
|
rt_hw_interrupt_umask(timer_devices[i].irq_num);
|
||||||
|
}
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
INIT_BOARD_EXPORT(rt_hw_timer_init);
|
|
@ -0,0 +1,96 @@
|
||||||
|
/* Copyright (c) 2023, Canaan Bright Sight Co., Ltd
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
|
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
|
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||||
|
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||||
|
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||||
|
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef DRV_TIMER_H__
|
||||||
|
#define DRV_TIMER_H__
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <drivers/hwtimer.h>
|
||||||
|
#include "sysctl_clk.h"
|
||||||
|
|
||||||
|
#define MHz 1000000
|
||||||
|
/* TIMER Control Register */
|
||||||
|
#define TIMER_CR_ENABLE 0x00000001
|
||||||
|
#define TIMER_CR_MODE_MASK 0x00000002
|
||||||
|
#define TIMER_CR_FREE_MODE 0x00000000
|
||||||
|
#define TIMER_CR_USER_MODE 0x00000002
|
||||||
|
#define TIMER_CR_INTERRUPT_MASK 0x00000004
|
||||||
|
#define TIMER_CR_PWM_ENABLE 0x00000008
|
||||||
|
|
||||||
|
#define IRQN_TIMER_0_INTERRUPT 16+85
|
||||||
|
#define IRQN_TIMER_1_INTERRUPT 16+86
|
||||||
|
#define IRQN_TIMER_2_INTERRUPT 16+87
|
||||||
|
#define IRQN_TIMER_3_INTERRUPT 16+88
|
||||||
|
#define IRQN_TIMER_4_INTERRUPT 16+89
|
||||||
|
#define IRQN_TIMER_5_INTERRUPT 16+90
|
||||||
|
|
||||||
|
typedef struct _timer_regs_channel
|
||||||
|
{
|
||||||
|
/* TIMER_N Load Count Register (0x00+(N-1)*0x14) */
|
||||||
|
volatile uint32_t load_count;
|
||||||
|
/* TIMER_N Current Value Register (0x04+(N-1)*0x14) */
|
||||||
|
volatile uint32_t current_value;
|
||||||
|
/* TIMER_N Control Register (0x08+(N-1)*0x14) */
|
||||||
|
volatile uint32_t control;
|
||||||
|
/* TIMER_N Interrupt Clear Register (0x0c+(N-1)*0x14) */
|
||||||
|
volatile uint32_t eoi;
|
||||||
|
/* TIMER_N Interrupt Status Register (0x10+(N-1)*0x14) */
|
||||||
|
volatile uint32_t intr_stat;
|
||||||
|
} __attribute__((packed, aligned(4))) k230_timer_regs_channel_t;
|
||||||
|
|
||||||
|
typedef struct _k230_timer_regs
|
||||||
|
{
|
||||||
|
/* TIMER_N Register (0x00-0x4c) */
|
||||||
|
volatile k230_timer_regs_channel_t channel[5];
|
||||||
|
/* reserverd (0x50-0x9c) */
|
||||||
|
volatile uint32_t resv1[20];
|
||||||
|
/* TIMER Interrupt Status Register (0xa0) */
|
||||||
|
volatile uint32_t intr_stat;
|
||||||
|
/* TIMER Interrupt Clear Register (0xa4) */
|
||||||
|
volatile uint32_t eoi;
|
||||||
|
/* TIMER Raw Interrupt Status Register (0xa8) */
|
||||||
|
volatile uint32_t raw_intr_stat;
|
||||||
|
/* TIMER Component Version Register (0xac) */
|
||||||
|
volatile uint32_t comp_version;
|
||||||
|
/* TIMER_N Load Count2 Register (0xb0-0xbc) */
|
||||||
|
volatile uint32_t load_count2[4];
|
||||||
|
} __attribute__((packed, aligned(4))) k230_timer_regs_t;
|
||||||
|
|
||||||
|
struct k230_timer {
|
||||||
|
struct rt_hwtimer_device device;
|
||||||
|
const char *name;
|
||||||
|
rt_ubase_t base;
|
||||||
|
uint32_t id;
|
||||||
|
sysctl_clk_node_e clk;
|
||||||
|
sysctl_clk_node_e clk_src;
|
||||||
|
int irq_num;
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif
|
|
@ -4,6 +4,9 @@ src = []
|
||||||
|
|
||||||
if GetDepend('RT_UTEST_USING_ALL_CASES') or GetDepend('BSP_UTEST_DRIVERS'):
|
if GetDepend('RT_UTEST_USING_ALL_CASES') or GetDepend('BSP_UTEST_DRIVERS'):
|
||||||
|
|
||||||
|
if GetDepend('BSP_USING_TIMERS'):
|
||||||
|
src += ['test_timer.c']
|
||||||
|
|
||||||
if GetDepend('BSP_USING_WDT'):
|
if GetDepend('BSP_USING_WDT'):
|
||||||
src += ['test_wdt.c']
|
src += ['test_wdt.c']
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,153 @@
|
||||||
|
/* Copyright (c) 2023, Canaan Bright Sight Co., Ltd
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
|
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
|
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||||
|
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||||
|
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||||
|
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
#include <drivers/hwtimer.h>
|
||||||
|
|
||||||
|
#include "../interdrv/hwtimer/drv_timer.h"
|
||||||
|
#include "utest.h"
|
||||||
|
|
||||||
|
/*
|
||||||
|
* This test case is designed to test the hardware timer driver.
|
||||||
|
* It will:
|
||||||
|
* 1. Find two hardware timer devices.
|
||||||
|
* 2. Open both devices.
|
||||||
|
* 3. Set a custom frequency for timer0 and use the default frequency for timer1.
|
||||||
|
* 4. Start both timers with different timeout values.
|
||||||
|
* 5. Poll and print the current value of each timer every second.
|
||||||
|
* 6. Trigger the interrupt callback when the timer times out and print a message.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DEVICE_NAME0 "hwtimer0"
|
||||||
|
#define DEVICE_NAME1 "hwtimer1"
|
||||||
|
|
||||||
|
static rt_device_t tmr_dev_0;
|
||||||
|
static rt_device_t tmr_dev_1;
|
||||||
|
|
||||||
|
#define TIMEOUT_SEC_0 10
|
||||||
|
#define TIMEOUT_SEC_1 5
|
||||||
|
#define MAX_TIMEOUT_SEC \
|
||||||
|
(TIMEOUT_SEC_0 > TIMEOUT_SEC_1 ? TIMEOUT_SEC_0 : TIMEOUT_SEC_1)
|
||||||
|
|
||||||
|
static rt_err_t tmr_timeout_cb(rt_device_t dev, rt_size_t size)
|
||||||
|
{
|
||||||
|
struct rt_hwtimer_device *rt_timer = rt_container_of(dev, struct rt_hwtimer_device, parent);
|
||||||
|
struct k230_timer *kd_timer = rt_container_of(rt_timer, struct k230_timer, device);
|
||||||
|
|
||||||
|
LOG_I("---> [%s] timeout callback fucntion!\n", kd_timer->name);
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void test_hwtimer(void)
|
||||||
|
{
|
||||||
|
rt_hwtimerval_t timerval;
|
||||||
|
rt_hwtimer_mode_t mode;
|
||||||
|
rt_size_t tsize;
|
||||||
|
rt_uint32_t freq = 25000000; /* Frequency options: 12.5M 25M 50M 100M */
|
||||||
|
rt_err_t ret;
|
||||||
|
rt_ssize_t size;
|
||||||
|
int loop_count = 0;
|
||||||
|
|
||||||
|
LOG_I("test_hwtimer start");
|
||||||
|
|
||||||
|
tmr_dev_0 = rt_device_find(DEVICE_NAME0);
|
||||||
|
uassert_not_null(tmr_dev_0);
|
||||||
|
tmr_dev_1 = rt_device_find(DEVICE_NAME1);
|
||||||
|
uassert_not_null(tmr_dev_1);
|
||||||
|
|
||||||
|
ret = rt_device_open(tmr_dev_0, RT_DEVICE_OFLAG_RDWR);
|
||||||
|
uassert_int_equal(ret, RT_EOK);
|
||||||
|
ret = rt_device_open(tmr_dev_1, RT_DEVICE_OFLAG_RDWR);
|
||||||
|
uassert_int_equal(ret, RT_EOK);
|
||||||
|
|
||||||
|
ret = rt_device_control(tmr_dev_0, HWTIMER_CTRL_FREQ_SET, &freq);
|
||||||
|
uassert_int_equal(ret, RT_EOK);
|
||||||
|
|
||||||
|
ret = rt_device_set_rx_indicate(tmr_dev_0, tmr_timeout_cb);
|
||||||
|
uassert_int_equal(ret, RT_EOK);
|
||||||
|
ret = rt_device_set_rx_indicate(tmr_dev_1, tmr_timeout_cb);
|
||||||
|
uassert_int_equal(ret, RT_EOK);
|
||||||
|
|
||||||
|
timerval.sec = TIMEOUT_SEC_0;
|
||||||
|
timerval.usec = 0;
|
||||||
|
tsize = sizeof(timerval);
|
||||||
|
mode = HWTIMER_MODE_ONESHOT;
|
||||||
|
ret = rt_device_control(tmr_dev_0, HWTIMER_CTRL_MODE_SET, &mode);
|
||||||
|
uassert_int_equal(ret, RT_EOK);
|
||||||
|
size = rt_device_write(tmr_dev_0, 0, &timerval, tsize);
|
||||||
|
uassert_int_equal(size, tsize);
|
||||||
|
LOG_I("timer0 start: [%d:%d]\n", timerval.sec, timerval.usec);
|
||||||
|
|
||||||
|
timerval.sec = TIMEOUT_SEC_1;
|
||||||
|
timerval.usec = 0;
|
||||||
|
tsize = sizeof(timerval);
|
||||||
|
mode = HWTIMER_MODE_ONESHOT;
|
||||||
|
ret = rt_device_control(tmr_dev_1, HWTIMER_CTRL_MODE_SET, &mode);
|
||||||
|
uassert_int_equal(ret, RT_EOK);
|
||||||
|
size = rt_device_write(tmr_dev_1, 0, &timerval, tsize);
|
||||||
|
uassert_int_equal(size, tsize);
|
||||||
|
LOG_I("timer1 start: [%d:%d]\n", timerval.sec, timerval.usec);
|
||||||
|
|
||||||
|
while (loop_count++ < MAX_TIMEOUT_SEC + 1)
|
||||||
|
{
|
||||||
|
size = rt_device_read(tmr_dev_0, 0, &timerval, sizeof(timerval));
|
||||||
|
uassert_int_equal(size, sizeof(timerval));
|
||||||
|
LOG_I("timer0: [%d:%d]\n", timerval.sec, timerval.usec);
|
||||||
|
|
||||||
|
size = rt_device_read(tmr_dev_1, 0, &timerval, sizeof(timerval));
|
||||||
|
uassert_int_equal(size, sizeof(timerval));
|
||||||
|
LOG_I("timer1: [%d:%d]\n", timerval.sec, timerval.usec);
|
||||||
|
|
||||||
|
rt_thread_mdelay(1000);
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = rt_device_close(tmr_dev_0);
|
||||||
|
uassert_int_equal(ret, RT_EOK);
|
||||||
|
ret = rt_device_close(tmr_dev_1);
|
||||||
|
uassert_int_equal(ret, RT_EOK);
|
||||||
|
LOG_I("test_hwtimer end");
|
||||||
|
}
|
||||||
|
|
||||||
|
static void hw_timer_testcase(void)
|
||||||
|
{
|
||||||
|
UTEST_UNIT_RUN(test_hwtimer);
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_err_t utest_tc_init(void)
|
||||||
|
{
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
static rt_err_t utest_tc_cleanup(void)
|
||||||
|
{
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
UTEST_TC_EXPORT(hw_timer_testcase, "timer", utest_tc_init, utest_tc_cleanup, 10);
|
Loading…
Reference in New Issue